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41. 发明申请

US20170253757A1 Silver Nanoparticle Ink 审中-公开
公开(公告)号：US20170253757A1
公开(公告)日：2017-09-07
申请号：US15061618
申请日：2016-03-04
申请人： Xerox Corporation
发明人： Pedram Salami , Ping Liu , C. Geoffrey Allen , Naveen Chopra , Kurt I. Halfyard
IPC分类号： C09D11/52 , C09D11/033 , H05K3/40 , C09D11/037
CPC分类号： C09D11/52 , C09D11/033 , C09D11/037 , H05K1/097 , H05K3/1275 , H05K3/40 , H05K2201/0218
摘要： An ink composition including a metal nanoparticle; at least one aromatic hydrocarbon solvent, wherein the at least one aromatic hydrocarbon solvent is compatible with the metal nanoparticles; at least one aliphatic hydrocarbon solvent, wherein the at least one aliphatic hydrocarbon solvent is compatible with the metal nanoparticles; wherein the ink composition has a metal content of greater than about 45 percent by weight, based upon the total weight of the ink composition; wherein the ink composition has a viscosity of from about 5 to about 30 centipoise at a temperature of about 20 to about 30° C. A process for preparing the ink composition. A process for printing the ink composition comprising pneumatic aerosol printing.

42. 发明授权

US09736940B2 Low permeability electrical feed-through 有权
公开(公告)号：US09736940B2
公开(公告)日：2017-08-15
申请号：US15228983
申请日：2016-08-04
申请人： HGST Netherlands B.V.
发明人： Thomas R. Albrecht , Darya Amin-Shahidi , Vipin Ayanoor-Vitikkate , Toshiki Hirano
IPC分类号： G11B33/14 , H05K1/11 , G06F1/18 , G11B25/04 , G11B33/12 , H05K1/03 , H05K3/40
CPC分类号： H05K1/115 , G06F1/182 , G11B25/043 , G11B33/122 , G11B33/14 , G11B33/148 , H05K1/0306 , H05K1/113 , H05K3/40
摘要： A low permeability electrical feed-through involves a laminated structure having a conductor layer sandwiched between adjacent insulator layers, which are sandwiched between adjacent diffusion control layers, where the laminated structure provides a relatively narrow and long, high aspect ratio diffusion channel to inhibit the leakage of gas from within a sealed device to the external environment. The electrical feed-through may comprise lower and upper electrical connection pads that are positioned within different regions of the feed-through but still electrically connected by way of a first via positioned in a sealed region, the conductor layer, and a second via positioned in an external environment region.

43. 发明申请

US20170127524A1 Electronic Assembly Group and Method for Producing the Same 审中-公开
公开(公告)号：US20170127524A1
公开(公告)日：2017-05-04
申请号：US15375578
申请日：2016-12-12
申请人： Schweizer Electronic AG
发明人： Thomas GOTTWALD , Christian RÖSSLE
IPC分类号： H05K1/18 , H05K3/30 , H02K11/33 , H05K3/00 , H02K9/22 , H05K1/02 , H05K3/40
CPC分类号： H05K1/185 , H01G2/065 , H01L23/645 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L2224/16225 , H01L2224/2105 , H01L2224/211 , H01L2224/32237 , H01L2224/73267 , H01L2924/1431 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19106 , H02K9/22 , H02K11/30 , H02K11/33 , H05K1/0204 , H05K1/0271 , H05K1/18 , H05K1/184 , H05K3/0044 , H05K3/0061 , H05K3/30 , H05K3/3442 , H05K3/40 , H05K3/4038 , H05K3/4092 , H05K3/4602 , H05K2201/0397 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2203/0228 , H01L2924/00
摘要： An electronic assembly group comprising a printed circuit board structure in a multilayer configuration that has at least two electrically conductive layers. The electronic assembly group also comprises an additional passive component that is connected to the two electrically conductive layers, each of which has at least one segment that extends beyond the multilayer structure to form connection regions, the passive component making contact directly at the connection regions.

44. 发明申请

US20170077023A1 SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体衬底，半导体器件及其制造方法
公开(公告)号：US20170077023A1
公开(公告)日：2017-03-16
申请号：US15364143
申请日：2016-11-29
申请人： Advanced Semiconductor Engineering, Inc.
发明人： Li-Chuan TSAI , Chih-Cheng LEE
IPC分类号： H01L23/498 , H05K1/11 , H01L21/48 , H05K1/18
CPC分类号： H01L23/49838 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L24/17 , H01L2224/16227 , H01L2924/15153 , H01L2924/15313 , H01L2924/19105 , H05K1/0266 , H05K1/0298 , H05K1/111 , H05K1/115 , H05K1/181 , H05K1/183 , H05K3/0017 , H05K3/0026 , H05K3/0047 , H05K3/22 , H05K3/36 , H05K3/40 , H05K3/4682 , H05K3/4697 , H05K2201/0158 , H05K2201/09472 , H05K2201/09527 , H05K2201/10204 , H05K2203/166 , Y02P70/611
摘要： A semiconductor substrate includes: 1) a first dielectric structure having a first surface and a second surface opposite the first surface; 2) a second dielectric structure having a third surface and a fourth surface opposite the third surface, wherein the fourth surface faces the first surface, the second dielectric structure defining a through hole extending from the third surface to the fourth surface, wherein a cavity is defined by the through hole and the first dielectric structure; 3) a first patterned conductive layer, disposed on the first surface of the first dielectric structure; and 4) a second patterned conductive layer, disposed on the second surface of the first dielectric structure and including at least one conductive trace. The first dielectric structure defines at least one opening to expose a portion of the second patterned conductive layer.
摘要翻译：半导体衬底包括：1）具有第一表面和与第一表面相对的第二表面的第一电介质结构; 2）具有与第三表面相对的第三表面和第四表面的第二介电结构，其中第四表面面向第一表面，第二介电结构限定从第三表面延伸到第四表面的通孔，其中腔是由通孔和第一电介质结构限定; 3）设置在第一介电结构的第一表面上的第一图案化导电层; 以及4）第二图案化导电层，设置在所述第一介电结构的第二表面上并且包括至少一个导电迹线。第一介电结构限定至少一个开口以暴露第二图案化导电层的一部分。

45. 发明授权

US09572247B2 Memory card systems comprising flexible integrated circuit element packages, and methods for manufacturing said memory card systems 有权
标题翻译：包括柔性集成电路元件封装的存储卡系统以及用于制造所述存储卡系统的方法
公开(公告)号：US09572247B2
公开(公告)日：2017-02-14
申请号：US14650578
申请日：2013-03-18
申请人： HANA MICRON INC.
发明人： Jae-Sung Lim , Ju-Hyung Kim
IPC分类号： H01L21/00 , H05K1/02 , H05K1/11 , H05K3/40 , H05K5/00 , H01L23/538 , H05K1/18 , H05K3/32
CPC分类号： H05K1/028 , H01L23/5387 , H01L2924/0002 , H05K1/117 , H05K1/118 , H05K1/189 , H05K3/323 , H05K3/40 , H05K5/0004 , H05K2201/10159 , Y10T29/49149 , H01L2924/00
摘要： A memory card system may include a flexible integrated circuit device package, an upper flexible case, a lower flexible case, a wiring structure, an anisotropic conductive film, etc. The flexible integrated circuit device package may include a material capable of being bent or folded and a flexible integrated circuit device having a connection pad for an electrical connection. The upper flexible case may include a material capable of being bent or folded and may cover the integrated circuit device package. The lower flexible case may include a material capable of being bent or folded and the flexible integrated circuit device package may be fixed to the lower flexible case. The wiring structure may include a material capable of being bent or folded, and also may include a connection wiring disposed on an inner surface of the upper flexible case for electrically connecting the flexible integrated circuit device package with an external device, a connection pin disposed on an outer surface of the upper flexible case, and a via wiring passing through the upper flexible case. The anisotropic conductive film may be disposed between the flexible integrated circuit device package and the upper flexible case for electrically connecting the connection pad with the connection wiring.
摘要翻译：存储卡系统可以包括柔性集成电路器件封装，上部柔性外壳，下部柔性外壳，布线结构，各向异性导电膜等。柔性集成电路器件封装可以包括能够弯曲或折叠的材料以及具有用于电连接的连接垫的柔性集成电路装置。上部柔性壳体可以包括能够弯曲或折叠的材料并且可以覆盖集成电路器件封装。下柔性壳体可以包括能够弯曲或折叠的材料，并且柔性集成电路器件封装可以固定到下柔性壳体。布线结构可以包括能够弯曲或折叠的材料，并且还可以包括布置在上柔性壳体的内表面上的连接布线，用于将柔性集成电路器件封装与外部设备电连接，连接引脚设置在上柔性壳体的外表面和穿过上柔性壳体的通孔布线。各向异性导电膜可以设置在柔性集成电路器件封装和上部柔性壳体之间，用于将连接焊盘与连接布线电连接。

46. 发明申请

US20160163626A1 INTERPOSER SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：插件底座及其制造方法
公开(公告)号：US20160163626A1
公开(公告)日：2016-06-09
申请号：US14706101
申请日：2015-05-07
申请人： PHOENIX PIONEER TECHNOLOGY CO., LTD.
发明人： Pao-Hung Chou , Shih-Ping Hsu
IPC分类号： H01L23/498 , H05K3/46 , H01L21/683 , H05K1/11 , H01L21/48 , H05K3/06 , H05K3/40
CPC分类号： H01L23/49822 , H01L21/4857 , H01L21/486 , H01L21/6835 , H01L23/13 , H01L23/49827 , H01L2221/68345 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H05K1/0284 , H05K1/0296 , H05K1/111 , H05K3/061 , H05K3/40 , H05K2201/10378 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon; filling a dielectric material in the recessed groove to form a first dielectric material layer, or forming a patterned first dielectric material layer on the carrier; forming a first wiring layer, a first conductive block and a second dielectric material layer on the carrier and the first dielectric material layer sequentially, with the first wiring layer and the first conductive block embedded in the second dielectric material layer; and forming a second wiring layer and a second conductive block on the second dielectric material layer. A coreless interposer substrate having fine pitches is thus fabricated.
摘要翻译：本发明提供一种插入式基板及其制造方法。该方法包括：蚀刻载体以在其上形成凹槽; 在所述凹槽中填充介电材料以形成第一介电材料层，或在所述载体上形成图案化的第一介电材料层; 在载体和第一介电材料层上依次形成第一布线层，第一导电块和第二介电材料层，第一布线层和第一导电块嵌入第二介电材料层中; 以及在所述第二电介质材料层上形成第二布线层和第二导电块。因此制造具有细间距的无芯内插器基板。

47. 发明授权

US09363883B2 Printed circuit board and method for manufacturing same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US09363883B2
公开(公告)日：2016-06-07
申请号：US13997420
申请日：2011-12-23
申请人： Sung Wuk Ryu , Seong Bo Shim , Seung Yul Shin
发明人： Sung Wuk Ryu , Seong Bo Shim , Seung Yul Shin
IPC分类号： H05K7/10 , H05K7/12 , H05K1/02 , H05K3/40 , H05K3/34
CPC分类号： H05K1/02 , H05K3/3436 , H05K3/3452 , H05K3/40 , H05K3/4007 , H05K2201/0367
摘要： A printed circuit board according to an embodiment of the present invention includes an insulating layer, a pad formed on the insulating layer and exposed through an opening section of a solder resist, a bump formed by filling an opening portion of the solder resist from top of the pad and having an narrow width than the opening of the solder resist.
摘要翻译：根据本发明的实施例的印刷电路板包括绝缘层，形成在绝缘层上并通过阻焊剂的开口部分暴露的焊盘，通过从焊料的顶部填充阻焊剂的开口部而形成的凸块该焊盘的宽度比阻焊剂的开口宽。

48. 发明授权

US09358804B2 Fine wiring pattern, manufacturing method thereof, and thermal print head 有权
标题翻译：精细布线图案，其制造方法和热打印头
公开(公告)号：US09358804B2
公开(公告)日：2016-06-07
申请号：US14610330
申请日：2015-01-30
申请人： ROHM CO., LTD.
发明人： Shinobu Obata , Koji Nishi , Takafumi Katsuno , Masumi Okumura , Nobuhito Kinoshita
IPC分类号： B41J2/05 , B41J2/335 , B41J2/045 , H05K3/06 , H05K1/09 , H05K3/40 , H05K3/12 , H05K1/03
CPC分类号： B41J2/3352 , B41J2/04541 , B41J2/3351 , B41J2/33515 , B41J2/3353 , B41J2/3354 , B41J2/33545 , B41J2/3355 , B41J2/3357 , B41J2/3359 , H05K1/0306 , H05K1/09 , H05K1/092 , H05K3/06 , H05K3/12 , H05K3/40 , H05K2201/017 , H05K2201/0338 , H05K2201/035
摘要： According to the present disclosure, a manufacturing method of a fine wiring pattern is disclosed. The manufacturing method includes preparing a support member, forming a first layer on the support member by thick-film printing, and forming a second layer including Ag on the first layer by the thick-film printing. The method also includes forming a predetermined fine wiring pattern by performing an etching process upon the first layer and the second layer.
摘要翻译：根据本公开，公开了精细布线图案的制造方法。该制造方法包括制备支撑构件，通过厚膜印刷在支撑构件上形成第一层，并通过厚膜印刷在第一层上形成包括Ag的第二层。该方法还包括通过对第一层和第二层执行蚀刻处理来形成预定的精细布线图案。

49. 发明申请

US20160135280A1 COOLED PRINTED CIRCUIT WITH MULTI-LAYER STRUCTURE AND LOW DIELECTRIC LOSSES 有权
标题翻译：具有多层结构和低介电损耗的冷却印刷电路
公开(公告)号：US20160135280A1
公开(公告)日：2016-05-12
申请号：US14897615
申请日：2014-06-10
申请人： THALES
发明人： Sebastien BONNET , Serge VERDEYME , Michel CAMPOVECCHIO , Alain DRAVET , Marc-Yves LIENHART
IPC分类号： H05K1/02 , H05K3/00 , H05K3/46 , H05K3/40 , H05K1/18 , H05K1/11
CPC分类号： H05K1/0203 , H05K1/0204 , H05K1/0237 , H05K1/115 , H05K1/183 , H05K3/0011 , H05K3/40 , H05K3/4623 , H05K3/4644 , H05K3/4697 , H05K2201/09072 , H05K2201/09845 , H05K2201/10416 , H05K2201/1056
摘要： The printed circuit with a multi-layer structure comprises: a first layer machined to form a spotface passing through the layer, a second layer comprising a first cavity passing through the layer, a third layer comprising, on one face, an electronic component that it is in the first cavity, a fourth layer comprising a second cavity, a heat-conducting element with two parts: one made of metal, called a thermal cover, inserted into the spotface of the first layer so as to close, mechanically and electrically, the first cavity, the other made of a dielectric material with heat conduction >30 W/(m·K), placed in the first cavity so as to be in contact with the electronic component.
摘要翻译：具有多层结构的印刷电路包括：加工成形成通过该层的点表面的第一层，包含通过该层的第一腔的第二层，在一个面上包括电子部件的第三层，在第一空腔中，包括第二空腔的第四层，具有两部分的导热元件：一个由金属制成的称为热盖的导热元件，其被插入到第一层的表面中以机械和电气闭合，第一腔，另一个由导热> 30W /（m·K）的介电材料制成，放置在第一腔中以与电子部件接触。

50. 发明申请

US20150305425A1 HELMET CONFIGURED FOR ELECTRONICS 有权
标题翻译：电子配置的帮助
公开(公告)号：US20150305425A1
公开(公告)日：2015-10-29
申请号：US14792848
申请日：2015-07-07
申请人： Revision Military S.a.r.L.
发明人： David Redpath , Marie-Pierre Gendron , Stéphane Lebel
IPC分类号： A42B3/04 , A42C2/00 , H05K13/00 , H05K3/40 , H05K1/02
CPC分类号： A42B3/042 , A42B3/04 , A42C2/00 , H05K1/028 , H05K3/40 , H05K13/00 , Y10T29/49002
摘要： Integrated helmet systems provide convenient and modular use of electronic devices with a protective helmet. In addition to ease of use, weight savings and space savings also may be realized in certain embodiments. A flexible printed circuit board is used as a power bus to deliver electrical power from a battery pack to various electronic devices. Examples of devices used with protective helmets include: night vision goggles; helmet-mounted display units; ear phones; communication headsets; camera systems; biometric sensors; microprocessors; identify friend or foe devices (IFFs); and GPS devices.
摘要翻译：集成头盔系统提供方便和模块化的使用电子设备与防护头盔。除了易于使用之外，在某些实施例中也可以实现体重节省和空间节省。柔性印刷电路板用作电力总线，以将电力从电池组传送到各种电子设备。使用防护头盔的设备实例包括：夜视镜; 头戴式显示单元; 耳机; 通讯耳机; 相机系统; 生物识别传感器; 微处理器识别朋友或敌手（IFF）; 和GPS设备。

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