会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 43. 发明授权
    • Operation method of semiconductor devices
    • 半导体器件的操作方法
    • US06734499B1
    • 2004-05-11
    • US09406791
    • 1999-09-28
    • Shunpei Yamazaki
    • Shunpei Yamazaki
    • H01L2972
    • H01L29/66757H01L21/0242H01L21/0245H01L21/02488H01L21/02532H01L21/02576H01L21/02667H01L21/268H01L29/78618H01L29/78666Y10S257/914
    • An insulated gate field effect transistor comprises a non-single-crystalline semiconductor layer formed on a substrate, a gate electrode is formed on a portion of the surface of said semiconductor layer, and a gate insulating film is disposed between said gate electrode and said semiconductor layer. A non-single-crystalline channel region is defined within said semiconductor layer just below said gate electrode. A source region and a drain region are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
    • 绝缘栅场效应晶体管包括形成在衬底上的非单晶半导体层,在所述半导体层的表面的一部分上形成栅电极,并且栅极绝缘膜设置在所述栅电极和所述半导体之间 层。 在刚好在所述栅电极正下方的所述半导体层内限定非单晶沟道区。 源极区域和漏极区域以相反的关系从紧邻所述沟道区域的所述半导体层中变换并限定在所述半导体层中,所述源极区域和漏极区域通过选择性地照射所述第二区域的部分而被结晶到比所述沟道区域的程度更高的程度 使用所述栅电极作为掩模的半导体层。
    • 44. 发明授权
    • Method of fabricating thin film transistor
    • 制造薄膜晶体管的方法
    • US06511871B2
    • 2003-01-28
    • US09794770
    • 2001-02-28
    • Seung-Ki JooTae-Kyung Kim
    • Seung-Ki JooTae-Kyung Kim
    • H01L2100
    • H01L29/78696H01L29/66757H01L29/78618H01L29/78666H01L29/78675
    • The present invention relates to a method of fabricating a thin film transistor in which a metal silicide line generated from Metal Induced Lateral Crystallization is located at the outside of a channel region. The present invention includes the steps of forming a semiconductor layer on a substrate wherein the semiconductor layer has a first region, a channel region and a second region in order, forming a gate insulating layer/a gate electrode on the channel region, doping the first and the second region heavily with impurity, forming a metal film pattern making the first region a metal-offset, and crystallizing the semiconductor layer by means of applying thermal treatment to the semiconductor layer having the metal film.
    • 本发明涉及一种制造薄膜晶体管的方法,其中由金属诱导横向晶化产生的金属硅化物线位于沟道区的外部。 本发明包括在衬底上形成半导体层的步骤,其中半导体层依次具有第一区域,沟道区域和第二区域,在沟道区域上形成栅极绝缘层/栅电极,掺杂第一 并且第二区域大量杂质,形成使第一区域成为金属偏移的金属膜图案,并且通过对具有金属膜的半导体层进行热处理使半导体层结晶。
    • 46. 发明授权
    • Polysilicon thin film transistor structure
    • 多晶硅薄膜晶体管结构
    • US06486496B2
    • 2002-11-26
    • US09994322
    • 2001-11-26
    • Ting-Chang ChangHsiao-Wen ZanPo-Sheng Shih
    • Ting-Chang ChangHsiao-Wen ZanPo-Sheng Shih
    • H01L21108
    • H01L29/66757H01L29/78621H01L29/78627H01L29/78666H01L29/78684
    • A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequentially formed over the amorphous silicon channel layer. A lightly doped source/drain region is formed in the amorphous silicon channel layer and then a spacer is formed over the gate electrode. A source/drain region is formed in the amorphous silicon channel layer. A portion of the oxide layer above the source/drain region is removed. An isolation spacer is formed on the sidewalls of the spacer. A self-aligned silicide layer is formed at the top section of the spacer and the source/drain region. Finally, a metal-induced lateral crystallization process is conducted to transform the amorphous silicon channel layer into a lateral-crystallization-polysilicon channel layer.
    • 一种形成多晶硅薄膜晶体管的方法。 在绝缘基板上形成非晶硅沟道层。 在非晶硅沟道层中形成有源区。 在非晶硅沟道层上依次形成氧化物层和栅电极。 在非晶硅沟道层中形成轻掺杂的源极/漏极区,然后在栅极上形成间隔物。 源极/漏极区域形成在非晶硅沟道层中。 除去源极/漏极区上方的氧化物层的一部分。 在间隔物的侧壁上形成隔离间隔物。 在间隔物的顶部和源极/漏极区域上形成自对准的硅化物层。 最后,进行金属诱导的横向结晶工艺以将非晶硅沟道层转变成横向结晶 - 多晶硅沟道层。
    • 47. 发明授权
    • Method of forming a thin-film transistor having a high resistance back channel region
    • 形成具有高电阻背沟道区域的薄膜晶体管的方法
    • US06461901B1
    • 2002-10-08
    • US09391514
    • 1999-09-08
    • Kesao Noguchi
    • Kesao Noguchi
    • H01L2100
    • H01L29/66765H01L29/78666H01L29/78669
    • A thin-film transistor is provided, which has a simple configuration and improved off-characteristic, operational reliability, and fabrication yield. This transistor includes a substrate and a layered structure formed on the substrate. The layered structure includes a semiconductor film, a gate insulating film located on a first side of the semiconductor film to be overlapped with the semiconductor film, a gate electrode located on the gate insulating film on the first side of the semiconductor film to be selectively overlapped with the semiconductor film, a source electrode located on a second side of the semiconductor film to be electrically connected to the semiconductor film, and a drain electrode located on the second side of the semiconductor film to be electrically connected to the semiconductor film and to be apart from the source electrode. The semiconductor film has a back channel section between opposite ends of the source and drain regions. The back channel section includes a high-resistance part generated by doping n- and p-type impurities.
    • 提供了薄膜晶体管,其具有简单的配置和改进的非特性,操作可靠性和制造产量。 该晶体管包括基板和形成在基板上的分层结构。 层状结构包括半导体膜,位于半导体膜的与半导体膜重叠的第一侧上的栅极绝缘膜,位于半导体膜的第一侧上的栅极绝缘膜上的栅极,以选择性地重叠 通过半导体膜,位于半导体膜的与半导体膜电连接的第二侧的源电极和位于半导体膜的第二面上的漏电极,与半导体膜电连接, 除了源电极。 半导体膜在源区和漏区的相对端之间具有背沟道区。 背沟道部分包括通过掺杂n型和p型杂质产生的高电阻部分。