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    • 41. 发明授权
    • Magneto-strictive delay lines
    • 强磁延迟线
    • US3024428A
    • 1962-03-06
    • US69581957
    • 1957-11-12
    • SIEMENS EDISON SWAN LTD
    • JAMES WARMAN BLOOMFIELD
    • G05D23/24G11C21/02H03H9/36
    • G05D23/2456G11C21/026H03H9/36
    • 813,591. Automatic temperature control. SIEMENS EDISON SWAN Ltd. Oct. 17, 1957 [Nov. 14, 1956], No. 34819/56. Class 38 (4). The temperature of a magneto-strictive delay line is maintained constant by varying a heating current therethrough in accordance with its electrical impedance. In one embodiment, unbalance of a D.C. bridge B, Fig. 1, having the delay line D in one arm, is detected by the control winding CW of a saturable reactor S, the main winding MW of which is in series with an A.C. source T1, rectifier Rf and the input of the bridge. When the line D approaches the required temperature, the bridge approaches the balance point and the bridge current, and hence the line heating current, approaches zero. To avoid overheating the line, in abnormal conditions, e.g. during setting up, the circuit is rendered responsive to unbalance in one direction only by the inclusion of rectifier Rf2 in the circuit of the control winding CW. In a modification the bridge current is derived from a transistor amplifier controlled by the rectifier circuit including the saturable reactor, Fig. 2 (not shown), or the transistor amplifier may be replaced by a magnetic amplifier. In an embodiment using an A.C. bridge and line heating current, the bridge B1, Fig. 3, including the line D is supplied from the A.C. source through winding W3 of a transformer TF2. The out-of-balance potential is applied via transformer TF1, and transistor amplifier TS2, to the other winding W4 of transformer TF2 to augment the bridge current flowing through winding W3. If the bridge becomes unbalanced in the abnormal direction the amplified output of transformer TFl is in opposite phase and diminishes the bridge current. Series and shunt rectifiers Rf4 and Rf5 are connected in the collector-emitter path of transistor TS2 to protect the latter from positive excursions of the applied A.C.