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41. 发明授权

US07091126B2 Method for copper surface smoothing 有权
标题翻译：铜表面平滑方法
公开(公告)号：US07091126B2
公开(公告)日：2006-08-15
申请号：US10422443
申请日：2003-04-24
申请人： Han-Hsin Kuo , Hung-Wen Su , Wen-Chih Chiou , Tsu Shih , Hsien-Ming Lee
发明人： Han-Hsin Kuo , Hung-Wen Su , Wen-Chih Chiou , Tsu Shih , Hsien-Ming Lee
IPC分类号： H01L21/302
CPC分类号： H01L21/76886 , H01L21/32115 , H01L21/3212 , H01L21/7684
摘要： An improvement in a copper damascene process is disclosed. The improvement comprises the step of projecting an electron beam on to a chemical mechanically polished material surface having copper filled etched trenches at a known angle of incidence with respect to the material surface for a known period of time, the electron beam having a beamwidth substantially covering the material surface and a known intensity.
摘要翻译：披露了铜镶嵌工艺的改进。该改进包括将电子束投射到具有铜填充的蚀刻沟槽的化学机械抛光的材料表面上的步骤，其具有相对于材料表面已知的入射角已知的时间段，电子束具有基本覆盖的波束宽度材料表面和已知的强度。

42. 发明申请

US20050051266A1 Apparatus and method for pre-conditioning CMP polishing pad 有权
标题翻译： CMP抛光垫预处理的设备和方法
公开(公告)号：US20050051266A1
公开(公告)日：2005-03-10
申请号：US10656585
申请日：2003-09-04
申请人： Chia-Che Chuang , Wen-Chih Chiou , Hsin-Hsien Lu , Liang-Guang Chen
发明人： Chia-Che Chuang , Wen-Chih Chiou , Hsin-Hsien Lu , Liang-Guang Chen
IPC分类号： B24B37/04 , B24B49/16 , B24B53/00 , C23F1/00
CPC分类号： B24B53/017 , B24B37/042 , B24B49/16
摘要： An apparatus and method suitable for the pre-conditioning of a polishing pad on a CMP apparatus prior to the polishing of production wafers on the apparatus. The apparatus includes a pre-conditioning arm on which is mounted an ingot of suitable material. In use, the ingot is pressed against the polishing surface of the rotating polishing pad for a selected period of time to increase the temperature of the polishing surface by friction. The pre-conditioned polishing pad facilitates uniform polishing rates of production semiconductor wafers subsequently polished on the apparatus.
摘要翻译：一种适于在抛光装置上的生产晶片之前对CMP装置上的抛光垫进行预处理的装置和方法。该装置包括预调节臂，在其上安装合适材料的锭。在使用中，将铸锭压在旋转的抛光垫的抛光表面上一段选定的时间，以通过摩擦来增加抛光表面的温度。预处理的抛光垫有助于随后在设备上抛光的生产半导体晶片的均匀抛光速率。

43. 发明授权

US06849549B1 Method for forming dummy structures for improved CMP and reduced capacitance 有权
标题翻译：用于形成用于改善CMP和减小电容的虚拟结构的方法
公开(公告)号：US06849549B1
公开(公告)日：2005-02-01
申请号：US10728999
申请日：2003-12-04
申请人： Wen-Chih Chiou , Syun-Ming Jang
发明人： Wen-Chih Chiou , Syun-Ming Jang
IPC分类号： H01L21/302 , H01L21/321 , H01L21/768
CPC分类号： H01L21/76808 , H01L21/3212 , H01L21/7684 , Y10S438/926
摘要： A method for forming a damascene structure to improve a chemical mechanical polishing (CMP) process while reducing the capacitance in an integrated circuit including forming a shallow dummy damascene adjacent active damascenes and removing the dummy damascene in a CMP process while forming the adjacent active damascenes.
摘要翻译：一种用于形成镶嵌结构以改善化学机械抛光（CMP）工艺的方法，同时减少集成电路中的电容，包括形成邻近有源大马士革的浅虚拟镶嵌，并在CMP工艺中除去虚拟镶嵌，同时形成相邻的活性大马士革。

44. 发明授权

US06736701B1 Eliminate broken line damage of copper after CMP 失效
标题翻译：消除CMP后的铜线损伤
公开(公告)号：US06736701B1
公开(公告)日：2004-05-18
申请号：US09989838
申请日：2001-11-20
申请人： Shau-Lin Shue , Ying-Ho Chen , Wen-Chih Chiou , Tsu Shih , Syun-Ming Jang
发明人： Shau-Lin Shue , Ying-Ho Chen , Wen-Chih Chiou , Tsu Shih , Syun-Ming Jang
IPC分类号： B24B100
CPC分类号： B24B37/042 , B24B21/04
摘要： A new method is provided for the post-deposition treatment of copper lines. A damascene copper line pattern whereby a TaN barrier layer and a seed layer have been provided is polished. Under the first embodiment of the invention, the deposited copper is polished (Cu CMP), the surface of the wafer is rinsed using a first High Flow DI rinse that contains a TBA inhibitor. The TaN CMP is performed immediately following the first High Flow DI rinse. A second High Flow DI rinse is applied using DI water that contains TBA inhibitor. The required following rinse step is executed immediately after the second High Flow DI rinse has been completed. Under the second embodiment of the invention, the process of CMP has been divided in two distinct steps where the first step is aimed at corrosion elimination and the second step is aimed at elimination of mechanical damage to the polished copper. The processing conditions for the second processing step have been extended and optimized, thereby using a second belt of a CMP apparatus.
摘要翻译：提供了一种新的铜线后处理方法。抛光已经提供TaN阻挡层和种子层的镶嵌铜线图案。在本发明的第一实施例中，抛光沉积的铜（Cu CMP），使用含有TBA抑制剂的第一高流量DI冲洗冲洗晶片的表面。在第一次高流量DI冲洗之后立即执行TaN CMP。使用含有TBA抑制剂的去离子水进行第二次高流量DI冲洗。第二次高流量DI冲洗完成后立即执行所需的冲洗步骤。在本发明的第二个实施方案中，CMP的方法分为两个不同的步骤，其中第一步骤旨在消除腐蚀，第二步骤旨在消除抛光铜的机械损伤。第二处理步骤的处理条件已被扩展和优化，从而使用CMP设备的第二带。

45. 发明授权

US06635211B2 Reinforced polishing pad for linear chemical mechanical polishing and method for forming 有权
公开(公告)号：US06635211B2
公开(公告)日：2003-10-21
申请号：US09888789
申请日：2001-06-25
申请人： Wen-Chih Chiou , Ying-Ho Chen , Tsu Shih , Syun-Ming Jang
发明人： Wen-Chih Chiou , Ying-Ho Chen , Tsu Shih , Syun-Ming Jang
IPC分类号： B29C3912
CPC分类号： B29C39/025 , B24B37/042 , B29C70/64 , B29C2793/009 , B29K2105/126 , B29K2105/128 , B29K2105/16 , B29L2031/709 , B29L2031/736
摘要： A continuous loop polishing pad that is reinforced by a reinforcing filler and a method for fabricating the polishing pad are described. The reinforced polishing pad is constructed by a sub-layer and a top layer, wherein the sub-layer defines an inner diameter of the polishing pad and contains a reinforcing filler with an aspect ratio of at least 10 oriented substantially in a circumferential direction of the continuous loop polishing pad. The top layer is laminated to the sub-layer with a top surface defining an outer diameter of the polishing pad, while both the sub-layer and the top layer are formed of a polymeric material. The invention further describes a method for fabricating the reinforced polishing pad in a continuous loop.

46. 发明授权

US06383930B1 Method to eliminate copper CMP residue of an alignment mark for damascene processes 有权
标题翻译：消除用于镶嵌工艺的对准标记的铜CMP残留物的方法
公开(公告)号：US06383930B1
公开(公告)日：2002-05-07
申请号：US09902896
申请日：2001-07-12
申请人： Ying-Ho Chen , Wen-Chih Chiou , Tsu Shih , Syun-Ming Jang
发明人： Ying-Ho Chen , Wen-Chih Chiou , Tsu Shih , Syun-Ming Jang
IPC分类号： H01K2144
CPC分类号： H01L21/76885 , H01L21/7684 , H01L21/76877 , H01L23/544 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： A new method is provided that affects the polishing rate of the surface of a layer of copper, that has been deposited over the surface of a layer of dielectric. Copper damascene structures have been created in the surface of the layer of dielectric, the layer of dielectric also overlies an alignment mark. The surface of the layer of dielectric that is aligned with the alignment mark is provided with dummy damascene structures, assuring equal polishing rates for active damascene structures and the surface region of the layer of dielectric overlying an alignment mark.
摘要翻译：提供了一种新的方法，其影响已经沉积在电介质层的表面上的铜层的表面的抛光速率。在电介质层的表面已经形成铜镶嵌结构，电介质层也覆盖对准标记。与对准标记对准的电介质层的表面设置有虚拟镶嵌结构，确保活性镶嵌结构的相同抛光速率和覆盖对准标记的电介质层的表面区域。

47. 发明授权

US5445790A Process for densifying powder metallurgical product 失效
标题翻译：粉末冶金产品致密化工艺
公开(公告)号：US5445790A
公开(公告)日：1995-08-29
申请号：US238716
申请日：1994-05-05
申请人： Chen-Ti Hu , Wen-Chih Chiou
发明人： Chen-Ti Hu , Wen-Chih Chiou
IPC分类号： C22C1/04 , B32F3/12
CPC分类号： C22C1/0491
摘要： A process for densifying a powder metallurgical product comprising steps of preparing a powdery starting material, pre-sintering the powdery starting material at a relatively low temperature, executing a pore-eliminating process for eliminating pores resulting from the preceding step on the powdery starting material, and sintering the powdery starting material at a relatively high temperature. It is beneficial to produce a product having a large dimension, a desired shape, and excellent mechanical properties, and being appropriate for or capable of suffering any post-treatment.
摘要翻译：一种用于致密化粉末冶金产品的方法，包括以下步骤：制备粉末状起始材料，在相对低的温度下预烧结粉末原料，执行用于消除粉末原料上的前述步骤产生的孔的孔隙消除过程，并在相对高的温度下烧结粉末原料。生产具有大尺寸，期望形状和优异的机械性能并且适于或能够进行任何后处理的产品是有益的。

48. 发明授权

US09006101B2 Interconnect structure and method 有权
标题翻译：互连结构和方法
公开(公告)号：US09006101B2
公开(公告)日：2015-04-14
申请号：US13601265
申请日：2012-08-31
申请人： Hsin-Yu Chen , Ku-Feng Yang , Tasi-Jung Wu , Lin-Chih Huang , Yuan-Hung Liu , Tsang-Jiuh Wu , Wen-Chih Chiou
发明人： Hsin-Yu Chen , Ku-Feng Yang , Tasi-Jung Wu , Lin-Chih Huang , Yuan-Hung Liu , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L21/00 , H01L21/768 , H01L23/48 , H01L23/532 , H01L23/31
CPC分类号： H01L23/528 , H01L21/76807 , H01L23/3114 , H01L23/3171 , H01L23/481 , H01L23/5226 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/5384 , H01L27/0617 , H01L2221/1031 , H01L2224/13 , H01L2924/13091 , H01L2924/00
摘要： An apparatus comprises an interlayer dielectric layer formed on a first side of a substrate, a first metallization layer formed over the interlayer dielectric layer, wherein the first metallization layer comprises a first metal line and a dielectric layer formed over the first metallization layer, wherein the dielectric layer comprises a metal structure having a bottom surface coplanar with a top surface of the first metal line.
摘要翻译：一种装置包括形成在衬底的第一侧上的层间绝缘层，形成在层间介电层上的第一金属化层，其中第一金属化层包括形成在第一金属化层上的第一金属线和介电层，其中，电介质层包括具有与第一金属线的顶表面共面的底表面的金属结构。

49. 发明授权

US08803322B2 Through substrate via structures and methods of forming the same 有权
标题翻译：通过基底通孔结构及其形成方法
公开(公告)号：US08803322B2
公开(公告)日：2014-08-12
申请号：US13272506
申请日：2011-10-13
申请人： Ku-Feng Yang , Tsang-Jiuh Wu , Yi-Hsiu Chen , Ebin Liao , Yuan-Hung Liu , Wen-Chih Chiou
发明人： Ku-Feng Yang , Tsang-Jiuh Wu , Yi-Hsiu Chen , Ebin Liao , Yuan-Hung Liu , Wen-Chih Chiou
IPC分类号： H01L23/48
CPC分类号： H01L23/5226 , H01L21/76879 , H01L21/76898 , H01L23/481 , H01L24/05 , H01L2224/05006 , H01L2224/05009 , H01L2224/05546 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要： The embodiments of forming a through substrate via (TSV) structure described enable reducing risk of damaging gate structures due to over polishing of an inter-level dielectric layer (ILD) layer. The TSV structure with a wider opening near one end also enables better gapfill.
摘要翻译：形成通过（TSV）通孔的结构的实施例能够降低由于层间电介质层（ILD）层的过度抛光而损坏栅极结构的风险。在一端附近具有较宽开口的TSV结构还可实现更好的间隙填充。

50. 发明授权

US08803316B2 TSV structures and methods for forming the same 有权
标题翻译： TSV结构及其形成方法
公开(公告)号：US08803316B2
公开(公告)日：2014-08-12
申请号：US13311692
申请日：2011-12-06
申请人： Yung-Chi Lin , Hsin-Yu Chen , Wen-Chih Chiou , Ku-Feng Yang , Tsang-Jiuh Wu , Jing-Cheng Lin
发明人： Yung-Chi Lin , Hsin-Yu Chen , Wen-Chih Chiou , Ku-Feng Yang , Tsang-Jiuh Wu , Jing-Cheng Lin
IPC分类号： H01L23/48
CPC分类号： H01L23/49827 , H01L21/76879 , H01L21/76885 , H01L21/76898 , H01L23/481 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05556 , H01L2224/05558 , H01L2224/0557 , H01L2224/11011 , H01L2224/13025 , H01L2224/131 , H01L2224/1405 , H01L2224/14104 , H01L2224/73204 , H01L2924/01028 , H01L2924/0132 , H01L2924/067 , H01L2924/0705 , H01L2924/181 , H01L2924/00 , H01L2924/014 , H01L2924/00012
摘要： A device includes a substrate having a front side and a backside, a through-via extending from the backside to the front side of the substrate, and a conductive pad on the backside of the substrate and over the through-via. The conductive pad has a substantially planar top surface. A conductive bump has a non-planar top surface over the substantially planar top surface and aligned to the through-via. The conductive bump and the conductive pad are formed of a same material. No interface is formed between the conductive bump and the conductive pad.
摘要翻译：一种器件包括具有正面和背面的衬底，从衬底的背面延伸到前侧的通孔，以及位于衬底的背面和通孔上方的导电焊盘。导电垫具有基本平坦的顶表面。导电凸块在基本上平坦的顶表面上方具有非平面的顶表面，并且与通孔对准。导电凸块和导电垫由相同的材料形成。在导电凸块和导电垫之间不形成界面。

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