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41. 发明授权

US07016441B1 Bit synchronizing circuit 失效
标题翻译：位同步电路
公开(公告)号：US07016441B1
公开(公告)日：2006-03-21
申请号：US09593945
申请日：2000-06-15
申请人： Hitoshi Naoe
发明人： Hitoshi Naoe
IPC分类号： H04L7/00
CPC分类号： H04L7/0338
摘要： An object of the invention is to provide a bit synchronizing circuit of high quality comprising a bit synchronizing circuit used in a reception circuit for serial communication having a polyphase clock generation circuit for generating a plurality of clocks which are out of phase with each other by a substantially regular interval, based on an input clock and a detection circuit for detecting which clock has a phase shift of an integral multiple of a clock cycle among the clocks generated by the polyphase clock generation circuit with respect to the input clock.
摘要翻译：本发明的目的是提供一种高质量的比特同步电路，其包括用于串行通信的接收电路中使用的位同步电路，具有多相时钟生成电路，用于产生彼此异相的多个时钟基本上规则的间隔，基于输入时钟和检测电路，用于检测哪个时钟具有由多相时钟产生电路相对于输入时钟产生的时钟之间的时钟周期的整数倍的相移。

42. 发明授权

US06850580B1 Bit synchronizing circuit 失效
标题翻译：位同步电路
公开(公告)号：US06850580B1
公开(公告)日：2005-02-01
申请号：US09598158
申请日：2000-06-21
申请人： Hitoshi Naoe
发明人： Hitoshi Naoe
IPC分类号： H04L7/02 , H04L7/033 , H04L7/00
CPC分类号： H04L7/0338 , H04L7/005
摘要： A bit synchronizing circuit used in a reception circuit for serial communication comprises a data sampling circuit for over-sampling inputted data, a change point detecting circuit for detecting a change point of the inputted data based on an output from the data sampling circuit, a change point holding circuit for changing a held value stepwise in the case where the output from the change point detecting circuit is different from the held data, a selected value setting circuit for determining which value of the data sampling circuit is to be selected based on the output of the change point holding circuit and a data selecting circuit for selecting the data from the data sampling circuit based on the output of the selected value setting circuit. It alternatively may comprise a data sampling circuit for over-sampling the bit data, a synchronizing circuit, a change point detecting circuit, and a data selecting circuit.
摘要翻译：用于串行通信的接收电路中使用的位同步电路包括用于对输入数据进行过采样的数据采样电路，用于基于数据采样电路的输出来检测输入数据的变化点的变化点检测电路，点保持电路，用于在变化点检测电路的输出与保持数据不同的情况下逐步改变保持值;选择值设置电路，用于基于输出来确定要选择数据采样电路的哪个值以及数据选择电路，用于根据所选择的值设定电路的输出从数据取样电路中选择数据。或者可以包括用于对比特数据进行过采样的数据采样电路，同步电路，变化点检测电路和数据选择电路。

43. 发明申请

US20090067854A1 OPTICAL SPACE COMMUNICATION RECEPTION CIRCUIT, OPTICAL SPACE COMMUNICATION DEVICE, OPTICAL SPACE COMMUNICATION SYSTEM, AND ELECTRONIC DEVICE 审中-公开
标题翻译：光学通信接收电路，光通信设备，光通信系统和电子设备
公开(公告)号：US20090067854A1
公开(公告)日：2009-03-12
申请号：US12129493
申请日：2008-05-29
申请人： Naruichi YOKOGAWA , Takeshi Nishino , Hitoshi Naoe
发明人： Naruichi YOKOGAWA , Takeshi Nishino , Hitoshi Naoe
IPC分类号： H04B10/06
CPC分类号： H04B10/1141
摘要： An optical space communication reception circuit receives a signal in switched-over communication speed modes and under settings corresponding to the communication speed modes. Receiver sensitivity in the respective communication speed modes is set in advance such that maximum communicable distances in the communication speed modes are substantially equal. By this, it becomes possible, for example, in optical space transmission such as infrared communication and the like to enhance a false operation prevention characteristic against disturbance noise, without decreasing maximum communicable distances.
摘要翻译：光学空间通信接收电路接收切换通信速度模式和对应于通信速度模式的设置的信号。预先设定各通信速度模式中的接收机灵敏度，使得通信速度模式中的最大可通信距离基本相等。由此，例如在诸如红外线通信等的光学空间传输中，可以在不降低最大通信距离的情况下增强防止干扰噪声的假操作防止特性。

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