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41. 发明授权

US4779223A Display apparatus having an image memory controller utilizing a barrel shifter and a mask controller preparing data to be written into an image memory 失效
标题翻译：具有利用桶形移位器的图像存储器控制器和掩模控制器的显示装置，其准备要写入图像存储器的数据
公开(公告)号：US4779223A
公开(公告)日：1988-10-18
申请号：US816308
申请日：1986-01-06
申请人： Nobuteru Asai , Tadashi Kuwabara , Yasuo Sakai
发明人： Nobuteru Asai , Tadashi Kuwabara , Yasuo Sakai
IPC分类号： G06F3/153 , G09G5/22 , G09G5/24 , G09G5/393 , G06F3/14
CPC分类号： G09G5/393
摘要： A data processing apparatus for image display includes a character generator, a bit map type image memory, a CPU for accessing the character generator and the image memory to control the data stored in the image memory, a display, and a display controller for reading out the data stored in the image memory in accordance with a command from the CPU and supplying the readout data to the display. The image display apparatus further includes an image memory controller having a barrel shifter for parallelly shifting the data supplied from the CPU by a designated number of bits, a mask controller for outputting a mask data to restrict a write range of the data supplied from the CPU and a write controller for operatively combining the data from the barrel shifter and the data read from the image memory in accordance with the mask data to prepare a write data and supplying the write data to the image memory.
摘要翻译：用于图像显示的数据处理装置包括字符发生器，位图型图像存储器，用于访问字符发生器的CPU和用于控制存储在图像存储器中的数据的图像存储器，显示器和用于读出的显示控制器根据来自CPU的命令存储在图像存储器中的数据并将读出的数据提供给显示器。图像显示装置还包括具有桶形移位器的图像存储器控制器，用于将从CPU提供的数据并行地移位指定的位数;掩模控制器，用于输出掩模数据，以限制从CPU提供的数据的写入范围以及写入控制器，用于根据掩模数据可操作地组合来自桶形移位器的数据和从图像存储器读取的数据，以准备写入数据并将写入数据提供给图像存储器。

42. 发明授权

US4430656A Method for reducing print distortion of ink drop writing apparatus 失效
标题翻译：降低墨滴写入装置打印失真的方法
公开(公告)号：US4430656A
公开(公告)日：1984-02-07
申请号：US332248
申请日：1981-12-18
申请人： Takahiro Yamada , Tadashi Kuwabara
发明人： Takahiro Yamada , Tadashi Kuwabara
IPC分类号： B41J2/08 , B41J2/075 , G01D9/00
CPC分类号： B41J2/075
摘要： A method and apparatus for writing information on a writing medium with ink drops which are sequentially generated, selectively charged in accordance with the information, and directed toward the writing medium so as to impinge thereon in column form for representing the information as a continuing mark formed by a sequence of charged ink drops. A predetermined number of uncharged dummy drops is utilized for each column, and a single uncharged dummy drop is inserted only at selected locations and in a predetermined order with respect to the drop portion of the column for eliminating merging of adjacent charged ink drops when a uncharged dummy drop is inserted therebetween. An insertion location for inserting an uncharged dummy drop is initially determined between the first and last two adjacent charged ink drops, respectively, of each sequence of charged ink drops along the column and the sequentially generated ink drops are selectively charged so as to insert the uncharged dummy drops at the determined locations of the column.
摘要翻译：一种在具有墨滴的书写介质上写入信息的方法和装置，所述墨滴依次产生，根据该信息选择性地被充电，并且朝向写入介质以列形式冲击，以形成信息作为形成的连续标记通过一系列带电的墨滴。对于每列使用预定数量的不带电虚拟液滴，并且单个不带电虚拟液滴仅在选定位置和相对于色谱柱的液滴部分的预定顺序插入，以消除当不带电时相邻的带电墨滴的合并在其间插入虚滴。用于插入不带电虚拟液滴的插入位置最初分别在沿着柱的每个带电墨滴序列的第一个和最后两个相邻的带电墨滴之间确定，并且顺序产生的墨滴被选择性地充电以插入不带电在列的确定位置处的虚拟液滴。

43. 发明授权

US07339895B2 Gateway device and control method for communication with IP and IPV6 protocols 失效
标题翻译：用于与IP和IPV6协议通信的网关设备和控制方法
公开(公告)号：US07339895B2
公开(公告)日：2008-03-04
申请号：US10199291
申请日：2002-07-19
申请人： Tomochika Ozaki , Tadashi Kuwabara , Isao Nakagawa , Hiromichi Ito
发明人： Tomochika Ozaki , Tadashi Kuwabara , Isao Nakagawa , Hiromichi Ito
IPC分类号： H04L12/26 , H04L12/28 , H04J3/16
CPC分类号： H04L29/12018 , H04L12/2805 , H04L29/12009 , H04L61/10 , H04L69/08 , H04L69/16 , H04L69/167 , H04L69/169
摘要： A non-IP device holds an interface ID defined by Ipv6. A gateway generates and holds an Ipv6 address for the non-IP device. The gateway serves to convert the protocol of a packet destined to the non-IP device from a portable telephone or a personal computer coupled to an internet into the protocol for a network connected to the non-IP device and transmit the packet to the non-IP device.
摘要翻译：非IP设备保存由Ipv6定义的接口ID。网关生成并保存非IP设备的Ipv6地址。该网关用于将去往非IP设备的分组的协议从耦合到因特网的便携式电话或个人计算机转换成用于连接到非IP设备的网络的协议，并将分组发送到非IP设备， IP设备。

44. 发明申请

US20060240295A1 Method and device for decontamination air for fuel cell, and fuel cell 审中-公开
标题翻译：用于燃料电池和燃料电池去污空气的方法和装置
公开(公告)号：US20060240295A1
公开(公告)日：2006-10-26
申请号：US11472385
申请日：2006-06-22
申请人： Hisashi Mori , Yasushige Shigyo , Tadashi Kuwabara , Hiroshi Chizawa , Tsutomu Aoki
发明人： Hisashi Mori , Yasushige Shigyo , Tadashi Kuwabara , Hiroshi Chizawa , Tsutomu Aoki
IPC分类号： H01M8/04 , B01D53/02
CPC分类号： B01D53/04 , B01D2253/102 , B01D2253/108 , B01D2253/11 , B01D2253/202 , B01D2253/206 , B01D2253/342 , B01D2257/302 , B01D2257/304 , B01D2257/90 , B01D2258/0208 , H01M8/0662 , H01M8/0675 , H01M8/0687
摘要： A method of air decontamination for fuel cell to remove contaminants, reducing cell performance in air to be supplied to a fuel cell by treating the air so that the concentration of a sulfur compound is reduced to 5 ppb or less by removing the sulfur compound in the air. By reducing the concentration of the sulfur compound in the fuel-cell air to 5 ppb or less, the electromotive-force reduction in the fuel cell caused by the fuel-cell electromotive-force-reducing impurities in the fuel-cell air can be substantially completely prevented to stably maintain the characteristics of the fuel cell for a long period of time and to extend the lifetime thereof.
摘要翻译：一种用于燃料电池去除污染物的空气净化方法，通过处理空气来降低要供应到燃料电池的空气中的电池性能，使得通过除去硫化合物中的硫化合物将硫化合物的浓度降低至5ppb以下空气。通过将燃料电池空气中的硫化合物的浓度降低至5ppb以下，由燃料电池用空气中的燃料电池电动势减少杂质引起的燃料电池的电动势减少可以基本上完全防止燃料电池的长时间稳定地维持并延长其寿命。

45. 发明授权

US06643189B2 Memory device 失效
公开(公告)号：US06643189B2
公开(公告)日：2003-11-04
申请号：US10059328
申请日：2002-01-31
申请人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
发明人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
IPC分类号： G11C1300
CPC分类号： G11C11/4076 , G06T1/60 , G11C7/1006
摘要： A memory device which includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data, and a controller having a first data input connected to receive first data, a second data input connected to receive second data, a third data input connected to receive a function mode signal, and operation unit for executing operations between the first data and the second data. The operation unit includes a function setting unit for setting a function indicated by a function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the set function is executed for the first and second data. The operation result is written into the selected part of the storage locations during one memory cycle.

46. 发明授权

US06314467B1 Method of sending and receiving information and system using such method 失效
标题翻译：使用这种方法发送和接收信息和系统的方法
公开(公告)号：US06314467B1
公开(公告)日：2001-11-06
申请号：US08989324
申请日：1997-12-11
申请人： Shigeki Hirasawa , Michio Morioka , Tadashi Kuwabara , Tomochika Ozaki , Yuichi Yagawa , Akio Yajima
发明人： Shigeki Hirasawa , Michio Morioka , Tadashi Kuwabara , Tomochika Ozaki , Yuichi Yagawa , Akio Yajima
IPC分类号： G06F1516
CPC分类号： G06Q30/02 , H04L29/06 , H04L67/30 , H04L67/306 , H04L69/06 , H04L69/329
摘要： In an information sending and receiving system in which an information sending equipment and at least one information receiving equipment send and receive information through a transmission medium, a management message is sent from the information sending equipment to the information receiving equipment thereby to create a list of a content code expressing a data message registered on the information receiving equipment side within the information receiving equipment. Then, a data message containing a content code and data is transmitted from the information sending equipment to the information receiving equipment. The information receiving equipment selects a data message by comparing a content code of a data message and a list of its own content code. The content code list may be created within the information sending equipment based on a property value in an answer message from the information receiving equipment.
摘要翻译：在其中信息发送设备和至少一个信息接收设备通过传输介质发送和接收信息的信息发送和接收系统中，从信息发送设备向信息接收设备发送管理消息，从而创建列表表示在信息接收设备内的信息接收设备侧注册的数据消息的内容代码。然后，将包含内容代码和数据的数据消息从信息发送设备发送到信息接收设备。信息接收设备通过比较数据消息的内容代码和其自己的内容代码的列表来选择数据消息。可以基于来自信息接收设备的应答消息中的属性值在信息发送设备内创建内容代码列表。

47. 发明授权

US6028795A One chip semiconductor integrated circuit device having two modes of data write operation and bits setting operation 失效
标题翻译：具有两种模式的数据写入操作和位设置操作的单芯片半导体集成电路器件
公开(公告)号：US6028795A
公开(公告)日：2000-02-22
申请号：US303442
申请日：1999-05-03
申请人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
发明人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
IPC分类号： G11C5/06 , G11C7/00 , G11C13/00
CPC分类号： G11C11/4076 , G06T1/60 , G11C7/1006
摘要： A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data. The result of the execution is written into the selected part of the storage locations via the input of the dynamic random access memories during one memory cycle.
摘要翻译：形成在IC芯片上的存储器件包括用于进行数据读取和写入操作的动态随机存取存储器，用于从IC芯片的外部侧接收数据的第一和第二数据端子以及具有连接到IC芯片的第一数据输入端的控制器用于接收第一数据的数据终端，连接以接收第二数据读取的第二输入，连接到第二数据终端以接收功能模式信号的第三数据输入，以及用于执行从第一数据输入提供的第一数据之间的操作的操作单元以及从第二输入提供的第二数据。操作单元包括功能设置单元，其响应于在接收到第一数据之前设置由功能模式信号指示的功能的功能模式信号。从存储位置的选定部分读出第二数据。对于第一和第二数据执行与由功能设置单元设置的功能相对应的操作。在一个存储器周期期间，通过动态随机存取存储器的输入将执行的结果写入存储位置的所选部分。

48. 发明授权

US5923591A Memory circuit 失效
标题翻译：存储电路
公开(公告)号：US5923591A
公开(公告)日：1999-07-13
申请号：US55327
申请日：1998-04-05
申请人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
发明人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
IPC分类号： G11C13/00
CPC分类号： G11C7/1006
摘要： A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data. The result of the execution is written into the selected part of the storage locations via the input of the dynamic random access memories during one memory cycle.
摘要翻译：形成在IC芯片上的存储器件包括用于进行数据读取和写入操作的动态随机存取存储器，用于从IC芯片的外部侧接收数据的第一和第二数据端子以及具有连接到IC芯片的第一数据输入端的控制器用于接收第一数据的数据终端，连接以接收第二数据读取的第二输入，连接到第二数据终端以接收功能模式信号的第三数据输入，以及用于执行从第一数据输入提供的第一数据之间的操作的操作单元以及从第二输入提供的第二数据。操作单元包括功能设置单元，其响应于在接收到第一数据之前设置由功能模式信号指示的功能的功能模式信号。从存储位置的选定部分读出第二数据。对于第一和第二数据执行与由功能设置单元设置的功能相对应的操作。在一个存储器周期期间，通过动态随机存取存储器的输入将执行的结果写入存储位置的所选部分。

49. 发明授权

US5867281A Electronic mail system and method 失效
标题翻译：电子邮件系统和方法
公开(公告)号：US5867281A
公开(公告)日：1999-02-02
申请号：US576308
申请日：1995-12-21
申请人： Takahiko Nozoe , Hideki Kuwamoto , Chiyo Akamatsu , Tadashi Kuwabara
发明人： Takahiko Nozoe , Hideki Kuwamoto , Chiyo Akamatsu , Tadashi Kuwabara
IPC分类号： G06F13/00 , H04N1/00 , G06F9/445
CPC分类号： G06Q10/107
摘要： An electronic mail system and method enabling a recipient of electronic mail to intuitively and easily perform the processing requested by the sender in the electronic mail. The sender of the electronic mail with the system of the present invention generates information including icons information representing processing functions and operations to be performed by the recipient of the electronic mail and attaches the generated information as added information to the message of the electronic mail to be sent so that appropriate processing is effected by the recipient.
摘要翻译：一种电子邮件系统和方法，使得电子邮件的接收者能够直观且容易地执行电子邮件中的发送者所请求的处理。具有本发明的系统的电子邮件的发送者生成包括表示处理功能的图标信息的信息和由电子邮件的接收者执行的操作，并将生成的信息作为附加信息附加到电子邮件的消息中发送，以便受理人进行适当的处理。

50. 发明授权

US5493528A Memory device 失效
公开(公告)号：US5493528A
公开(公告)日：1996-02-20
申请号：US435959
申请日：1995-05-05
申请人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
发明人： Koichi Kimura , Toshihiko Ogura , Hiroaki Aotsu , Mitsuru Ikegami , Tadashi Kuwabara , Hiromichi Enomoto , Tadashi Kyoda
IPC分类号： G06F7/575 , G06T1/20 , G06T1/60 , G09G5/393 , G11C13/00
CPC分类号： G06T1/20 , G06F7/575 , G06T1/60 , G09G5/393 , G09G2340/10
摘要： A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data. The result of the execution is written into the selected part of the storage locations via the input of the dynamic random access memories during one memory cycle.

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