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41. 发明授权

US06433393B1 Semiconductor protective device and method for manufacturing same 失效
标题翻译：半导体保护装置及其制造方法
公开(公告)号：US06433393B1
公开(公告)日：2002-08-13
申请号：US09659067
申请日：2000-09-11
申请人： Kaoru Narita
发明人： Kaoru Narita
IPC分类号： H01L2362
CPC分类号： H01L27/0262 , H01L29/7436 , H01L29/87 , H01L2924/0002 , H01L2924/00
摘要： The distance between an anode and a cathode of a thyristor and the anode and the cathode of a diode formed in a semiconductor protective circuit are made a small as allowable by LSI manufacturing technology, thereby achieving fast starting speed and a low internal resistance when in the conducting condition, so as to limit the rise in voltage on an internal circuit, even when a high-speed pulse is applied.
摘要翻译：晶闸管的阳极和阴极之间的距离以及形成在半导体保护电路中的二极管的阳极和阴极之间的距离被制造为通过LSI制造技术允许的小，从而当在...的制造技术中实现快速启动速度和低内阻导通条件，即使施加高速脉冲也能够限制内部电路的电压上升。

42. 发明授权

US06275367B1 Semiconductor circuit device with high electrostatic breakdown endurance 有权
标题翻译：具有高静电击穿耐久性的半导体电路器件
公开(公告)号：US06275367B1
公开(公告)日：2001-08-14
申请号：US09323518
申请日：1999-06-01
申请人： Kaoru Narita , Takeo Fujii
发明人： Kaoru Narita , Takeo Fujii
IPC分类号： H02H320
CPC分类号： H01L27/0248
摘要： In a semiconductor circuit device, an internal circuit, a common wiring pattern, a plurality of external terminals including a ground terminal, and a plurality of protection elements is provided. Each of the plurality of protection elements is connected to one of the plurality of external terminals and the common wiring pattern. Each protection element includes a clamp circuit. The clamp circuit of each of the plurality of protection elements respectively connected to the plurality of external terminals other than the ground terminal has a clamp voltage higher than a power supply voltage supplied to the internal circuit. On the other hand, the clamp circuit of the protection element connected to the ground terminal as a ground terminal clamp circuit has a clamp voltage lower than those of the clamp circuits other than the ground terminal clamp circuit.
摘要翻译：在半导体电路装置中，设置有内部电路，公共布线图案，包括接地端子的多个外部端子以及多个保护元件。多个保护元件中的每一个连接到多个外部端子和公共布线图案中的一个。每个保护元件包括钳位电路。分别连接到除了接地端子之外的多个外部端子的多个保护元件中的每一个的钳位电路具有高于提供给内部电路的电源电压的钳位电压。另一方面，与作为接地端子钳位电路的接地端子连接的保护元件的钳位电路的钳位电压比除接地端子钳位电路以外的钳位电路的钳位电压低。

43. 发明授权

US6081013A Semiconductor device having a reduced distance between the input resistor and the internal circuit 有权
标题翻译：具有减小输入电阻器和内部电路之间距离的半导体器件
公开(公告)号：US6081013A
公开(公告)日：2000-06-27
申请号：US159788
申请日：1998-09-24
申请人： Kaoru Narita
发明人： Kaoru Narita
IPC分类号： H01L21/822 , H01L21/8234 , H01L27/02 , H01L27/04 , H01L27/088 , H01L29/78 , H01L23/62
CPC分类号： H01L27/0251
摘要： In a semiconductor device including a semiconductor substrate, first and second external terminals, a first impurity diffusion region connected to the first external terminal, and second and third impurity diffusion regions forming a MIS transistor, one of the second and third impurity diffusion regions facing the first impurity region is connected to the second external terminal. The distance between the first diffusion region and the MIS transistor is substantially smaller than a certain value compared to conventional devices.
摘要翻译：在包括半导体衬底，第一和第二外部端子的半导体器件中，连接到第一外部端子的第一杂质扩散区域和形成MIS晶体管的第二和第三杂质扩散区域，第二和第三杂质扩散区域中的一个面向第一杂质区连接到第二外部端子。与常规器件相比，第一扩散区域和MIS晶体管之间的距离显着小于特定值。

44. 发明授权

US5973901A Semiconductor circuit device with high electrostatic breakdown endurance 失效
标题翻译：具有高静电击穿耐久性的半导体电路器件
公开(公告)号：US5973901A
公开(公告)日：1999-10-26
申请号：US904917
申请日：1997-08-01
申请人： Kaoru Narita , Takeo Fujii
发明人： Kaoru Narita , Takeo Fujii
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H02H3/22
CPC分类号： H01L27/0248
摘要： In a semiconductor circuit device, an internal circuit, a common wiring pattern, a plurality of external terminals including a ground terminal, and a plurality of protection elements is provided. Each of the plurality of protection elements is connected to one of the plurality of external terminals and the common wiring pattern. Each protection element includes a clamp circuit. The clamp circuit of each of the plurality of protection elements respectively connected to the plurality of external terminals other than the ground terminal has a clamp voltage higher than a power supply voltage supplied to the internal circuit. On the other hand, the clamp circuit of the protection element connected to the ground terminal as a ground terminal clamp circuit has a clamp voltage lower than those of the clamp circuits other than the ground terminal clamp circuit.
摘要翻译：在半导体电路装置中，设置有内部电路，公共布线图案，包括接地端子的多个外部端子以及多个保护元件。多个保护元件中的每一个连接到多个外部端子和公共布线图案中的一个。每个保护元件包括钳位电路。分别连接到除了接地端子之外的多个外部端子的多个保护元件中的每一个的钳位电路具有高于提供给内部电路的电源电压的钳位电压。另一方面，与作为接地端子钳位电路的接地端子连接的保护元件的钳位电路的钳位电压比除接地端子钳位电路以外的钳位电路的钳位电压低。

45. 发明授权

US5953191A Protection circuit against electrostatic charge applied between power supply terminals for preventing internal circuit therefrom regardless of polarity thereof 失效
标题翻译：防止电源端子之间施加的静电电荷的保护电路，用于防止其内部电路，而不管其极性如何
公开(公告)号：US5953191A
公开(公告)日：1999-09-14
申请号：US16636
申请日：1998-01-30
申请人： Kaoru Narita
发明人： Kaoru Narita
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8238 , H01L27/02 , H01L27/06 , H01L27/092 , H02H9/00
CPC分类号： H01L27/0248 , H01L2924/0002
摘要： Voltage clamping elements are respectively paired with first diodes, and the pairs of voltage clamping elements/first diodes are connected between a first common discharge line and power terminals selectively supplied with positive power voltage and ground voltage; however, the pairs of voltage clamping elements/first diodes can not prevent an internal circuit from excess voltage if a positive electrostatic pulse with respect to the positive power voltage is applied to the ground terminal; second diodes are connected between a second common discharge line and the terminals in such a manner as to discharge the positive electrostatic pulse through the associated forward-biased second diodes, and the internal circuit is perfectly prevented from the excess voltage.
摘要翻译：电压钳位元件分别与第一二极管配对，并且成对的电压钳位元件/第一二极管连接在第一公共放电线路和选择性地提供正电源电压和接地电压的电源端子之间; 然而，如果对接地端子施加相对于正电源电压的正静电脉冲，则成对的电压钳位元件/第一二极管不能防止内部电路过剩电压; 第二二极管以这样的方式连接在第二公共放电线和端子之间，以便通过相关联的正向偏置的第二二极管放电正静电脉冲，并且内部电路被完全防止过电压。

46. 发明授权

US5844281A Semiconductor integrated circuit device with electrostatic protective function 失效
标题翻译：具有静电保护功能的半导体集成电路器件
公开(公告)号：US5844281A
公开(公告)日：1998-12-01
申请号：US585864
申请日：1996-01-11
申请人： Kaoru Narita
发明人： Kaoru Narita
IPC分类号： H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/02 , H01L27/04 , H01L27/088 , H01L27/092 , H01L23/62
CPC分类号： H01L27/0288 , H01L2924/0002
摘要： An input terminal and an input protective resistor of an N-type diffusion layer connected thereto are provided on a P-type semiconductor substrate. First and second N-type MOS transistors for internal circuit are connected to a grounding wiring at respective source diffusion layers. The first MOS transistor is located at closer distance from the input protective resister than the second MOS transistor. The source diffusion layer of the first MOS transistor and the grounding wiring are connected via a high melting point metal layer wiring, such as a tungsten silicide or so forth to increase a resistance to improve electrostatic breakdown potential. Accordingly, the distance between the input protective resistor and the first MOS transistor can be made smaller to eliminate dead space around the input protective resistor to enable reduction of a chip area.
摘要翻译：在P型半导体衬底上设置有与其连接的N型扩散层的输入端子和输入保护电阻。用于内部电路的第一和第二N型MOS晶体管连接到各个源极扩散层处的接地布线。第一MOS晶体管位于比第二MOS晶体管更靠近输入保护电阻的距离处。第一MOS晶体管的源极扩散层和接地布线经由诸如硅化钨等的高熔点金属层布线连接，以增加电阻以提高静电击穿电位。因此，可以使输入保护电阻和第一MOS晶体管之间的距离更小，以消除输入保护电阻周围的死区，以减少芯片面积。

47. 发明授权

US5710452A Semiconductor device having electrostatic breakdown protection circuit 失效
标题翻译：具有静电击穿保护电路的半导体装置
公开(公告)号：US5710452A
公开(公告)日：1998-01-20
申请号：US627093
申请日：1996-04-03
申请人： Kaoru Narita
发明人： Kaoru Narita
IPC分类号： H01L29/78 , H01L27/02 , H01L27/06 , H01L23/62
CPC分类号： H01L27/0259
摘要： A semiconductor device includes a metallic main line connected between an external terminal and an internal circuit, and a plurality of divided protection bipolar transistors connected in parallel to one another. Each of the divided protection bipolar transistors includes a collector and an emitter composed of first and second N diffused regions formed in a semiconductor substrate which are separated from each other. Each of the divided protection bipolar transistors also includes a base formed of a portion of a semiconductor substrate between the collector and the emitter. The collector is connected to a metallic sub line branched from the main line, and the emitter is connected to ground. The plurality of divided protection bipolar transistors have an equal breakdown voltage between the collector of the divided protection bipolar transistor and the semiconductor substrate. Thus, the protection device composed of a plurality of divided protection bipolar transistors connected in parallel to one another can effectively protect the internal circuit from a short electrostatic pulse.
摘要翻译：半导体器件包括连接在外部端子和内部电路之间的金属主线以及彼此并联连接的多个分开的保护双极型晶体管。每个分压保护双极型晶体管包括集电极和由形成在半导体衬底中的彼此分离的第一和第二N个扩散区组成的发射极。每个分压保护双极晶体管还包括由集电极和发射极之间的半导体衬底的一部分形成的基极。集电极连接到从主线分支的金属副线，并且发射极连接到地。多个分压保护双极晶体管在分压保护双极晶体管的集电极和半导体衬底之间具有相等的击穿电压。因此，由彼此并联连接的多个分割保护双极晶体管组成的保护装置可以有效地保护内部电路免受短静电脉冲的影响。

48. 发明授权

US5449939A Semiconductor device having a protective transistor 失效
标题翻译：具有保护晶体管的半导体器件
公开(公告)号：US5449939A
公开(公告)日：1995-09-12
申请号：US364275
申请日：1994-12-27
申请人： Yoko Horiguchi , Kaoru Narita
发明人： Yoko Horiguchi , Kaoru Narita
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H01L29/06 , H01L29/78
CPC分类号： H01L27/0259
摘要： A semiconductor device has an internal circuit, an output transistor and a protective transistor for protecting the output transistor and the internal circuit against an ESD-induced destruction caused by a surge pulse entering from an input/output terminal. The sum of a first distance between a contact for connecting an input/output terminal with the collector of the protective transistor and a field oxide film and a second distance between a contact for connecting the input/output terminal with the emitter of the protective transistor and the field oxide film overlying the base of the laterally formed protective transistor is made smaller than the sum of a third distance between a contact for connecting the input/output terminal with the drain of the output transistor and the gate electrode of the output transistor and a fourth distance between a contact for connecting a potential line with the source of the output transistor and the gate electrode of the output transistor. Besides, the effective channel length of the output transistor is made longer than the effective base width of the protective transistor.
摘要翻译：半导体器件具有内部电路，输出晶体管和保护晶体管，用于保护输出晶体管和内部电路免受由输入/输出端子进入的浪涌脉冲引起的ESD引起的破坏。用于将输入/输出端子与保护晶体管的集电极连接的触头与场氧化膜之间的第一距离与用于将输入/输出端子与保护晶体管的发射极连接的触点之间的第二距离之和，以及使横向形成的保护晶体管的基部覆盖的场氧化膜小于用于将输入/输出端子与输出晶体管的漏极和输出晶体管的栅极连接的触点之间的第三距离和用于将电位线与输出晶体管的源极和输出晶体管的栅电极连接的触点之间的第四距离。此外，输出晶体管的有效沟道长度比保护晶体管的有效基极宽度长。

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