专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20080258141A1 Thin film transistor, method of manufacturing the same, and flat panel display having the same 有权
标题翻译：薄膜晶体管，其制造方法和具有该薄膜晶体管的平板显示器
公开(公告)号：US20080258141A1
公开(公告)日：2008-10-23
申请号：US12007085
申请日：2008-01-07
申请人： Jae-chul Park , Chang-jung Kim , Sun-il Kim , I-hun Song , Young-soo Park
发明人： Jae-chul Park , Chang-jung Kim , Sun-il Kim , I-hun Song , Young-soo Park
IPC分类号： H01L21/44 , H01L29/12
CPC分类号： H01L29/78618 , H01L29/78621 , H01L29/7869
摘要： A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.
摘要翻译：提供薄膜晶体管（TFT），制造TFT的方法以及包括TFT的平板显示器。 TFT包括栅极，与栅极接触的栅极绝缘层，与栅极绝缘层接触且与栅极绝缘层面对栅极的沟道层，接触沟道层的端部的源极; 以及与沟道层的另一端接触的漏极，其中，所述沟道层为非晶氧化物半导体层，所述源极和漏极中的每一个为包含氧化物半导体中具有导电杂质的氧化物半导体层的导电氧化物层层。源极和漏极可以进一步包含低电阻金属层。平板显示器的单位像素的驱动电路包括TFT。

42. 发明授权

US08324628B2 Channel layer for a thin film transistor, thin film transistor including the same, and methods of manufacturing the same 有权
标题翻译：用于薄膜晶体管的沟道层，包括该薄膜晶体管的薄膜晶体管及其制造方法
公开(公告)号：US08324628B2
公开(公告)日：2012-12-04
申请号：US12073102
申请日：2008-02-29
申请人： Sun-il Kim , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
发明人： Sun-il Kim , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
IPC分类号： H01L29/04 , H01L21/20
CPC分类号： H01L29/7869
摘要： Provided is a channel layer for a thin film transistor, a thin film transistor and methods of forming the same. A channel layer for a thin film transistor may include IZO (indium zinc oxide) doped with a transition metal. A thin film transistor may include a gate electrode and the channel layer formed on a substrate, a gate insulating layer formed between the gate electrode and channel layer, and a source electrode and a drain electrode which contact ends of the channel layer.
摘要翻译：提供了一种用于薄膜晶体管的沟道层，薄膜晶体管及其形成方法。用于薄膜晶体管的沟道层可以包括掺杂有过渡金属的IZO（氧化铟锌）。薄膜晶体管可以包括栅电极和形成在衬底上的沟道层，形成在栅极和沟道层之间的栅极绝缘层，以及与沟道层的端部接触的源电极和漏电极。

43. 发明申请

US20110141060A1 Optical touch panels and methods of driving the same 有权
标题翻译：光触摸面板及其驱动方法
公开(公告)号：US20110141060A1
公开(公告)日：2011-06-16
申请号：US12805722
申请日：2010-08-17
申请人： Sun-il Kim , Chang-jung Kim , Sang-hun Jeon , I-hun Song , Jae-chul Park
发明人： Sun-il Kim , Chang-jung Kim , Sang-hun Jeon , I-hun Song , Jae-chul Park
IPC分类号： G06F3/042
CPC分类号： G06F3/0412 , G06F3/0386
摘要： An optical touch panel may include a plurality of light-sensing areas. The plurality of light-sensing areas may be integrally formed with pixels in a display panel or may be formed on the display panel, in order to sense incident light from outside the optical touch panel. A method of driving an optical touch panel may include sensing a change in an output from a plurality of light-sensing areas between two time points and determining that there is an optical input when the change in the output is greater than or equal to a first reference value that is defined in advance. The light-sensing areas may be integrally formed with pixels in a display panel or formed on a surface of the display panel, for sensing incident light from outside the optical touch panel.
摘要翻译：光学触摸面板可以包括多个感光区域。多个感光区域可以与显示面板中的像素一体地形成，或者可以形成在显示面板上，以便感测来自光学触摸面板外部的入射光。驱动光学触摸面板的方法可以包括在两个时间点之间感测多个光感测区域的输出的变化，并且当输出的变化大于或等于第一时间点时确定存在光学输入提前定义的参考值。光感测区域可以与显示面板中的像素一体地形成或形成在显示面板的表面上，用于感测来自光学触摸面板外部的入射光。

44. 发明申请

US20080237687A1 Flash memory device 审中-公开
标题翻译：闪存设备
公开(公告)号：US20080237687A1
公开(公告)日：2008-10-02
申请号：US11898037
申请日：2007-09-07
申请人： Sun-il Kim , Young-gu Jin , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
发明人： Sun-il Kim , Young-gu Jin , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
IPC分类号： H01L29/788
CPC分类号： B82Y10/00 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H01L29/7881 , H01L29/792
摘要： Provided is a flash memory device including a gate structure on a substrate. The flash memory device includes a charge supply layer including a ZnO based material formed between a substrate and a gate structure or formed on the gate structure. Accordingly, the flash memory device can be formed to be of a bottom gate type or of a top gate type by including the charge supply layer. Also, the flash memory device may be realized to be any of a charge trap type and a floating gate type.
摘要翻译：提供了一种在基板上包括栅极结构的闪存器件。闪存器件包括电荷供应层，其包括形成在衬底和栅极结构之间或形成在栅极结构上的基于ZnO的材料。因此，闪存器件可以通过包括电荷供给层而形成为底栅型或顶栅型。此外，闪存器件可以被实现为电荷陷阱型和浮动栅型中的任一种。

45. 发明授权

US08470634B2 Method of manufacturing oxide thin film transistor 有权
标题翻译：制造氧化物薄膜晶体管的方法
公开(公告)号：US08470634B2
公开(公告)日：2013-06-25
申请号：US13552185
申请日：2012-07-18
申请人： Sun-il Kim , Jae-cheol Lee , I-hun Song , Young-soo Park , Chang-jung Kim , Jae-chul Park
发明人： Sun-il Kim , Jae-cheol Lee , I-hun Song , Young-soo Park , Chang-jung Kim , Jae-chul Park
IPC分类号： H01L21/00 , H01L21/16 , H01L21/84 , H01L21/302
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02581 , H01L29/78696
摘要： An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.
摘要翻译：提供氧化物薄膜晶体管和制造氧化物TFT的方法。所述氧化物薄膜晶体管（TFT）包括：栅极; 形成为对应于所述栅极的沟道，以及具有比所述沟道更高功函数的覆盖层; 设置在栅极和沟道之间的栅极绝缘体; 以及源极和漏极，分别接触封盖层的两侧和通道之间，部分地接合覆盖层的顶表面。

46. 发明申请

US20090242992A1 Inverter, logic circuit including an inverter and methods of fabricating the same 有权
标题翻译：逆变器，包括逆变器的逻辑电路及其制造方法
公开(公告)号：US20090242992A1
公开(公告)日：2009-10-01
申请号：US12232854
申请日：2008-09-25
申请人： Sang-wook Kim , Young-soo Park , Jae-chul Park
发明人： Sang-wook Kim , Young-soo Park , Jae-chul Park
IPC分类号： H01L23/62
CPC分类号： H01L21/823462 , H01L21/84 , H01L27/0883
摘要： An inverter, a logic circuit including the inverter and method of fabricating the same are provided. The inverter includes a load transistor of a depletion mode, and a driving transistor of an enhancement mode, which is connected to the load transistor. The load transistor may have a first oxide layer as a first channel layer. The driving transistor may have a second oxide layer as a second channel layer.
摘要翻译：提供了一种逆变器，包括逆变器的逻辑电路及其制造方法。逆变器包括耗尽模式的负载晶体管和连接到负载晶体管的增强模式的驱动晶体管。负载晶体管可以具有作为第一沟道层的第一氧化物层。驱动晶体管可以具有作为第二沟道层的第二氧化物层。

47. 发明授权

US08158978B2 Inverter, logic circuit including an inverter and methods of fabricating the same 有权
标题翻译：逆变器，包括逆变器的逻辑电路及其制造方法
公开(公告)号：US08158978B2
公开(公告)日：2012-04-17
申请号：US12805190
申请日：2010-07-16
申请人： Sang-wook Kim , Young-soo Park , Jae-chul Park
发明人： Sang-wook Kim , Young-soo Park , Jae-chul Park
IPC分类号： H01L29/12 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H03K19/094 , H03K19/20
CPC分类号： H01L21/823462 , H01L21/84 , H01L27/0883
摘要： An inverter, a logic circuit including the inverter and method of fabricating the same are provided. The inverter includes a load transistor of a depletion mode, and a driving transistor of an enhancement mode, which is connected to the load transistor. The load transistor may have a first oxide layer as a first channel layer. The driving transistor may have a second oxide layer as a second channel layer.
摘要翻译：提供了一种逆变器，包括逆变器的逻辑电路及其制造方法。逆变器包括耗尽模式的负载晶体管和连接到负载晶体管的增强模式的驱动晶体管。负载晶体管可以具有作为第一沟道层的第一氧化物层。驱动晶体管可以具有作为第二沟道层的第二氧化物层。

48. 发明申请

US20080191204A1 Thin film transistors and methods of manufacturing the same 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20080191204A1
公开(公告)日：2008-08-14
申请号：US11987499
申请日：2007-11-30
申请人： Sun-il Kim , Young-soo Park , Jae-chul Park
发明人： Sun-il Kim , Young-soo Park , Jae-chul Park
IPC分类号： H01L29/12 , H01L21/84
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A transistor may include: a gate insulting layer; a gate electrode formed on the gate insulating layer; a channel layer formed on the gate insulating layer; and source and drain electrodes that contact the channel layer. The channel layer may have a double-layer structure, including upper and lower layers. The upper layer may have a carrier concentration lower than the lower layer. A method of manufacturing a transistor may include: forming a channel layer on a substrate; forming source and drain electrodes on the substrate; forming a gate insulating layer on the substrate; and forming a gate electrode on the gate insulating layer above the channel layer. A method of manufacturing a transistor may include: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate; forming a channel layer on the gate insulating layer; and forming source and drain electrodes on the gate insulating layer.
摘要翻译：晶体管可以包括：栅极绝缘层; 形成在所述栅极绝缘层上的栅电极; 形成在所述栅极绝缘层上的沟道层; 以及与沟道层接触的源极和漏极。沟道层可以具有双层结构，包括上层和下层。上层可以具有低于下层的载流子浓度。制造晶体管的方法可以包括：在衬底上形成沟道层; 在基板上形成源极和漏极; 在所述基板上形成栅极绝缘层; 以及在沟道层上方的栅极绝缘层上形成栅电极。制造晶体管的方法可以包括：在衬底上形成栅电极; 在所述基板上形成栅极绝缘层; 在所述栅极绝缘层上形成沟道层; 以及在栅极绝缘层上形成源极和漏极。

49. 发明授权

US07847287B2 Inverter, logic circuit including an inverter and methods of fabricating the same 有权
标题翻译：逆变器，包括逆变器的逻辑电路及其制造方法
公开(公告)号：US07847287B2
公开(公告)日：2010-12-07
申请号：US12232854
申请日：2008-09-25
申请人： Sang-wook Kim , Young-soo Park , Jae-chul Park
发明人： Sang-wook Kim , Young-soo Park , Jae-chul Park
IPC分类号： H01L29/12 , H01L23/62
CPC分类号： H01L21/823462 , H01L21/84 , H01L27/0883
摘要： An inverter, a logic circuit including the inverter and method of fabricating the same are provided. The inverter includes a load transistor of a depletion mode, and a driving transistor of an enhancement mode, which is connected to the load transistor. The load transistor may have a first oxide layer as a first channel layer. The driving transistor may have a second oxide layer as a second channel layer.
摘要翻译：提供了一种逆变器，包括逆变器的逻辑电路及其制造方法。逆变器包括耗尽模式的负载晶体管和连接到负载晶体管的增强模式的驱动晶体管。负载晶体管可以具有作为第一沟道层的第一氧化物层。驱动晶体管可以具有作为第二沟道层的第二氧化物层。

50. 发明申请

US20090196084A1 Memory chip array 有权
标题翻译：内存芯片阵列
公开(公告)号：US20090196084A1
公开(公告)日：2009-08-06
申请号：US12213121
申请日：2008-06-16
申请人： Jae-chul Park , Ki-won Kwon , Chung-jung Kim , Sang-wook Kim , Sul-il Kim
发明人： Jae-chul Park , Ki-won Kwon , Chung-jung Kim , Sang-wook Kim , Sul-il Kim
IPC分类号： G11C5/02 , G11C8/00
CPC分类号： G11C5/025 , G11C8/10
摘要： Provided is a memory chip array comprising a plurality of cell arrays and at least one predecoder commonly connected to the plurality of cell arrays, wherein the memory chip array promotes an efficient arrangement structure of the memory chip array and is minimized in area.
摘要翻译：提供了一种存储器芯片阵列，其包括多个单元阵列和至少一个共同连接到多个单元阵列的预解码器，其中该存储器芯片阵列促进该存储器芯片阵列的有效布置结构并且在区域中被最小化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式