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41. 发明授权

US06841796B2 Substrate mapping 有权
标题翻译：基板映射
公开(公告)号：US06841796B2
公开(公告)日：2005-01-11
申请号：US10280200
申请日：2002-10-25
申请人： Warren M. Farnworth , Derek J. Gochnour
发明人： Warren M. Farnworth , Derek J. Gochnour
IPC分类号： H01L23/544 , H01L23/55
CPC分类号： H01L23/544 , H01L24/83 , H01L2223/54413 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2224/83192 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , Y10T29/49004 , Y10T29/49146 , Y10T29/53043 , Y10T29/53178 , Y10T29/53187 , H01L2924/00
摘要： A method and apparatus relating to fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die attach apparatus attaches dice to the die attach sites in accord with the mapped information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.
摘要翻译：涉及制造半导体管芯封装的方法和装置，包括安装衬底和附着于其上的裸片。安装基板包括多个管芯附接位置和具有衬底识别信息的指示符。芯片附着位点被评估并分类为良好或有缺陷的裸片附着位点，其中所评估的信息作为映射信息保存在电子文件中。芯片连接装置根据映射信息将裸片附着到裸片附着位置，其中已知的良好裸片附着到裸片附着位置，并且已知的有缺陷的裸片附着到有缺陷的裸片附着位置上。然后将组件封装在传递模制操作中。

42. 发明授权

US06808947B2 Substrate mapping 失效
标题翻译：基板映射
公开(公告)号：US06808947B2
公开(公告)日：2004-10-26
申请号：US10423127
申请日：2003-04-25
申请人： Warren M. Farnworth , Derek J. Gochnour
发明人： Warren M. Farnworth , Derek J. Gochnour
IPC分类号： H01L2166
CPC分类号： H01L23/544 , H01L24/83 , H01L2223/54413 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2224/83192 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , Y10T29/49004 , Y10T29/49146 , Y10T29/53043 , Y10T29/53178 , Y10T29/53187 , H01L2924/00
摘要： A method for fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.
摘要翻译：一种制造半导体管芯封装的方法，包括安装基板和附接到其上的裸片。安装基板包括多个管芯附接位置和具有衬底识别信息的指示符。芯片附着位点被评估并分类为良好或有缺陷的裸片附着位点，其中所评估的信息作为映射信息保存在电子文件中。根据信息将模具附接到管芯附着位置，其中已知的好的裸片附接到良好的裸片附着位置，并且已知的有缺陷的裸片附着到有缺陷的芯片附着位置。然后将组件封装在传递模制操作中。

43. 发明授权

US06764549B2 Method and apparatus for reducing warpage during application and curing of encapsulant materials on a printed circuit board 失效
标题翻译：用于在印刷电路板上施加和固化密封材料期间减少翘曲的方法和装置
公开(公告)号：US06764549B2
公开(公告)日：2004-07-20
申请号：US10620053
申请日：2003-07-14
申请人： Derek J. Gochnour , Leonard E. Mess
发明人： Derek J. Gochnour , Leonard E. Mess
IPC分类号： B05C1302
CPC分类号： H05K13/00 , H01L2924/3511 , H05K3/284
摘要： A method and apparatus for preventing board warpage during the application and curing or drying of liquid epoxies, or the like, on printed circuit boards using a clamping fixture assembly, which includes at least one clamping fixture support and at least one clamping fixture overlay. If desired, a plurality of printed circuit boards may be processed using an appropriate clamping fixture assembly. Furthermore, the clamping fixture may be constructed so a slight bow or curvature thereof can counter either a convex or concave bow or curvature of the printed circuit board. In the method, at least one printed circuit board is mounted to a clamping fixture support whereby a clamping fixture overlay is placed on top of the first printed circuit board.
摘要翻译：一种用于在使用夹紧夹具组件的印刷电路板上施加和固化或干燥液体环氧树脂等期间防止板翘曲的方法和装置，其包括至少一个夹紧夹具支架和至少一个夹紧固定盖。如果需要，可以使用适当的夹具组件来处理多个印刷电路板。此外，夹持夹具可以被构造成轻微的弓形或其曲率可以对抗印刷电路板的凸形或凹形弓形或曲率。在该方法中，至少一个印刷电路板安装到夹具固定支架上，夹紧夹具覆盖层放置在第一印刷电路板的顶部。

44. 发明授权

US06224936B1 Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board 有权
标题翻译：在印刷电路板上封装材料的施加和固化期间减少翘曲的方法
公开(公告)号：US06224936B1
公开(公告)日：2001-05-01
申请号：US09170628
申请日：1998-10-07
申请人： Derek J. Gochnour , Leonard E. Mess
发明人： Derek J. Gochnour , Leonard E. Mess
IPC分类号： B05D1512
CPC分类号： H05K13/00 , H01L2924/3511 , H05K3/284
摘要： A method for preventing board warpage during the application and curing or drying of liquid epoxies, or the like, on printed circuit boards using a clamping fixture assembly, which includes at least one clamping fixture support and at least one clamping fixture overlay. If desired, a plurality of printed circuit boards may be processed using an appropriate clamping fixture assembly. Furthermore, the clamping fixture may be constructed so a slight bow or curvature thereof can counter either a convex or concave bow or curvature of the printed circuit board.
摘要翻译：一种在包括至少一个夹持固定支架和至少一个夹紧夹具覆盖物的夹紧夹具组件的印刷电路板上施用和固化或干燥液体环氧树脂等期间防止板翘曲的方法。如果需要，可以使用适当的夹具组件来处理多个印刷电路板。此外，夹持夹具可以被构造成轻微的弓形或其曲率可以对抗印刷电路板的凸形或凹形弓形或曲率。

45. 发明授权

US5173451A Soft bond for semiconductor dies 失效
标题翻译：半导体芯片的软键
公开(公告)号：US5173451A
公开(公告)日：1992-12-22
申请号：US889008
申请日：1992-05-26
申请人： Larry D. Kinsman , Derek J. Gochnour
发明人： Larry D. Kinsman , Derek J. Gochnour
IPC分类号： G01R1/04 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42
CPC分类号： H05K3/4007 , G01R1/0466 , G01R1/0483 , G01R31/2893 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/85 , G01R1/0735 , G01R3/00 , G01R31/2863 , H01L2224/05554 , H01L2224/16145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48455 , H01L2224/48472 , H01L2224/49171 , H01L2224/73265 , H01L2224/78313 , H01L2224/85001 , H01L2224/85205 , H01L2224/85214 , H01L2225/06562 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/16195 , H01L2924/20751 , H01L2924/20753 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423
摘要： On a semiconductor integrated circuit die, a semipermanent electrical connection is effected by the use of wirebond techniques, in which the parameters of the wirebond are controlled, so that less bonding force retains the leadwires to the bondpads than the attachment strength of the bondpads to the die. The wirebond techniques include attaching leadwires to bondpads on the die, using ultrasonic wedge bonding. The strength of the bond between the leadwires is significantly less than the attachment strength of the bondpads, preferably by a ratio which ensures that the bondpads are not lifted from the die when the leadwires are removed by breaking the bond between the leadwires and the bondpads. Subsequent to testing and burnin, the bond between the leadwires and the bondpads is severed. The die are then removed from the die cavity plate and the bondpads may then be attached by conventional means. The technique is useful in providing known good die.
摘要翻译：在半导体集成电路管芯上，通过使用引线接合技术来实现半永久性电连接，其中引线键合的参数被控制，使得较少的结合力将导线保持在粘合垫上，而不是粘合垫的附着强度死。引线接合技术包括使用超声波楔形接合将引线连接到管芯上的焊盘。引线之间的结合强度显着小于粘合垫的附着强度，优选地通过确保当引线通过断开引线和粘合垫之间的键而去除引线时，粘合垫不会从模具上提起的比例。在测试和燃烧之后，引线和焊盘之间的接合被切断。然后将模具从模腔板中取出，然后可以通过常规方式连接粘合垫。该技术在提供已知的好的模具中是有用的。

46. 发明授权

US06865086B2 Apparatus and method to secure an adaptor to a reduced-sized memory card 失效
标题翻译：将适配器固定在尺寸较小的存储卡上的装置和方法
公开(公告)号：US06865086B2
公开(公告)日：2005-03-08
申请号：US10191139
申请日：2002-07-09
申请人： Derek J. Gochnour , Walter L. Moden , Michael W. Morrison
发明人： Derek J. Gochnour , Walter L. Moden , Michael W. Morrison
IPC分类号： H01R31/06 , H05K5/02
CPC分类号： G06K19/07739 , H01R12/721 , H01R31/06
摘要： An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. The locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removable interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.
摘要翻译：一种可拆卸地将小型存储卡与扩展构件互连的装置和方法。锁定机构可以形成在缩小尺寸的存储卡的外围端部，其可以包括入口表面和凸缘。延伸构件可以包括可滑动地接合进入表面的偏置部分和与凸缘的可移除的互连。通过这种布置，扩展构件可以容易地从减小尺寸的存储卡中被固定和移除，从而允许一个电子设备的标准尺寸的插座与另一个电子设备的小型插座之间的容易的互换性。

47. 发明授权

US07166252B2 Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board 失效
标题翻译：在印刷电路板上封装材料的施加和固化期间减少翘曲的方法
公开(公告)号：US07166252B2
公开(公告)日：2007-01-23
申请号：US11011624
申请日：2004-12-13
申请人： Derek J. Gochnour , Leonard E. Mess
发明人： Derek J. Gochnour , Leonard E. Mess
IPC分类号： B29C41/20
CPC分类号： H05K13/00 , H01L2924/3511 , H05K3/284
摘要： A method and apparatus for preventing board warpage during the application and curing or drying of liquid epoxies, or the like, on printed circuit boards using a clamping fixture assembly, which includes at least one clamping fixture support and at least one clamping fixture overlay. If desired, a plurality of printed circuit boards may be processed using an appropriate clamping fixture assembly. Furthermore, the clamping fixture maybe constructed so a slight bow or curvature thereof can counter either a convex or concave bow or curvature of the printed circuit board.
摘要翻译：一种用于在使用夹紧夹具组件的印刷电路板上施加和固化或干燥液体环氧树脂等期间防止板翘曲的方法和装置，其包括至少一个夹紧夹具支架和至少一个夹紧固定盖。如果需要，可以使用适当的夹具组件来处理多个印刷电路板。此外，夹持夹具可以构造成轻微的弓形或曲率可以对抗印刷电路板的凸形或凹形弓形或曲率。

48. 发明授权

US06555400B2 Method for substrate mapping 失效
标题翻译：基板测绘方法
公开(公告)号：US06555400B2
公开(公告)日：2003-04-29
申请号：US09934620
申请日：2001-08-22
申请人： Warren M. Farnworth , Derek J. Gochnour
发明人： Warren M. Farnworth , Derek J. Gochnour
IPC分类号： G01R3126
CPC分类号： H01L23/544 , H01L24/83 , H01L2223/54413 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2224/83192 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , Y10T29/49004 , Y10T29/49146 , Y10T29/53043 , Y10T29/53178 , Y10T29/53187 , H01L2924/00
摘要： A method and apparatus relating to fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die attach apparatus attaches dice to the die attach sites in accord with the mapped information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation. Since each die attach site includes a die attached thereto, the structural integrity of the mounting substrate is maintained and there is greater volume control of encapsulation material in the transfer molding operation to prevent waste and shortage of the encapsulation material. The assembly may then be segregated into individual semiconductor die packages, in which the defective die packages having the defective dice and defective die attach sites are discarded in accord with the mapped information.
摘要翻译：涉及制造半导体管芯封装的方法和装置，包括安装衬底和附着于其上的裸片。安装基板包括多个管芯附接位置和具有衬底识别信息的指示符。芯片附着位点被评估并分类为良好或有缺陷的裸片附着位点，其中所评估的信息作为映射信息保存在电子文件中。芯片连接装置根据映射信息将裸片附着到裸片附着位置，其中已知的良好裸片附着到裸片附着位置，并且已知的有缺陷的裸片附着到有缺陷的裸片附着位置上。然后将组件封装在传递模制操作中。由于每个管芯附接部位都包括附接到其上的管芯，所以保持安装基板的结构完整性，并且在传输模制操作中对密封材料进行更大的体积控制以防止封装材料的浪费和短缺。然后将组件分离成单独的半导体管芯封装，其中根据映射的信息丢弃具有缺陷管芯和缺陷管芯附着位置的缺陷管芯封装。

49. 发明授权

US06247629B1 Wire bond monitoring system for layered packages 有权
标题翻译：用于分层包装的线接监控系统
公开(公告)号：US06247629B1
公开(公告)日：2001-06-19
申请号：US09246668
申请日：1999-02-05
申请人： John O. Jacobson , Derek J. Gochnour , Steven G. Thummel
发明人： John O. Jacobson , Derek J. Gochnour , Steven G. Thummel
IPC分类号： B23K3700
CPC分类号： H01L24/85 , B23K20/004 , B23K2101/40 , H01L24/45 , H01L24/48 , H01L24/78 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48465 , H01L2224/48472 , H01L2224/78301 , H01L2224/78313 , H01L2224/78318 , H01L2224/85181 , H01L2224/85205 , H01L2224/859 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2924/00015
摘要： A wire bond monitoring system for monitoring wire bonds made on layered packages includes a technique for accessing both the die and the laminate package and making electrical contact thereto so as to test the continuity of the wire bond connection. An electrical connection can be made to a metal trace between the die and the laminate package by contacting a via extending downwardly through the package. Alternatively, a contact may be made from above using a flexible contact. The flexible contact may be attached to the wire bond clamp.
摘要翻译：用于监测在分层封装上形成的引线键合的引线键合监视系统包括一种用于访问模具和层压包装件的技术，并与其接触，以便测试引线接合连接的连续性。可以通过使通过向下延伸穿过封装件的通孔接触电连接到模具和层压包装件之间的金属迹线。或者，可以使用柔性接触件从上方进行接触。柔性触点可以附接到引线键合夹。

50. 发明授权

US06180527B2 Method and apparatus for thinning article, and article 有权
标题翻译：减薄物品的方法和装置，以及文章
公开(公告)号：US06180527B2
公开(公告)日：2001-01-30
申请号：US09374128
申请日：1999-08-09
申请人： Warren M. Farnworth , Derek J. Gochnour
发明人： Warren M. Farnworth , Derek J. Gochnour
IPC分类号： H01L21302
CPC分类号： H01L21/304 , B24B37/042
摘要： A method for thinning articles, such as wafers in an IC product, includes applying a reference layer to a first surface of the article to be thinned; removing a portion of the reference layer from its exposed surface to provide a reference surface; and thinning the article by removing a portion of the article from its second surface to provide a thinned surface. The orientation of the reference surface relative to the second surface is controlled, and the orientation of the thinned surface relative to the reference surface is controlled. There are also provided apparatuses and systems which are suitable for use in such methods, as well as intermediate articles and finished products containing articles formed in such methods.
摘要翻译：用于减薄诸如IC产品中的晶片的制品的方法包括将参考层施加到待稀释的制品的第一表面; 从其暴露的表面去除参考层的一部分以提供参考表面; 并通过从其第二表面去除一部分制品来使制品变薄以提供变薄的表面。控制参考表面相对于第二表面的取向，并且控制薄化表面相对于参考表面的取向。还提供了适用于这些方法的装置和系统，以及含有以这种方法形成的制品的中间制品和成品。

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