专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20080210671A1 Fast axis beam profile shaping by collimation lenslets for high power laser diode based annealing system 有权
标题翻译：基于高功率激光二极管的退火系统的准直小透镜的快轴光束轮廓成形
公开(公告)号：US20080210671A1
公开(公告)日：2008-09-04
申请号：US11508781
申请日：2006-08-23
申请人： Dean Jennings , Abhilash J. Mayur , Timothy N. Thomas , Vijay Parihar , Vedapuram S. Achutharaman , Randhir P. S. Thakur
发明人： Dean Jennings , Abhilash J. Mayur , Timothy N. Thomas , Vijay Parihar , Vedapuram S. Achutharaman , Randhir P. S. Thakur
IPC分类号： B23K26/00
CPC分类号： B23K26/0738 , B23K26/0613 , B23K26/0676 , H01L21/268 , H01L29/7833 , Y10T117/1016
摘要： A dynamic surface anneal apparatus for annealing a semiconductor workpiece has a workpiece support for supporting a workpiece, an optical source and scanning apparatus for scanning the optical source and the workpiece support relative to one another along a fast axis. The optical source includes an array of laser emitters arranged generally in successive rows of the emitters, the rows being transverse to the fast axis. Plural collimating lenslets overlie respective ones of the rows of emitters and provide collimation along the fast axis. The selected lenslets have one or a succession of optical deflection angles corresponding to beam deflections along the fast axis for respective rows of emitters. Optics focus light from the array of laser emitters onto a surface of the workpiece to form a succession of line beams transverse to the fast axis spaced along the fast axis in accordance with the succession of deflection angles.
摘要翻译：用于退火半导体工件的动态表面退火装置具有用于支撑工件的工件支撑件，用于沿着快轴相对于彼此扫描光源和工件支撑件的光源和扫描装置。光源包括大致以发射器的连续行布置的激光发射器的阵列，这些行横向于快轴。多个准直的小透镜叠加在发射器排中的相应行上，并沿着快轴提供准直。所选择的小透镜具有对应于沿着快轴的光束偏转的相应行发射器的一个或一系列光学偏转角。将来自激光发射器阵列的光聚焦到工件的表面上，以根据偏转角的顺序形成一系列沿着快轴间隔开的快轴的线束。

42. 发明授权

US06927445B2 Method to form a corrugated structure for enhanced capacitance 失效
标题翻译：形成用于增强电容的波纹结构的方法
公开(公告)号：US06927445B2
公开(公告)日：2005-08-09
申请号：US09921423
申请日：2001-08-02
申请人： Randhir P. S. Thakur , Gordon Haller , Kirk D. Prall
发明人： Randhir P. S. Thakur , Gordon Haller , Kirk D. Prall
IPC分类号： H01L21/02 , H01L29/76 , H01L29/94
CPC分类号： H01L28/87 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a corrugated capacitor on a semiconductor component. The method of forming the corrugated capacitor comprises a series of depositing alternating layers of doped silicon glass having different etch rates on a semiconductor component, covering the alternating layers with an etch-resistant material, and etching the alternating layers, thereby forming a capacitor structure having corrugated sides.
摘要翻译：一种在半导体部件上形成波纹状电容器的方法。形成波纹状电容器的方法包括在半导体组件上具有不同蚀刻速率的一系列沉积交替层的掺杂硅玻璃，用耐蚀刻材料覆盖交替层，并蚀刻交替层，从而形成具有波纹状。

43. 发明授权

US06812530B2 Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures 失效
标题翻译：用于形成字线，晶体管栅极和导电互连以及字线，晶体管栅极和导电互连结构的方法
公开(公告)号：US06812530B2
公开(公告)日：2004-11-02
申请号：US09875501
申请日：2001-06-04
申请人： Klaus Florian Schuegraf , Randhir P. S. Thakur
发明人： Klaus Florian Schuegraf , Randhir P. S. Thakur
IPC分类号： H01L2976
CPC分类号： H01L21/3215 , H01L21/28052 , H01L21/28061 , H01L21/28273 , H01L21/76889 , H01L27/115
摘要： The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. In one aspect, the invention includes a method of forming a conductive line comprising: a) forming a polysilicon layer; forming a silicide layer against the polysilicon layer; b) providing a conductivity-enhancing impurity within the silicide layer; and c) providing the polysilicon layer and the silicide layer into a conductive line shape. In another aspect, the invention includes a programmable-read-only-memory device comprising: a) a first dielectric layer over a substrate; b) a floating gate over the first dielectric layer; c) a second dielectric layer over the floating gate; d) a conductive line over the second dielectric layer; and e) a metal-silicide layer over the conductive line, the metal-silicide layer comprising a Group III dopant or a Group V dopant.
摘要翻译：本发明包括堆叠的半导体器件，包括栅极堆叠，字线，PROM，导电互连线以及用于形成这种结构的方法。一方面，本发明包括形成导线的方法，包括：a）形成多晶硅层; 形成针对多晶硅层的硅化物层; b）在硅化物层内提供电导率增强杂质; 以及c）将所述多晶硅层和所述硅化物层设置成导线形状。在另一方面，本发明包括可编程只读存储器件，其包括：a）衬底上的第一介电层; b）在第一介电层上的浮栅; c）浮置栅极上的第二电介质层; d）在第二介电层上的导电线; 以及e）所述导电线上的金属硅化物层，所述金属硅化物层包含III族掺杂剂或V族掺杂剂。

44. 发明授权

US06806572B2 Structure for contact formation using a silicon-germanium alloy 失效
标题翻译：使用硅 - 锗合金的接触形成结构
公开(公告)号：US06806572B2
公开(公告)日：2004-10-19
申请号：US10277688
申请日：2002-10-22
申请人： Randhir P. S. Thakur
发明人： Randhir P. S. Thakur
IPC分类号： H01L2334
CPC分类号： H01L21/76831 , H01L21/28525 , H01L21/76802 , H01L21/76843 , H01L21/76855 , H01L21/76862 , H01L21/76864 , H01L21/76879 , H01L2924/0002 , Y10S257/915 , H01L2924/00
摘要： A new method and structure for an improved contact using doped silicon is provided. The structures are integrated into several higher level embodiments. The improved contact has low contact resistivity. Improved junctions are thus provided between an IGFET device and subsequent metallization layers. The improvements are obtained through the use of a silicon-germanium (Si—Ge) alloy. The alloy can be formed from depositing germanium onto the substrate and subsequently annealing the contact or by selectively depositing the preformed alloy into a contact opening. The above advantages are incorporated with relatively few process steps.
摘要翻译：提供了一种使用掺杂硅改善接触的新方法和结构。这些结构被集成到几个较高级别的实施例中。改进的接触具有低接触电阻率。因此，在IGFET器件和随后的金属化层之间提供改进的结。通过使用硅 - 锗（Si-Ge）合金获得改进。该合金可以通过将锗沉积到基底上并随后对接触进行退火或通过选择性地将预成型合金沉积到接触开口中而形成。上述优点结合相对较少的工艺步骤。

45. 发明授权

US06787482B2 Method to form a DRAM capacitor using low temperature reoxidation 失效
标题翻译：使用低温再氧化形成DRAM电容器的方法
公开(公告)号：US06787482B2
公开(公告)日：2004-09-07
申请号：US10223004
申请日：2002-08-14
申请人： Randhir P. S. Thakur , Brett Rolfson
发明人： Randhir P. S. Thakur , Brett Rolfson
IPC分类号： H01L2131
CPC分类号： H01L21/31604 , H01L21/31691 , H01L21/3185 , H01L28/82
摘要： An embodiment of the present invention teaches a capacitor dielectric in a wafer cluster tool for semiconductor device fabrication formed by a method by the steps of: forming nitride adjacent a layer by rapid thermal nitridation; and subjecting the nitride to an ozone ambient, wherein the ozone ambient is selected from the group consisting of an ambient containing an ultraviolet/ozone mixture, an ambient containing an ozone or an ambient containing an NF3/ozone mixture.
摘要翻译：本发明的实施例教导了用于半导体器件制造的晶片簇工具中的电容器电介质，该方法通过以下步骤形成：通过快速热氮化形成邻近层的氮化物; 以及使所述氮化物经受臭氧环境，其中所述臭氧环境选自含有紫外线/臭氧混合物的环境，含有臭氧的环境或含有NF 3 /臭氧混合物的环境。

46. 发明授权

US06730584B2 Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures 有权
标题翻译：用于形成字线，晶体管栅极和导电互连以及字线，晶体管栅极和导电互连结构的方法
公开(公告)号：US06730584B2
公开(公告)日：2004-05-04
申请号：US09333770
申请日：1999-06-15
申请人： Klaus Florian Schuegraf , Carl Powell , Randhir P. S. Thakur
发明人： Klaus Florian Schuegraf , Carl Powell , Randhir P. S. Thakur
IPC分类号： H01L2122
CPC分类号： H01L29/4941 , H01L21/28061 , H01L21/28273 , H01L29/4916
摘要： The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. The invention also includes a method of forming a transistor gate comprising: a) forming gate dielectric layer; b) forming a polysilicon gate layer against the gate dielectric layer; and c) doping the polysilicon gate layer with a conductivity-enhancing dopant, the dopant being provided in a concentration gradient within the polysilicon layer, the concentration gradient increasing in a direction toward the gate dielectric layer. The invention also includes a wordline comprising: a) a polysilicon line; a substantially fluorine impervious barrier layer over the polysilicon line; and a b) layer of metal-silicide over the substantially fluorine impervious barrier layer.
摘要翻译：本发明包括堆叠的半导体器件，包括栅极堆叠，字线，PROM，导电互连线以及用于形成这种结构的方法。本发明还包括一种形成晶体管栅极的方法，包括：a）形成栅极介电层; b）在所述栅极介电层上形成多晶硅栅极层; 以及c）用导电性增强掺杂剂掺杂多晶硅栅极层，所述掺杂剂以所述多晶硅层内的浓度梯度提供，所述浓度梯度在朝向所述栅极介电层的方向上增加。本发明还包括字线，包括：a）多晶硅线; 多晶硅线上的基本上不透氟的阻挡层; 以及b）基本上不透氟化阻挡层上的金属硅化物层。

47. 发明授权

US06682970B1 Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer 有权
标题翻译：具有阻挡层电极和改进的阻挡层的电容器/反熔丝结构
公开(公告)号：US06682970B1
公开(公告)日：2004-01-27
申请号：US09692897
申请日：2000-10-19
申请人： Randhir P. S. Thakur , Garry A. Mercaldi , Michael Nuttall
发明人： Randhir P. S. Thakur , Garry A. Mercaldi , Michael Nuttall
IPC分类号： H01L218242
CPC分类号： H01L27/11502 , G11C11/404 , G11C17/16 , H01L21/28568 , H01L21/76888 , H01L27/1085 , H01L27/11507 , H01L28/60 , H01L28/84
摘要： A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the second side of the dielectric layer and is coupled to a second terminal. The conductive barrier layer may be formed from tungsten nitride, tungsten silicon nitride, titanium silicon nitride or other barrier material.
摘要翻译：半导体结构包括具有第一和第二相对侧的电介质层。导电层与电介质层的第一侧相邻并且耦合到第一端子，并且导电阻挡层与电介质层的第二侧相邻并耦合到第二端子。导电阻挡层可以由氮化钨，氮化钨，氮化钛或其它阻挡材料形成。

48. 发明授权

US06518121B2 Boride electrodes and barriers for cell dielectrics 有权
公开(公告)号：US06518121B2
公开(公告)日：2003-02-11
申请号：US09941759
申请日：2001-08-30
申请人： Husam N. Al-Shareef , Scott J. DeBoer , Dan Gealy , Randhir P. S. Thakur
发明人： Husam N. Al-Shareef , Scott J. DeBoer , Dan Gealy , Randhir P. S. Thakur
IPC分类号： H01L27108
CPC分类号： H01L27/10852 , H01L21/28568 , H01L27/10811 , H01L27/10888 , H01L28/60
摘要： Titanium boride (TiBx), zirconium boride (ZrBx) and hafnium boride (HfBx) barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The barriers protect cell dielectrics from diffusion and other interaction with surrounding materials during subsequent thermal processing.

49. 发明授权

US06486020B1 High pressure reoxidation/anneal of high dielectric constant materials 有权
标题翻译：高介电常数材料的高压再氧化/退火
公开(公告)号：US06486020B1
公开(公告)日：2002-11-26
申请号：US09651377
申请日：2000-08-29
申请人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
发明人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L21/32105 , H01L21/3211 , H01L27/1085 , H01L28/84
摘要： A high dielectric constant (DC) capacitive dielectric film is fabricated in a capacitor structure using relatively high pressure surface treatments. After forming the DC capacitive dielectric film on a supporting bottom plate electrode structure, a surface treatment comprising oxidation, at a pressure of at least approximately one atmosphere and temperatures of approximately at least 200 degrees Celsius densities/conditions the HDC capacitive dielectric film. When using a polysilicon, crystalline silicon, hemispherical grain polysilicon, germanium, or silicon-germanium bottom plate electrode, a relatively high pressure surface treatment, comprising rapid thermal nitridation or oxidation, is used after forming the bottom plate electrode, forming a diffusion barrier layer in a controlled manner.
摘要翻译：使用相对较高压力的表面处理，在电容器结构中制造高介电常数（DC）电容电介质膜。在支撑底板电极结构上形成DC电容电介质膜之后，在至少约一个气压的压力和大约至少200摄氏度的温度的温度下，包括氧化的表面处理/使HDC电容性电介质膜变形。当使用多晶硅，晶体硅，半球形晶粒多晶硅，锗或硅锗底板电极时，在形成底板电极之后使用包括快速热氮化或氧化的相对高压表面处理，形成扩散阻挡层以受控的方式。

50. 发明授权

US06476433B1 Semiconductor interconnection structure and method 有权
标题翻译：具有同时形成的电极和互连层的半导体存储器件
公开(公告)号：US06476433B1
公开(公告)日：2002-11-05
申请号：US09655934
申请日：2000-09-06
申请人： Jeff Wu , Randhir P. S. Thakur
发明人： Jeff Wu , Randhir P. S. Thakur
IPC分类号： H01L27108
CPC分类号： H01L27/10894 , H01L21/76838 , H01L27/1052 , H01L27/10814 , H01L27/10852 , H01L27/10882 , H01L28/60
摘要： A memory device and method in which the capacitor lower electrode within the memory cell array and a first interconnection layer within the peripheral circuitry are provided simultaneously from the same conductive material. The capacitor upper electrode and a second interconnection layer within the peripheral circuitry are also provided simultaneously from the same conductive material.
摘要翻译：存储单元阵列中的电容器下电极和外围电路内的第一互连层的同时由同一导电材料提供的存储器件和方法。外围电路中的电容器上电极和第二互连层也由相同的导电材料同时提供。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式