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41. 发明授权

US5982936A Performance of video decompression by using block oriented data structures 失效
标题翻译：通过使用面向块的数据结构实现视频解压缩
公开(公告)号：US5982936A
公开(公告)日：1999-11-09
申请号：US892551
申请日：1997-07-14
申请人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
发明人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
IPC分类号： H04N7/26 , H04N7/50 , G06K9/36
CPC分类号： H04N19/433 , H04N19/423 , H04N19/61
摘要： A video decoding system that selectively arranges video information within a memory to correspond to macroblocks of video information. Such a system advantageously increases the efficiency of processing video information when decoding compressed video information.
摘要翻译：一种视频解码系统，其选择性地将视频信息布置在存储器内以对应于视频信息的宏块。这样的系统有利地提高了解码压缩视频信息时处理视频信息的效率。

42. 发明授权

US5953457A Method and apparatus for improved video decompression by prescaling of pixel and error terms to merging 失效
标题翻译：通过对像素进行预分频和错误合并来改进视频解压缩的方法和装置
公开(公告)号：US5953457A
公开(公告)日：1999-09-14
申请号：US887678
申请日：1997-07-03
申请人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
发明人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
IPC分类号： G06T9/00 , H04N7/26 , H04N7/50 , G06K9/36 , G06K9/46 , H04N7/12
CPC分类号： H04N19/85 , H04N19/42 , H04N19/61
摘要： A video decoding apparatus and method greatly reduces the computational burden of video decoding by processing several pixels in parallel, thereby reducing the computational load by a factor approximating the number of pixels processed at one time.
摘要翻译：视频解码装置和方法通过并行处理几个像素大大减少了视频解码的计算负担，从而通过逼近一次处理的像素数来减少计算负荷。

43. 发明授权

US5903313A Method and apparatus for adaptively performing motion compensation in a video processing apparatus 失效
标题翻译：用于在视频处理设备中自适应地执行运动补偿的方法和装置
公开(公告)号：US5903313A
公开(公告)日：1999-05-11
申请号：US424019
申请日：1995-04-18
申请人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
发明人： Michael R. Tucker , Geoffrey S. Strongin , Yi Liu
IPC分类号： H04N7/36 , H04N7/18
CPC分类号： H04N19/51
摘要： A method of adaptively performing motion compensation in a video processing apparatus is provided. The video processing apparatus processes macroblocks of compressed video information. Some of these macroblocks have motion vectors associated therewith. The method is conveniently implemented on a general purpose computer in one embodiment. In accordance with the disclosed method, the performance of the processor in the computer is monitored and a measurement of this performance is made. A threshold dependent on the measured processor performance is then set. For those macroblocks which have motion vectors associated therewith, the magnitude of the motion vector is determined. If the magnitude of the motion vector of a particular macroblock exceeds the threshold, then motion compensation is performed on that macroblock. However, if the magnitude of the motion vectors or motion vectors associated with a particular macroblock do not exceed the threshold, then no motion compensation is performed. The processor is thus relieved from the computational burden of performing motion compensation on a significant number of macroblocks.
摘要翻译：提供了一种在视频处理设备中自适应地执行运动补偿的方法。视频处理装置处理压缩视频信息的宏块。这些宏块中的一些具有与其相关联的运动向量。该方法在一个实施例中在通用计算机上方便地实现。根据所公开的方法，监视计算机中的处理器的性能并进行该性能的测量。然后设置取决于测量的处理器性能的阈值。对于具有与其相关联的运动矢量的那些宏块，确定运动矢量的大小。如果特定宏块的运动矢量的大小超过阈值，则对该宏块执行运动补偿。然而，如果与特定宏块相关联的运动矢量或运动矢量的大小不超过阈值，则不执行运动补偿。因此，处理器免于在大量宏块上执行运动补偿的计算负担。

44. 发明授权

US5774600A Method of pixel averaging in a video processing apparatus 失效
标题翻译：视频处理装置中像素平均的方法
公开(公告)号：US5774600A
公开(公告)日：1998-06-30
申请号：US424028
申请日：1995-04-18
申请人： Geoffrey S. Strongin , Yi Liu , Michael R. Tucker
发明人： Geoffrey S. Strongin , Yi Liu , Michael R. Tucker
IPC分类号： G06T5/20 , G06T9/00 , G09G5/393 , H04N5/14 , H04N5/44 , H04N7/26 , H04N7/50 , G06K9/36
CPC分类号： G09G5/393 , G06T5/20 , H04N19/42 , H04N19/61 , H04N5/14 , H04N5/4401
摘要： A method of pixel averaging is disclosed which advantageously employs a relatively low number of registers, relatively few memory accesses and a relatively low number of steps. A first register is loaded with a first sequence of pixel values which are to be averaged with a second sequence of pixel values loaded into a second register. The pixel values of the first sequence are stored in respective segments of the first register and the pixel values of the second sequence are stored in respective segments of the second register. The pixel values in the first and second registers are shifted to the right by one. The most significant bit of each of the segments of the first register and the most significant bit of each of the segments of the second register are masked. First masked quotients are thus obtained in each of the segments of the first register and second masked quotients are thus obtained in each of the segments of the second register. The first masked quotients in the segments of the first register are added to respective second masked quotients in the second register to obtain a plurality of pixel value averages.
摘要翻译：公开了一种像素平均的方法，其有利地采用相对较少数量的寄存器，相对较少的存储器访问和相对较少数量的步骤。加载第一序列的像素值，其将被加载到第二寄存器中的第二像素值序列进行平均。第一序列的像素值存储在第一寄存器的相应段中，并且第二序列的像素值存储在第二寄存器的相应段中。第一和第二寄存器中的像素值向右移位1。第一寄存器的每个段的最高有效位和第二寄存器的每个段的最高有效位被屏蔽。因此，在第一寄存器的每个段中获得第一掩蔽商，并且因此在第二寄存器的每个段中获得第二掩蔽商。将第一寄存器的段中的第一被掩蔽商加到第二寄存器中的相应的第二掩蔽商，以获得多个像素值平均值。

45. 发明授权

US07865948B1 Method and apparatus for restricted execution of security sensitive instructions 有权
标题翻译：用于限制执行安全敏感指令的方法和装置
公开(公告)号：US07865948B1
公开(公告)日：2011-01-04
申请号：US10005248
申请日：2001-12-03
申请人： Brian C. Barnes , Rodney W. Schmidt , Geoffrey S. Strongin
发明人： Brian C. Barnes , Rodney W. Schmidt , Geoffrey S. Strongin
IPC分类号： H04L29/06 , G06F21/00
CPC分类号： G06F9/30145 , G06F9/30181 , G06F21/52 , G06F21/53 , G06F21/54 , G06F2221/2105 , G06F2221/2141 , G06F2221/2149
摘要： A method and apparatus for restricting the execution of security sensitive instructions. A first security identification (ID) is associated with each of a plurality of instructions or a set of instructions that are to be executed by a processor. Software code running on the processor requests to execute at least one of the plurality of instructions or set of instructions. The processor obtains a second security ID associated with the software code running thereon and compares the second security ID with the first security ID. The processor executes the requested instruction or set of instructions providing that the second security ID matches the first security ID.
摘要翻译：一种限制安全敏感指令执行的方法和装置。第一安全标识（ID）与要由处理器执行的多个指令或一组指令中的每一个相关联。在处理器上运行的软件代码请求执行多个指令或指令集中的至少一个。处理器获得与其上运行的软件代码相关联的第二安全ID，并将第二安全ID与第一安全ID进行比较。处理器执行请求的指令或指令集，条件是第二安全ID与第一安全ID相匹配。

46. 发明申请

US20100122062A1 Using an IOMMU to Create Memory Archetypes 有权
标题翻译：使用IOMMU创建内存原型
公开(公告)号：US20100122062A1
公开(公告)日：2010-05-13
申请号：US12685179
申请日：2010-01-11
申请人： Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck
发明人： Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck
IPC分类号： G06F12/10 , G06F12/00
CPC分类号： G06F12/1081 , G06F12/145 , G06F2212/656
摘要： In one embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory and control logic coupled to the memory. The memory is configured to store translation data corresponding to one or more I/O translation tables stored in a memory system of a computer system that includes the IOMMU. The control logic is configured to translate an I/O device-generated memory request using the translation data. The translation data includes a type field indicating one or more attributes of the translation, and the control logic is configured to control the translation responsive to the type field.
摘要翻译：在一个实施例中，输入/输出（I / O）存储器管理单元（IOMMU）包括耦合到存储器的至少一个存储器和控制逻辑。存储器被配置为存储对应于存储在包括IOMMU的计算机系统的存储器系统中的一个或多个I / O转换表的转换数据。控制逻辑被配置为使用转换数据来转换I / O设备生成的存储器请求。翻译数据包括指示翻译的一个或多个属性的类型字段，并且控制逻辑被配置为响应于类型字段来控制翻译。

47. 发明申请

US20100095085A1 DMA Address Translation in an IOMMU 有权
标题翻译： DMA地址转换在IOMMU
公开(公告)号：US20100095085A1
公开(公告)日：2010-04-15
申请号：US12635385
申请日：2009-12-10
申请人： Mark D. Hummel , Geoffrey S. Strongin , Mitchell Alsup , Michael Haertel , Andrew W. Lueck
发明人： Mark D. Hummel , Geoffrey S. Strongin , Mitchell Alsup , Michael Haertel , Andrew W. Lueck
IPC分类号： G06F12/10 , G06F12/00 , G06F3/00
CPC分类号： G06F12/1081
摘要： In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.
摘要翻译：在一个实施例中，输入/输出（I / O）存储器管理单元（IOMMU）包括被配置为存储转换数据的至少一个存储器; 以及控制逻辑，其耦合到所述存储器并且被配置为使用所述翻译数据来转换I / O设备生成的存储器请求。翻译数据对应于存储在包括IOMMU的计算机系统的存储器系统中的设备表中的一个或多个设备表条目，其中给定请求的设备表条目由对应于I / O设备的标识符选择生成请求。翻译数据还对应于一个或多个I / O页表，其中用于给定请求的所选择的设备表条目包括指向要用于转换给定请求的一组I / O页表的指针。

48. 发明授权

US07673116B2 Input/output memory management unit that implements memory attributes based on translation data 有权
标题翻译：基于翻译数据实现存储器属性的输入/输出存储器管理单元
公开(公告)号：US07673116B2
公开(公告)日：2010-03-02
申请号：US11623526
申请日：2007-01-16
申请人： Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck
发明人： Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck
IPC分类号： G06F12/10
CPC分类号： G06F12/1081 , G06F12/145 , G06F2212/656
摘要： In one embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory and control logic coupled to the memory. The memory is configured to store translation data corresponding to one or more I/O translation tables stored in a memory system of a computer system that includes the IOMMU. The control logic is configured to translate an I/O device-generated memory request using the translation data. The translation data includes a type field indicating one or more attributes of the translation, and the control logic is configured to control the translation responsive to the type field.
摘要翻译：在一个实施例中，输入/输出（I / O）存储器管理单元（IOMMU）包括耦合到存储器的至少一个存储器和控制逻辑。存储器被配置为存储对应于存储在包括IOMMU的计算机系统的存储器系统中的一个或多个I / O转换表的转换数据。控制逻辑被配置为使用转换数据来转换I / O设备生成的存储器请求。翻译数据包括指示翻译的一个或多个属性的类型字段，并且控制逻辑被配置为响应于类型字段来控制翻译。

49. 发明授权

US07613898B2 Virtualizing an IOMMU 有权
标题翻译：虚拟化IOMMU
公开(公告)号：US07613898B2
公开(公告)日：2009-11-03
申请号：US11623626
申请日：2007-01-16
申请人： Michael Haertel , Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck , Mitchell Alsup
发明人： Michael Haertel , Mark D. Hummel , Geoffrey S. Strongin , Andrew W. Lueck , Mitchell Alsup
IPC分类号： G06F12/10
CPC分类号： G06F9/45558 , G06F2009/45579 , G06F2009/45583
摘要： In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more virtual machines on the system, wherein the VMM is configured to virtualize the IOMMU, providing one or more virtual IOMMUs for use by one or more virtual machines.
摘要翻译：在一个实施例中，系统包括一个或多个输入/输出（I / O）设备; I / O存储器管理单元（IOMMU），其耦合以接收由所述I / O设备提供的存储器请求，并被配置为提供所述存储器请求的地址转换; 以及被配置为管理所述系统上的一个或多个虚拟机的虚拟机监视器（VMM），其中所述VMM被配置为虚拟化所述IOMMU，提供一个或多个虚拟IOMMU供一个或多个虚拟机使用。

50. 发明授权

US07496966B1 Method and apparatus for controlling operation of a secure execution mode-capable processor in system management mode 有权
标题翻译：用于在系统管理模式下控制具有安全执行模式的处理器的操作的方法和装置
公开(公告)号：US07496966B1
公开(公告)日：2009-02-24
申请号：US10419120
申请日：2003-04-18
申请人： Kevin J. McGrath , David S. Christie , Geoffrey S. Strongin
发明人： Kevin J. McGrath , David S. Christie , Geoffrey S. Strongin
IPC分类号： G06F7/04 , G06F12/00
CPC分类号： G06F9/4403 , G06F21/10 , G06F21/74
摘要： A method for controlling operation of a secure execution mode-capable processor includes receiving access requests to a plurality of addressable locations within a system memory. The method may further include preventing the access requests from completing in response to determining that the secure execution mode-capable processor is operating in a secure execution mode.
摘要翻译：一种用于控制具有安全执行模式的处理器的操作的方法，包括：接收对系统存储器内的多个可寻址位置的访问请求。所述方法可以进一步包括响应于确定具有安全执行模式的处理器在安全执行模式中操作来防止访问请求完成。

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