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    • 42. 发明申请
    • ACTIVE MATRIX SUBSTRATE, AND LIQUID CRYSTAL DISPLAY DEVICE
    • 主动矩阵基板和液晶显示装置
    • US20100277447A1
    • 2010-11-04
    • US12746377
    • 2008-12-26
    • Ryohki ItohSatoshi HoriuchiTakaharu Yamada
    • Ryohki ItohSatoshi HoriuchiTakaharu Yamada
    • G09G3/36G06F3/038
    • G02F1/136213G02F1/136209G02F1/136286G02F2001/13606
    • The present invention provides a liquid crystal display device including an active matrix substrate with improved characteristics and providing high-contrast between black and white displays. The active matrix substrate of the present invention is an active matrix substrate, including: pixel electrodes arranged in a matrix pattern; a source line extending in a column direction and overlapping with any adjacent two of the pixel electrodes in a row direction; and a storage capacitor line extending in the row direction and intersecting with the source line, wherein the pixel electrodes, the source line, and the storage capacitor line are disposed in different layers stacked with an insulating film therebetween, the source line has bend points below both of the adjacent two row pixel electrodes and has a crossing portion passing across a space between the adjacent two row pixel electrodes, the storage capacitor line has a portion extending in the column direction and overlapping with the space between the adjacent two row pixel electrodes, and the source line overlaps with the storage capacitor line substantially only at an intersection thereof.
    • 本发明提供一种液晶显示装置,其包括具有改进的特性并在黑白显示器之间提供高对比度的有源矩阵基板。 本发明的有源矩阵基板是有源矩阵基板,包括:排列成矩阵图案的像素电极; 源极线,沿着列方向延伸并与行方向上的任何相邻的两个像素电极重叠; 以及沿行方向延伸并与源极线交叉的辅助电容配线,其中像素电极,源极线和辅助电容配线配置在层叠有绝缘膜的不同层中,源极线的下方具有弯曲点 相邻的两列像素电极之间,并且具有穿过相邻的两个行像素电极之间的空间的交叉部分,辅助电容线具有在列方向上延伸并与相邻的两个行像素电极之间的空间重叠的部分, 并且源极线基本上仅在其相交处与辅助电容线重叠。
    • 44. 发明申请
    • ACTIVE MATRIX SUBSTRATE AND DISPLAY DEVICE
    • 主动矩阵基板和显示设备
    • US20130250226A1
    • 2013-09-26
    • US13991968
    • 2011-12-05
    • Masahiro YoshidaTakaharu Yamada
    • Masahiro YoshidaTakaharu Yamada
    • G02F1/1343
    • G02F1/134336
    • A storage capacitor counter electrode (22) provided on an active matrix substrate (100) includes a first portion (22b) creating a storage capacitance with a storage capacitor bus line (12), a second portion (22a) interposed between the first portion (22b) and a drain electrode (24), and a third portion (22c) being provided opposite from the second portion (22a) with the first portion (22b) sandwiched therebetween and protruding from the first portion (22b). The third portion (22c) is disposed so as not to overlie any pixel electrode other than a pixel electrode (30) that is electrically connected to the drain electrode (24).
    • 设置在有源矩阵基板(100)上的存储电容对置电极(22)包括:第一部分(22b),其形成具有辅助电容总线(12)的存储电容;第二部分(22a),介于第一部分 22b)和漏电极(24),第三部分(22c)与第二部分(22a)相对设置,第一部分(22b)夹在其间并从第一部分(22b)突出。 第三部分(22c)被设置为不覆盖除了与漏电极(24)电连接的像素电极(30)之外的任何像素电极。
    • 45. 发明授权
    • Method of manufacturing element substrate
    • 元件基板的制造方法
    • US09276019B2
    • 2016-03-01
    • US14131232
    • 2012-07-12
    • Takaharu YamadaRyohki ItohMasahiro YoshidaHidetoshi NakagawaTakuya OhishiMasahiro MatsudaKazutoshi Kida
    • Takaharu YamadaRyohki ItohMasahiro YoshidaHidetoshi NakagawaTakuya OhishiMasahiro MatsudaKazutoshi Kida
    • H01L27/12G02F1/1333G09G3/36G02F1/13H01L21/66G02F1/1345
    • H01L27/1262G02F1/1309G02F1/1345H01L22/14H01L22/32H01L27/124
    • A method of manufacturing an array substrate 20 according to the present invention includes a line forming step, and line forming step includes following performances. A plurality of source lines 27 are formed on a glass substrate GS so as to extend from a first region A1 on the glass substrate GS to a second region A2 that is adjacent to the first region on an outer side thereof. A plurality of source driver side check lines 45A are formed on the glass substrate GS so as to extend from the second region A2 to a third region that is adjacent to the first region A1 on an outer side thereof and adjacent to the second region A2. A plurality of first line connection portions 49 are formed in the second region A2 and the first line connection portions 49 connect the source lines 27 and the first source driver side check lines 45A. A capacity stem line 43 and a common line 44 are formed to extend from the first region A1 to the third region A3. A second source driver side check line 45B and a second line connection portion 50 that connects each of the capacity stem line 43 and the common line 44 and the source driver side check line 45B are formed in the third region A3.
    • 根据本发明的阵列基板20的制造方法包括线形成步骤,线形成步骤包括以下性能。 多个源极线27形成在玻璃基板GS上,以从玻璃基板GS上的第一区域A1延伸到与其外侧相邻的第一区域的第二区域A2。 多个源极驱动器侧检查线45A形成在玻璃基板GS上,从第二区域A2延伸到与第二区域A2的外侧相邻的与第一区域A1相邻的第三区域。 多个第一线路连接部分49形成在第二区域A2中,并且第一线路连接部分49连接源极线路27和第一源极驱动器侧检查线路45A。 容纳杆线43和公共线44形成为从第一区域A1延伸到第三区域A3。 在第三区域A3中形成有第二源极驱动器侧检查线45B和连接容量杆线43和公共线44以及源极驱动器侧检查线45B中的每一个的第二线路连接部50。
    • 46. 发明申请
    • METHOD OF MANUFACTURING ELEMENT SUBSTRATE
    • 制造元件基板的方法
    • US20150044789A1
    • 2015-02-12
    • US14131232
    • 2012-07-12
    • Takaharu YamadaRyohki ItohMasahiro YoshidaHidetoshi NakagawaTakuya OhishiMasahiro MatsudaKazutoshi Kida
    • Takaharu YamadaRyohki ItohMasahiro YoshidaHidetoshi NakagawaTakuya OhishiMasahiro MatsudaKazutoshi Kida
    • H01L27/12H01L21/66
    • H01L27/1262G02F1/1309G02F1/1345H01L22/14H01L22/32H01L27/124
    • A method of manufacturing an array substrate 20 according to the present invention includes a line forming step, and line forming step includes following performances. A plurality of source lines 27 are formed on a glass substrate GS so as to extend from a first region A1 on the glass substrate GS to a second region A2 that is adjacent to the first region on an outer side thereof. A plurality of source driver side check lines 45A are formed on the glass substrate GS so as to extend from the second region A2 to a third region that is adjacent to the first region A1 on an outer side thereof and adjacent to the second region A2. A plurality of first line connection portions 49 are formed in the second region A2 and the first line connection portions 49 connect the source lines 27 and the first source driver side check lines 45A. A capacity stem line 43 and a common line 44 are formed to extend from the first region A1 to the third region A3. A second source driver side check line 45B and a second line connection portion 50 that connects each of the capacity stem line 43 and the common line 44 and the source driver side check line 45B are formed in the third region A3.
    • 根据本发明的阵列基板20的制造方法包括线形成步骤,线形成步骤包括以下性能。 多个源极线27形成在玻璃基板GS上,以从玻璃基板GS上的第一区域A1延伸到与其外侧相邻的第一区域的第二区域A2。 多个源极驱动器侧检查线45A形成在玻璃基板GS上,从第二区域A2延伸到与第二区域A2的外侧相邻的与第一区域A1相邻的第三区域。 多个第一线路连接部分49形成在第二区域A2中,并且第一线路连接部分49连接源极线路27和第一源极驱动器侧检查线路45A。 容纳杆线43和公共线44形成为从第一区域A1延伸到第三区域A3。 在第三区域A3中形成有第二源极驱动器侧检查线45B和连接容量杆线43和公共线44以及源极驱动器侧检查线45B中的每一个的第二线路连接部50。
    • 48. 发明授权
    • Active matrix substrate and display device
    • 有源矩阵基板和显示装置
    • US08947607B2
    • 2015-02-03
    • US13991968
    • 2011-12-05
    • Masahiro YoshidaTakaharu Yamada
    • Masahiro YoshidaTakaharu Yamada
    • G02F1/1343
    • G02F1/134336
    • A storage capacitor counter electrode (22) provided on an active matrix substrate (100) includes a first portion (22b) creating a storage capacitance with a storage capacitor bus line (12), a second portion (22a) interposed between the first portion (22b) and a drain electrode (24), and a third portion (22c) being provided opposite from the second portion (22a) with the first portion (22b) sandwiched therebetween and protruding from the first portion (22b). The third portion (22c) is disposed so as not to overlie any pixel electrode other than a pixel electrode (30) that is electrically connected to the drain electrode (24).
    • 设置在有源矩阵基板(100)上的存储电容对置电极(22)包括:第一部分(22b),其形成具有辅助电容总线(12)的存储电容;第二部分(22a),介于第一部分 22b)和漏电极(24),第三部分(22c)与第二部分(22a)相对设置,第一部分(22b)夹在其间并从第一部分(22b)突出。 第三部分(22c)被设置为不覆盖除了与漏电极(24)电连接的像素电极(30)之外的任何像素电极。
    • 50. 发明申请
    • DISPLAY APPARATUS
    • 显示设备
    • US20110298774A1
    • 2011-12-08
    • US13138437
    • 2009-10-09
    • Takaharu YamadaYasunao IwataKuniko MaenoYasuhiro MimuraTomoo FurukawaHideki MoriiTetsuya Fujikawa
    • Takaharu YamadaYasunao IwataKuniko MaenoYasuhiro MimuraTomoo FurukawaHideki MoriiTetsuya Fujikawa
    • G09G5/00
    • G09G3/3614G09G2320/0247G09G2320/0252G09G2320/0285G09G2340/16
    • An LUT fixedly stores correction values to compensate for a pull-in voltage in pixels in a liquid crystal panel. In at least one example embodiment, the display control unit outputs an input video signal Xa, a video signal Xp of a previous frame read from a frame memory, and a pixel polarity indicating a polarity of a pixel applied voltage on the pixel basis, and outputs a correction value read from the LUT to a data line driving circuit as a video signal Xb after correction. The data line driving circuit performs alternate current driving, based on the video signal Xb after correction. The LUT stores different correction values between when a positive polarity voltage is applied and when a negative polarity voltage is applied, for at least a part of combinations of values of the input video signal Xa and the video signal Xp of the previous frame. This can reduce a difference in response speed between when the positive polarity voltage is applied and when the negative polarity voltage is applied, thereby enhancing display quality.
    • LUT固定地存储校正值以补偿液晶面板中的以像素为单位的拉入电压。 在至少一个示例性实施例中,显示控制单元输出输入视频信号Xa,从帧存储器读取的先前帧的视频信号Xp和表示像素基础上的像素施加电压的极性的像素极性,以及 在校正之后将从LUT读取的校正值作为视频信号Xb输出到数据线驱动电路。 数据线驱动电路根据校正后的视频信号Xb进行交流驱动。 对于输入视频信号Xa和前一帧的视频信号Xp的值的组合的至少一部分,LUT存储施加正极性电压和施加负极性电压之间的不同校正值。 这可以减小施加正极性电压时和施加负极性电压之间的响应速度差,从而提高显示质量。