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41. 发明申请

US20130127006A1 GAN-BASED SCHOTTKY BARRIER DIODE WITH FIELD PLATE 有权
标题翻译：基于GAN的肖特基二极管与现场板
公开(公告)号：US20130127006A1
公开(公告)日：2013-05-23
申请号：US13300028
申请日：2011-11-18
申请人： Madhan Raj , Richard J. Brown , Thomas R. Prunty , David P. Bour , lsik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano
发明人： Madhan Raj , Richard J. Brown , Thomas R. Prunty , David P. Bour , lsik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano
IPC分类号： H01L29/47 , H01L21/20
CPC分类号： H01L29/66143 , H01L29/0661 , H01L29/2003 , H01L29/402 , H01L29/66212 , H01L29/872
摘要： A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer.
摘要翻译：一种制造III族氮化物半导体器件的方法包括提供具有第一表面和与第一表面相对的第二表面的III族氮化物衬底，形成耦合到III族氮化物衬底的第一表面的III族氮化物外延层，以及去除所述III族氮化物外延层的至少一部分以形成第一暴露表面。该方法还包括形成耦合到第一暴露表面的电介质层，去除电介质层的至少一部分，以及形成耦合到电介质层的剩余部分的金属层，使得电介质层的剩余部分被布置在III族氮化物外延层和金属层之间。

42. 发明授权

US08716716B2 Method and system for junction termination in GaN materials using conductivity modulation 有权
标题翻译：使用电导率调制的GaN材料中的结端接方法和系统
公开(公告)号：US08716716B2
公开(公告)日：2014-05-06
申请号：US13334742
申请日：2011-12-22
申请人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
发明人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
IPC分类号： H01L21/335 , H01L29/20
CPC分类号： H01L21/0254 , H01L21/2654 , H01L21/266 , H01L29/0611 , H01L29/0642 , H01L29/0692 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/66924 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.
摘要翻译：半导体结构包括具有第一表面和与第一表面相对的第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括耦合到GaN衬底的第二表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN外延层。第二GaN外延层包括有源器件区，第一结端接区，其特征在于具有第一注入分布的注入区，以及第二结终端区，其特征在于具有第二注入分布的注入区。

43. 发明授权

US08822311B2 Method of fabricating a GaN P-i-N diode using implantation 有权
标题翻译：使用注入制造GaN P-i-N二极管的方法
公开(公告)号：US08822311B2
公开(公告)日：2014-09-02
申请号：US13335329
申请日：2011-12-22
申请人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown , Donald R. Disney
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown , Donald R. Disney
IPC分类号： H01L29/20 , H01L29/24
CPC分类号： H01L29/868 , H01L29/0615 , H01L29/0649 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/6631 , H01L29/66924
摘要： A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region.
摘要翻译： III族氮化物半导体器件包括用于在III族氮化物半导体器件的正向偏置操作期间支持电流的有源区域。有源区包括具有第一导电类型的第一III族氮化物外延材料和具有第二导电类型的第二III族氮化物外延材料。 III族氮化物半导体器件还包括物理地邻近有源区的边缘终端区，并且包括包含第一III族氮化物外延材料的一部分的注入区。第一III族氮化物外延材料的注入区域相对于与注入区域相邻的第一III族氮化物外延材料的部分具有降低的导电性。

44. 发明申请

US20130161780A1 METHOD OF FABRICATING A GAN P-I-N DIODE USING IMPLANTATION 有权
公开(公告)号：US20130161780A1
公开(公告)日：2013-06-27
申请号：US13335329
申请日：2011-12-22
申请人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown , Donald R. Disney
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown , Donald R. Disney
IPC分类号： H01L29/868 , H01L21/20
CPC分类号： H01L29/868 , H01L29/0615 , H01L29/0649 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/6631 , H01L29/66924
摘要： A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region

45. 发明申请

US20130161633A1 METHOD AND SYSTEM FOR JUNCTION TERMINATION IN GAN MATERIALS USING CONDUCTIVITY MODULATION 有权
标题翻译：使用电导率调制的燃料材料中结点终止的方法和系统
公开(公告)号：US20130161633A1
公开(公告)日：2013-06-27
申请号：US13334742
申请日：2011-12-22
申请人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
发明人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
IPC分类号： H01L29/20 , H01L21/20
CPC分类号： H01L21/0254 , H01L21/2654 , H01L21/266 , H01L29/0611 , H01L29/0642 , H01L29/0692 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/66924 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.
摘要翻译：半导体结构包括具有第一表面和与第一表面相对的第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括耦合到GaN衬底的第二表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN外延层。第二GaN外延层包括有源器件区，第一结端接区，其特征在于具有第一注入分布的注入区，以及第二结终端区，其特征在于具有第二注入分布的注入区。

46. 发明授权

US08698164B2 Vertical GaN JFET with gate source electrodes on regrown gate 有权
标题翻译：在再生栅上具有栅极源电极的垂直GaN JFET
公开(公告)号：US08698164B2
公开(公告)日：2014-04-15
申请号：US13315720
申请日：2011-12-09
申请人： Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
发明人： Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
IPC分类号： H01L29/808 , H01L21/335
CPC分类号： H01L29/8083 , H01L29/0623 , H01L29/2003 , H01L29/402 , H01L29/66446 , H01L29/66462 , H01L29/66909 , H01L29/66924
摘要： A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
摘要翻译：半导体结构包括具有第一表面和第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。第一电极电耦合到GaN衬底的第二表面。半导体结构还包括耦合到GaN衬底的第一表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN层。第一GaN外延层包括沟道区。第二GaN外延层包括栅极区域和边缘端接结构。耦合到栅极区域的第二电极和耦合到沟道区域的第三电极都设置在边缘端接结构内。

47. 发明授权

US08829574B2 Method and system for a GaN vertical JFET with self-aligned source and gate 有权
标题翻译：具有自对准源极和栅极的GaN垂直JFET的方法和系统
公开(公告)号：US08829574B2
公开(公告)日：2014-09-09
申请号：US13334514
申请日：2011-12-22
申请人： Donald R. Disney , Isik C. Kizilyalli , Hui Nie , Linda Romano , Richard J. Brown , Madhan Raj
发明人： Donald R. Disney , Isik C. Kizilyalli , Hui Nie , Linda Romano , Richard J. Brown , Madhan Raj
IPC分类号： H01L29/808 , H01L21/335 , H01L29/66 , H01L29/78
CPC分类号： H01L29/66924 , H01L21/027 , H01L21/283 , H01L21/308 , H01L29/1095 , H01L29/2003 , H01L29/402 , H01L29/66446 , H01L29/66893 , H01L29/66909 , H01L29/66916 , H01L29/7832 , H01L29/808 , H01L29/8083 , H01L29/8086
摘要： A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.
摘要翻译：半导体器件包括III族氮化物衬底，耦合到III族氮化物衬底并具有台面的第一III族氮化物外延层和耦合到台面的顶表面的第二III族氮化物外延层。半导体器件还包括耦合到台面的侧表面的III族氮化物栅极结构，以及被配置为在第二III族氮化物外延层和III族氮化物栅极结构之间提供电绝缘的间隔物。

48. 发明申请

US20130146886A1 Vertical GaN JFET with Gate Source Electrodes on Regrown Gate 有权
标题翻译：垂直GaN JFET与栅极源电极在Regrown Gate
公开(公告)号：US20130146886A1
公开(公告)日：2013-06-13
申请号：US13315720
申请日：2011-12-09
申请人： Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
发明人： Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
IPC分类号： H01L29/808 , H01L21/335 , H01L29/20
CPC分类号： H01L29/8083 , H01L29/0623 , H01L29/2003 , H01L29/402 , H01L29/66446 , H01L29/66462 , H01L29/66909 , H01L29/66924
摘要： A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
摘要翻译：半导体结构包括具有第一表面和第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。第一电极电耦合到GaN衬底的第二表面。半导体结构还包括耦合到GaN衬底的第一表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN层。第一GaN外延层包括沟道区。第二GaN外延层包括栅极区域和边缘端接结构。耦合到栅极区域的第二电极和耦合到沟道区域的第三电极都设置在边缘端接结构内。

49. 发明申请

US20130161705A1 METHOD AND SYSTEM FOR A GAN VERTICAL JFET WITH SELF-ALIGNED SOURCE AND GATE 有权
标题翻译：具有自对准源和门的GAN垂直JFET的方法和系统
公开(公告)号：US20130161705A1
公开(公告)日：2013-06-27
申请号：US13334514
申请日：2011-12-22
申请人： Don Disney , Isik C. Kizilyalli , Hui Ne , Linda Romano , Richard J. Brown , Madhan Raj
发明人： Don Disney , Isik C. Kizilyalli , Hui Ne , Linda Romano , Richard J. Brown , Madhan Raj
IPC分类号： H01L29/808 , H01L21/337
CPC分类号： H01L29/66924 , H01L21/027 , H01L21/283 , H01L21/308 , H01L29/1095 , H01L29/2003 , H01L29/402 , H01L29/66446 , H01L29/66893 , H01L29/66909 , H01L29/66916 , H01L29/7832 , H01L29/808 , H01L29/8083 , H01L29/8086
摘要： A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.
摘要翻译：半导体器件包括III族氮化物衬底，耦合到III族氮化物衬底并具有台面的第一III族氮化物外延层和耦合到台面的顶表面的第二III族氮化物外延层。半导体器件还包括耦合到台面的侧表面的III族氮化物栅极结构，以及被配置为在第二III族氮化物外延层和III族氮化物栅极结构之间提供电绝缘的间隔物。

50. 发明授权

US08716078B2 Method and system for a gallium nitride vertical JFET with self-aligned gate metallization 有权
标题翻译：具有自对准栅极金属化的氮化镓垂直JFET的方法和系统
公开(公告)号：US08716078B2
公开(公告)日：2014-05-06
申请号：US13468325
申请日：2012-05-10
申请人： Donald R. Disney , Richard J. Brown , Hui Nie
发明人： Donald R. Disney , Richard J. Brown , Hui Nie
IPC分类号： H01L21/337
CPC分类号： H01L29/8083 , H01L29/2003 , H01L29/66909
摘要： A semiconductor device includes a III-nitride substrate and a first III-nitride epitaxial layer coupled to the III-nitride substrate and comprising a drift region, a channel region, and an extension region. The channel region is separated from the III-nitride substrate by the drift region. The channel region is characterized by a first width. The extension region is separated from the drift region by the channel region. The extension region is characterized by a second width less than the first width. The semiconductor device also includes a second III-nitride epitaxial layer coupled to a top surface of the extension region, a III-nitride gate structure coupled to a sidewall of the channel region and laterally self-aligned with respect to the extension region, and a gate metal structure in electrical contact with the III-nitride gate structure and laterally self-aligned with respect to the extension region.
摘要翻译：半导体器件包括III族氮化物衬底和耦合到III族氮化物衬底并且包括漂移区，沟道区和延伸区的第一III族氮化物外延层。沟道区域通过漂移区域与III族氮化物衬底分离。通道区域的特征在于第一宽度。延伸区域通过沟道区域与漂移区域分离。延伸区域的特征在于小于第一宽度的第二宽度。半导体器件还包括耦合到延伸区域的顶表面的第二III族氮化物外延层，耦合到沟道区域的侧壁并相对于延伸区域横向自对准的III族氮化物栅极结构，以及栅极金属结构与III族氮化物栅极结构电接触并且相对于延伸区域横向自对准。

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