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41. 发明授权

US06888435B2 Composite magnetic body, and magnetic element and method of manufacturing the same 有权
标题翻译：复合磁体，磁性元件及其制造方法
公开(公告)号：US06888435B2
公开(公告)日：2005-05-03
申请号：US10843007
申请日：2004-05-11
申请人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
发明人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
IPC分类号： H01F1/24 , H01F1/26 , H01F1/28 , H01F1/33 , H01F17/04 , H01F27/02 , H01F41/02 , H01F41/12
CPC分类号： H01F41/127 , H01F1/24 , H01F1/26 , H01F1/28 , H01F17/04 , H01F27/027 , H01F27/292 , H01F41/0246 , Y10S156/922 , Y10T29/49002 , Y10T29/4902 , Y10T29/49021 , Y10T29/49071 , Y10T29/49073 , Y10T29/49158 , Y10T29/49172 , Y10T29/49176 , Y10T29/4922 , Y10T29/49261 , Y10T29/49277 , Y10T156/1082 , Y10T156/11 , Y10T428/11 , Y10T428/32
摘要： The present invention provides a composite magnetic body containing metallic magnetic powder and thermosetting resin and having a packing ratio of the metallic magnetic powder of 65 vol % to 90 vol % and an electrical resistivity of at least 104 Ω·cm. When a coil is embedded in this composite magnetic body, a miniature magnetic element can be obtained that has a high inductance value and is excellent in DC bias characteristics.
摘要翻译：本发明提供一种复合磁体，其含有金属磁性粉末和热固性树脂，其金属磁性粉末的填充率为65体积％〜90体积％，电阻率为至少10体积％。厘米。当将该线圈嵌入该复合磁体时，可以得到具有高电感值且DC偏置特性优异的微型磁性元件。

42. 发明授权

US06835681B2 Dielectric ceramic composition and dielectric device 失效
标题翻译：介电陶瓷组合物和电介质器件
公开(公告)号：US06835681B2
公开(公告)日：2004-12-28
申请号：US10027620
申请日：2001-12-19
申请人： Kojiro Okuyama , Hiroshi Kagata , Junichi Kato , Hiroyuki Hase
发明人： Kojiro Okuyama , Hiroshi Kagata , Junichi Kato , Hiroyuki Hase
IPC分类号： C03C1400
CPC分类号： H01P1/20345 , C03C8/18 , C03C8/20 , C03C14/004 , C04B35/49 , H01G4/1245 , H01G4/1263 , H01G4/129
摘要： A dielectric ceramic composition containing a first component and a second component (25 to 80 wt %) is used. The first component is a complex oxide represented by Formula: xZrO2-yTiO2-zL(1+u)/3M(2−u)/3O2 (L is at least one element selected from the group consisting of Mg, Zn, Co, and Mn, and M is at least one element selected from the group consisting of Nb and Tb. x, y, z, and u are numerical values represented by x+y+z=1, 0.10≦x≦0.60, 0.20 ≦y≦0.60, 0.01≦z≦0.70, 0≦u≦1.90). The second component is a glass composition containing an oxide of at least one element selected from the group consisting of Si, B, Al, Ba, Ca, Sr, Zn, Ti, La, and Nd.
摘要翻译：使用含有第一成分和第二成分（25〜80重量％）的电介质陶瓷组合物。第一组分是由下式表示的复合氧化物：xZrO2-yTiO2-zL（1 + u）/ 3M（2-u）/ 3O2（L是选自Mg，Zn，Co和 Mn和M是选自Nb和Tb中的至少一种元素，x，y，z，u是由x + y + z = 1，0.10 <= x <= 0.60,0.20， = y <= 0.60,0.01 <= z <= 0.70,0 <= u <= 1.90）。第二组分是含有选自Si，B，Al，Ba，Ca，Sr，Zn，Ti，La和Nd中的至少一种元素的氧化物的玻璃组合物。

43. 发明授权

US06706965B2 Device for deterring cable displacement 失效
标题翻译：用于阻止电缆位移的装置
公开(公告)号：US06706965B2
公开(公告)日：2004-03-16
申请号：US10078312
申请日：2002-02-15
申请人： Junichi Kato , Renato Ravanello
发明人： Junichi Kato , Renato Ravanello
IPC分类号： H01B734
CPC分类号： H01R4/726 , H01R13/5216
摘要： A device for deterring displacement of a cable is effectuated in an embodiment of the invention by an enclosure that envelopes the cable and an affixing mechanism that couples the enclosure to the cable, where the cable is oriented in an assembly such that the enclosure contacts a feature internal to the assembly and deters displacement of the cable.
摘要翻译：用于阻止电缆的位移的装置在本发明的实施例中通过包围电缆的外壳和将外壳耦合到电缆的固定机构来实现，其中电缆被定位在组件中，使得外壳接触特征在组件内部并阻止电缆的位移。

44. 发明授权

US06380585B1 Nonvolatile semiconductor device capable of increased electron injection efficiency 失效
标题翻译：能够提高电子注入效率的非易失性半导体器件
公开(公告)号：US06380585B1
公开(公告)日：2002-04-30
申请号：US09588308
申请日：2000-06-06
申请人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
发明人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L29/42324 , H01L29/7885
摘要： The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; a second insulating film formed on the floating gate; and a control gate which is capacitively coupled to the floating gate via the second insulating film. The drain region includes a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region. As impurity concentration of the low-concentration impurity layer is lower than an impurity concentration of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.
摘要翻译：本发明的非易失性半导体存储器件包括：半导体衬底，具有包括第一层的第一表面区域，低于第一层次的第二层的第二表面区域和将第一表面区域和第二表面区域在一起; 形成在所述半导体衬底的所述第一表面区域中的沟道区; 源极区域和漏极区域，其形成在半导体衬底的表面中，以便在其间插入沟道区域; 形成在所述半导体衬底的表面上的第一绝缘膜; 形成在第一绝缘膜上的浮栅; 形成在浮动栅极上的第二绝缘膜; 以及通过第二绝缘膜电容耦合到浮动栅极的控制栅极。漏区包括形成在第二表面区域中并且具有朝向台阶侧区域延伸的一端的低浓度杂质层和连接到低浓度杂质层的高浓度杂质层，形成在远离通道区域的区域中。由于低浓度杂质层的杂质浓度低于高浓度杂质层的杂质浓度。浮置栅极经由第一绝缘膜覆盖台阶侧区域和至少一部分低浓度杂质层。

45. 发明授权

US06358799B2 Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device 失效
标题翻译：非易失性半导体存储器件及其制造方法以及半导体集成电路器件
公开(公告)号：US06358799B2
公开(公告)日：2002-03-19
申请号：US09727536
申请日：2000-12-04
申请人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
发明人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
IPC分类号： H01L21336
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： In a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together, a channel region has a triple structure. Thus, a high electric field is formed in a corner portion between the step side region and the second surface region and in the vicinity thereof. A high electric field is also formed in the first surface region. As a result, the efficiency, with which electrons are injected into a floating gate, is considerably increased.
摘要翻译：在具有包括第一水平的第一表面区域的表面的半导体衬底中，具有低于第一水平的第二水平的第二表面区域和将第一表面区域和第二表面区域连接在一起的阶梯侧区域，通道区域有三重结构。因此，在台阶侧区域和第二表面区域之间的角部及其附近形成高电场。在第一表面区域也形成高电场。结果，电子注入浮栅的效率大大增加。

46. 发明授权

US06303438B1 Method for manufacturing a nonvolatile semiconductor memory device having increased hot electron injection efficiency 失效
标题翻译：制造具有增加的热电子注入效率的非易失性半导体存储器件的方法
公开(公告)号：US06303438B1
公开(公告)日：2001-10-16
申请号：US09017216
申请日：1998-02-02
申请人： Atsushi Hori , Junichi Kato , Shinji Odanaka , Seiki Ogura
发明人： Atsushi Hori , Junichi Kato , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L21336
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42336 , H01L29/7885
摘要： The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; and a control gate which is capacitively coupled to the floating gate via a second insulating film. The first insulating film includes a first gate insulating film portion formed in the first surface region, and, a second gate insulating film portion formed in the step side region and the second surface region. The control gate is formed on the first gate insulating film portion. A part of the floating gate faces the step side region via the second gate insulating film portion, and another part of the floating gate is adjacent to the control gate via the second insulating film.
摘要翻译：本发明的非易失性半导体存储器件包括：半导体衬底，具有包括第一层的第一表面区域，低于第一层次的第二层的第二表面区域和将第一表面区域和第二表面区域在一起; 形成在所述半导体衬底的所述第一表面区域中的沟道区; 源极区域和漏极区域，其形成在半导体衬底的表面中，以便在其间插入沟道区域; 形成在所述半导体衬底的表面上的第一绝缘膜; 形成在第一绝缘膜上的浮栅; 以及通过第二绝缘膜电容耦合到浮置栅极的控制栅极。第一绝缘膜包括形成在第一表面区域中的第一栅极绝缘膜部分和形成在台阶侧区域和第二表面区域中的第二栅极绝缘膜部分。控制栅极形成在第一栅极绝缘膜部分上。浮栅的一部分经由第二栅极绝缘膜部分面对台阶侧区域，浮栅的另一部分经由第二绝缘膜与控制栅极相邻。

47. 发明授权

US6121655A Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit 失效
标题翻译：非易失性半导体存储器件及其制造方法和半导体集成电路
公开(公告)号：US6121655A
公开(公告)日：2000-09-19
申请号：US848
申请日：1997-12-30
申请人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
发明人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
IPC分类号： G11C16/04 , H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792 , H01L29/76
CPC分类号： H01L29/66825 , H01L29/42324 , H01L29/7885
摘要： The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; a second insulating film formed on the floating gate; and a control gate which is capacitively coupled to the floating gate via the second insulating film. The drain region includes a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region. As impurity concentration of the low-concentration impurity layer is lower than an impurity concentration of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.
摘要翻译：本发明的非易失性半导体存储器件包括：半导体衬底，具有包括第一层的第一表面区域，低于第一层次的第二层的第二表面区域和将第一表面区域和第二表面区域在一起; 形成在所述半导体衬底的所述第一表面区域中的沟道区; 源极区域和漏极区域，其形成在半导体衬底的表面中，以便在其间插入沟道区域; 形成在所述半导体衬底的表面上的第一绝缘膜; 形成在第一绝缘膜上的浮栅; 形成在浮动栅极上的第二绝缘膜; 以及通过第二绝缘膜电容耦合到浮动栅极的控制栅极。漏区包括形成在第二表面区域中并且具有朝向台阶侧区域延伸的一端的低浓度杂质层和连接到低浓度杂质层的高浓度杂质层，形成在远离通道区域的区域中。由于低浓度杂质层的杂质浓度低于高浓度杂质层的杂质浓度。浮置栅极经由第一绝缘膜覆盖台阶侧区域和至少一部分低浓度杂质层。

48. 发明授权

US5929727A Dielectric resonator, method for manufacturing the same, filter and communication apparatus 失效
标题翻译：介质谐振器及其制造方法，滤波器及通信装置
公开(公告)号：US5929727A
公开(公告)日：1999-07-27
申请号：US947739
申请日：1997-10-10
申请人： Hiroshi Kagata , Tatsuya Inoue , Junichi Kato , Hiroshi Sogo
发明人： Hiroshi Kagata , Tatsuya Inoue , Junichi Kato , Hiroshi Sogo
IPC分类号： H01P7/04
CPC分类号： H01P7/04
摘要： A coaxial dielectric resonator which is prismatic and has a through hole in a vertical direction, has such feature that each base side of said prism being no more than 1.6 mm, a diameter of said through hole being no more than 0.8 mm, said coaxial dielectric resonator having an electrode portion on a surface thereof and on an inner surface of said through hole.
摘要翻译：所述同轴电介质谐振器是棱柱形的并且在垂直方向上具有通孔，其特征在于，所述棱镜的每个基极侧不大于1.6mm，所述通孔的直径不大于0.8mm，所述同轴电介质谐振器，其表面上具有电极部分，并且在所述通孔的内表面上。

49. 发明授权

US5412480A Image forming apparatus with fixer temperature control 失效
标题翻译：具有定影温度控制的图像形成装置
公开(公告)号：US5412480A
公开(公告)日：1995-05-02
申请号：US191548
申请日：1994-02-04
申请人： Yoji Serizawa , Akio Noguchi , Yukihide Ushio , Shimpei Matsuo , Kazuro Yamada , Seiji Uchiyama , Makoto Takeuchi , Koichi Suwa , Koichi Hiroshima , Shinichi Tsukida , Manabu Takano , Masahiro Goto , Takahiro Inoue , Hiromichi Yamada , Junichi Kato , Masaki Ojima
发明人： Yoji Serizawa , Akio Noguchi , Yukihide Ushio , Shimpei Matsuo , Kazuro Yamada , Seiji Uchiyama , Makoto Takeuchi , Koichi Suwa , Koichi Hiroshima , Shinichi Tsukida , Manabu Takano , Masahiro Goto , Takahiro Inoue , Hiromichi Yamada , Junichi Kato , Masaki Ojima
IPC分类号： G03G15/00 , G03G15/20 , G06K15/16 , H04N1/23 , G01D15/06 , G03G21/00
CPC分类号： G03G15/50 , G03G15/2003 , G03G15/6564 , G06K15/16 , G03G2215/00599
摘要： An image forming apparatus comprises includes a feeder means and recorder. The feeder feeds a sheet of recording paper to a predetermined position in response to a spare paper feed signal instructing the feeding of the sheet of recording paper to the predetermined position preliminarily, and then feeds the sheet of recording paper being stopped at the predetermined position again in response to a record request signal. The recorder records an image on the sheet of recording paper fed by the feeder means through an electrophotographic process. The recorder means starts preparation to execute the electrophotographic process upon receiving the spare paper feed signal. As a result, throughput is increased without causing other problems.
摘要翻译：图像形成装置包括馈送装置，记录器。响应于指示将记录纸张预先进给到预定位置的备用供纸信号，馈送器将一张记录纸馈送到预定位置，然后再次将停止在该预定位置的记录纸张送入响应于记录请求信号。记录器通过电子照相处理将图像记录在由馈送装置馈送的记录纸上。记录器装置在接收到备用供纸信号时开始准备执行电子照相处理。结果，吞吐量增加而不引起其他问题。

50. 发明授权

US5353104A Defining member for defining thickness of one-component developer and developing device equipped with it 失效
标题翻译：定义用于定义单组分显影剂和配备其的显影装置的厚度的构件
公开(公告)号：US5353104A
公开(公告)日：1994-10-04
申请号：US18715
申请日：1993-02-17
申请人： Junichi Kato , Masaharu Ohkubo , Masahiro Watabe , Noriyuki Yanai , Masaki Ojima , Hiroshi Sato
发明人： Junichi Kato , Masaharu Ohkubo , Masahiro Watabe , Noriyuki Yanai , Masaki Ojima , Hiroshi Sato
IPC分类号： G03G15/08 , G03G15/09 , G03G15/06
CPC分类号： G03G15/0812 , G03G15/09
摘要： An elastic blade which is maintained in contact with the developing sleeve for defining the thickness of one-component developer to be transported by the developing sleeve to a developing area, is composed of an elastic base member, and a surface layer coated thereon and giving friction on the one-component developer, and the surface layer contains a substance chargeable frictionally to a polarity opposite to the triboelectric polarity of the one-component developer and another substance chargeable frictionally to a polarity the same as the triboelectric polarity of the one-component developer, and is charged frictionally, in total, to a polarity opposite to the polarity of the one-component developer.
摘要翻译：保持与显影套筒保持接触的弹性刮刀由用于限定由显影套筒传送到显影区域的单组分显影剂的厚度由弹性基底构件和涂覆在其上的表面层组成，并产生摩擦在单组分显影剂上，并且表面层含有可摩擦地带电至与单组分显影剂的摩擦电极性相反的极性的物质，以及可摩擦地进行充电的极性与单组分显影剂的摩擦电极性相同的物质并且总体上摩擦地被充电到与单组分显影剂的极性相反的极性。

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