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41. 发明授权

US07730547B2 Smart materials: strain sensing and stress determination by means of nanotube sensing systems, composites, and devices 失效
标题翻译：智能材料：通过纳米管感应系统，复合材料和器件的应变感应和应力测定
公开(公告)号：US07730547B2
公开(公告)日：2010-06-01
申请号：US10542697
申请日：2004-01-23
申请人： Enrique V. Barrera , Satish Nagarajaiah , Prasad Dharap , Li Zhiling , Jong Dae Kim
发明人： Enrique V. Barrera , Satish Nagarajaiah , Prasad Dharap , Li Zhiling , Jong Dae Kim
IPC分类号： G01N23/00
CPC分类号： G01D5/12 , B82Y15/00 , G01K11/20 , G01L1/005 , G01L1/2287 , G01L1/2293 , G01L1/241
摘要： The present invention is directed toward devices comprising carbon nanotubes that are capable of detecting displacement, impact, stress, and/or strain in materials, methods of making such devices, methods for sensing/detecting/monitoring displacement, impact, stress, and/or strain via carbon nanotubes, and various applications for such methods and devices. The devices and methods of the present invention all rely on mechanically-induced electronic perturbations within the carbon nanotubes to detect and quantify such stress/strain. Such detection and quantification can rely on techniques which include, but are not limited to, electrical conductivity/conductance and/or resistivity/resistance detection/measurements, thermal conductivity detection/measurements, electroluminescence detection/measurements, photoluminescence detection/measurements, and combinations thereof. All such techniques rely on an understanding of how such properties change in response to mechanical stress and/or strain.
摘要翻译：本发明涉及包括能够检测材料中的位移，冲击，应力和/或应变的碳纳米管的装置，制造这种装置的方法，用于感测/检测/监测位移，冲击，应力和/或通过碳纳米管的应变，以及用于这种方法和装置的各种应用。本发明的装置和方法都依赖于碳纳米管内机械诱导的电子扰动来检测和量化这种应力/应变。这种检测和定量可以依赖于包括但不限于导电性/电导性和/或电阻率/电阻检测/测量，热导率检测/测量，电致发光检测/测量，光致发光检测/测量及其组合的技术。所有这些技术都依赖于对这些性质如何响应于机械应力和/或应变而变化的理解。

42. 发明授权

US07570312B2 Liquid crystal display module having replaceable light sources 有权
标题翻译：具有可更换光源的液晶显示模块
公开(公告)号：US07570312B2
公开(公告)日：2009-08-04
申请号：US11264394
申请日：2005-11-01
申请人： Jong Dae Kim
发明人： Jong Dae Kim
IPC分类号： G02F1/1333
CPC分类号： G02F1/13452 , G02F1/133615
摘要： Disclosed is a liquid crystal display module which makes it possible to reduce the number of components and manufacturing processes of the liquid crystal display module and to easily replace a failed LED of a backlight unit that irradiates light onto a liquid crystal panel when the LED fails. In the liquid crystal display module, an electric signal is transferred to the liquid crystal panel and the LED through a flexible printed circuit board, and the flexible printed circuit board is electrically and physically connected to the LED by connecting a coupling pin of the LED with a socket of the flexible printed circuit board. In the case in which an LED fails, the coupling pin of the failed LED can be detached from the socket of the flexible printed circuit board, and thus the LED can easily be replaced.
摘要翻译：公开了一种液晶显示模块，其可以减少液晶显示模块的部件数量和制造工艺，并且容易地替换当LED发生故障时将光照射到液晶面板上的背光单元的故障LED。在液晶显示模块中，电信号通过柔性印刷电路板传送到液晶面板和LED，柔性印刷电路板通过将LED的耦合引脚与柔性印刷电路板的插座。在LED发生故障的情况下，故障LED的耦合销可以从柔性印刷电路板的插座脱离，因此可以方便地更换LED。

43. 发明申请

US20090146527A1 PIEZOELECTRIC MICROSPEAKER USING MICROELECTROMECHANICAL SYSTEMS AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：使用微电子系统的压电微型扬声器及其制造方法
公开(公告)号：US20090146527A1
公开(公告)日：2009-06-11
申请号：US12240138
申请日：2008-09-29
申请人： Sang Kyun Lee , Sung Q Lee , Hye Jin Kim , Jae Woo Lee , Kang Ho Park , Jong Dae Kim
发明人： Sang Kyun Lee , Sung Q Lee , Hye Jin Kim , Jae Woo Lee , Kang Ho Park , Jong Dae Kim
IPC分类号： H01L41/09 , H01L41/22
CPC分类号： H01L41/0973 , H01L41/313 , H04R19/005 , H04R19/02 , H04R31/006 , Y10T29/42
摘要： A piezoelectric microspeaker using microelectromechanical systems (MEMS) and a method of manufacturing the same are provided. The piezoelectric microspeaker includes a piezoelectric layer disposed on an elastic thin layer, and a resonance change unit patterned on one of a bottom surface of the elastic thin layer and a top surface of the piezoelectric layer.
摘要翻译：提供了使用微机电系统（MEMS）的压电微型扬声器及其制造方法。压电式微型扬声器包括设置在弹性薄层上的压电层和在弹性薄层的底表面和压电层的顶表面中的一个上构图的谐振改变单元。

44. 发明申请

US20090086072A1 DUAL CDS/PxGA CIRCUIT 失效
标题翻译：双CDS / PxGA电路
公开(公告)号：US20090086072A1
公开(公告)日：2009-04-02
申请号：US12195194
申请日：2008-08-20
申请人： Young Kyun Cho , Young Deuk Jeon , Chong Ki Kwon , Jong Dae Kim
发明人： Young Kyun Cho , Young Deuk Jeon , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H04N3/14 , H03F1/02 , H03K17/00
CPC分类号： H03F3/45973 , H03F1/02 , H03F3/005 , H03F3/45475 , H03F2203/45136 , H03F2203/45514 , H04N5/335 , H04N5/378
摘要： Provided is a dual sampling/pixel gain amplifier (CDS/PxGA) circuit with a shared amplifier, and more particularly, to a dual CDS/PxGA circuit for adjusting a gain of an amplifier based on capacitance. The dual CDS/PxGA circuit comprises: a first sampler for sampling a reset level and a data level of a first pixel; a second sampler for sampling a reset level and a data level of a second pixel; and an operational amplifier for receiving sampling values from the first and second samplers, calculating output signals of the first and second pixels using the sampling values, and amplifying the calculated output signals. Thus, it is possible to reduce a speed of an operational amplifier by using the dual CDS/PxGA structure, reduce power consumption by sharing the operational amplifier, and obtain a variable gain of a wide range by adjusting capacitance using a capacitor array.
摘要翻译：提供了具有共享放大器的双采样/像素增益放大器（CDS / PxGA）电路，更具体地，涉及用于基于电容调整放大器的增益的双CDS / PxGA电路。双CDS / PxGA电路包括：用于对第一像素的复位电平和数据电平进行采样的第一采样器; 第二采样器，用于对第二像素的复位电平和数据电平进行采样; 以及运算放大器，用于从第一和第二采样器接收采样值，使用采样值来计算第一和第二像素的输出信号，并放大所计算的输出信号。因此，可以通过使用双CDS / PxGA结构来降低运算放大器的速度，通过共享运算放大器来降低功耗，并且通过使用电容器阵列调整电容来获得宽范围的可变增益。

45. 发明申请

US20090084434A1 NANOCOMPOSITE AND METHOD OF FABRICATING THE SAME AND DYE-SENSITIZED SOLAR CELL USING THE NANOCOMPOSITE 审中-公开
标题翻译：纳米复合材料及其制备方法和使用纳米复合材料的透明的太阳能电池
公开(公告)号：US20090084434A1
公开(公告)日：2009-04-02
申请号：US12114016
申请日：2008-05-02
申请人： Jong Hyeok PARK , Man Gu Kang , Yong Seok Jun , Seung Yup Lee , Ho Gyeong Yun , Hunkyun Pak , Jong Dae Kim
发明人： Jong Hyeok PARK , Man Gu Kang , Yong Seok Jun , Seung Yup Lee , Ho Gyeong Yun , Hunkyun Pak , Jong Dae Kim
IPC分类号： H01L31/04 , B05D1/16 , B32B5/08 , C25D13/02
CPC分类号： H01G9/2031 , C25D11/02 , C25D11/34 , C25D13/02 , H01G9/2059 , H01L51/0086 , Y02E10/542 , Y10T428/24174
摘要： Provided is a nanocomposite. The nanocomposite includes a plurality of nanotubes arranged perpendicular to a substrate and a plurality of nanoparticles dispersed within each of the plurality of nanotubes or between adjacent ones of the plurality of nanotubes. The nanotube and the nanoparticle are formed of titanium dioxide (TiO2), tin dioxide (SnO2), zinc oxide (ZnO), tungsten trioxide (WO3), or mixtures thereof. The nanoparticle has a spherical, tubular, or rod-like shape.
摘要翻译：提供了一种纳米复合材料。纳米复合材料包括垂直于衬底布置的多个纳米管和分散在多个纳米管的每一个内或多个纳米管中的相邻纳米管之间的多个纳米颗粒。纳米管和纳米颗粒由二氧化钛（TiO 2），二氧化锡（SnO 2），氧化锌（ZnO），三氧化钨（WO 3）或其混合物形成。纳米颗粒具有球形，管状或棒状形状。

46. 发明授权

US07511581B2 Wide-band multimode frequency synthesizer and variable frequency divider 有权
标题翻译：宽带多模频率合成器和可变分频器
公开(公告)号：US07511581B2
公开(公告)日：2009-03-31
申请号：US11634004
申请日：2006-12-05
申请人： Ja Yol Lee , Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim , Sang Heung Lee
发明人： Ja Yol Lee , Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim , Sang Heung Lee
IPC分类号： H03L7/00
CPC分类号： H03K23/667 , H03L7/0898 , H03L7/093 , H03L7/099 , H03L7/193
摘要： A wide-band multimode frequency synthesizer using a Phase Locked Loop (PLL) is provided. The multiband frequency synthesizer includes a multimode prescaler, a phase detector/a charge pump, a swallow type frequency divider, and a switching bank LC tuning voltage-controlled oscillator having wide-band and low phase noise characteristics. The multimode prescaler operates in five modes and divides a signal up to 12 GHz. The wide-band frequency synthesizer can be used in various fields such as WLAN/HYPERLAN/DSRC/UWB systems that operate in the frequency range from 2 GHz to 9 GHz. The wide-band multimode frequency synthesizer includes a frequency/phase detector for comparing a frequency and phase of a reference high-frequency signal with a frequency and phase of a feedback high-frequency signal; a charge pump for producing an output current corresponding to the result of the comparison performed by the frequency/phase detector; a loop filter for producing an output voltage corresponding to an accumulated value of the output current of the charge pump; a voltage-controlled oscillator for generating an oscillation signal having a frequency corresponding to the output voltage of the loop filter; and a variable frequency divider for dividing an output signal of the voltage-controlled oscillator by a designated integer value, and outputting the result as a feedback signal, wherein at lease two of an amount of unit pumping charges of the charge pump, an RLC value of the loop filter, an RLC value of the voltage-controlled oscillator, and a divisor value of the variable frequency divider are controlled according to a band.
摘要翻译：提供了使用锁相环（PLL）的宽带多模频率合成器。多频率频率合成器包括多模预分频器，相位检测器/电荷泵，燕子式分频器和具有宽带和低相位噪声特性的开关组LC调谐压控振荡器。多模预分频器以五种模式工作，并将信号分为12 GHz。宽带频率合成器可用于各种领域，例如在2 GHz至9 GHz频率范围内工作的WLAN / HYPERLAN / DSRC / UWB系统。宽带多模频率合成器包括用于将参考高频信号的频率和相位与反馈高频信号的频率和相位进行比较的频率/相位检测器; 用于产生与由频率/相位检测器执行的比较结果相对应的输出电流的电荷泵; 环路滤波器，用于产生与电荷泵的输出电流的累积值相对应的输出电压; 用于产生具有与环路滤波器的输出电压对应的频率的振荡信号的压控振荡器; 以及可变分频器，用于将压控振荡器的输出信号除以指定的整数值，并输出该结果作为反馈信号，其中至少两个电荷泵的单位泵送电荷，RLC值根据频带控制环路滤波器的电压控制振荡器的RLC值和可变分频器的除数值。

47. 发明申请

US20080136464A1 METHOD OF FABRICATING BIPOLAR TRANSISTORS AND HIGH-SPEED LVDS DRIVER WITH THE BIPOLAR TRANSISTORS 审中-公开
标题翻译：用双极晶体管制作双极晶体管和高速LVDS驱动器的方法
公开(公告)号：US20080136464A1
公开(公告)日：2008-06-12
申请号：US11933025
申请日：2007-10-31
申请人： Kwi Dong KIM , Chong Ki Kwon , Jong Dae Kim
发明人： Kwi Dong KIM , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H03K3/00 , H01L21/8249
CPC分类号： H01L21/8249 , H01L27/0623 , H01L29/41708 , H01L29/7322 , H03F3/45085 , H03F3/45179 , H03F3/45502 , H03F2203/45008 , H03F2203/45082 , H03F2203/45418 , H03F2203/45424 , H03K5/003 , H03K19/01 , H04L25/0276 , H04L25/0282
摘要： Provided is a differential signal driver capable of operating at a high speed at a low voltage of 1.8V. The differential signal driver includes: a differential-signal driving circuit for switching input differential signals and outputting a common mode voltage through first and second output nodes; and a common-mode feedback circuit for providing a predetermined current to the differential-signal driving circuit or receiving a predetermined current from the differential-signal driving circuit in response to the common mode voltage. The differential-signal driving circuit includes a common-mode voltage output circuit for connecting the first output node to the second output node and generating the common mode voltage of the differential-signal driving circuit. The differential input signals are received through two bipolar transistors.
摘要翻译：提供能够以1.8V的低电压高速运行的差分信号驱动器。差分信号驱动器包括：差分信号驱动电路，用于切换输入差分信号并通过第一和第二输出节点输出共模电压; 以及共模反馈电路，用于响应于共模电压，向差分信号驱动电路提供预定电流或从差分信号驱动电路接收预定电流。差分信号驱动电路包括用于将第一输出节点连接到第二输出节点并产生差动信号驱动电路的共模电压的共模电压输出电路。差分输入信号通过两个双极晶体管接收。

48. 发明授权

US07268623B2 Low voltage differential signal driver circuit and method for controlling the same 失效
标题翻译：低压差分信号驱动电路及其控制方法
公开(公告)号：US07268623B2
公开(公告)日：2007-09-11
申请号：US11292673
申请日：2005-12-02
申请人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
发明人： Kwi Dong Kim , Chong Ki Kwon , Jong Dae Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/45748 , H03F2200/513 , H03F2203/45082 , H03F2203/45644
摘要： Provided are a low voltage differential signal driver circuit and a method for controlling the same. The differential signal driver circuit includes: a differential amplification signal generator disposed between a power supply voltage terminal and a ground terminal, and outputting first and second differential amplification signals to first and second output terminals in response to first and second differential input signals, respectively; a common mode voltage generator for generating a common mode voltage in response to DC (direct current) offset voltages of the first and second differential amplification signals; and a variable load portion for controlling a resistance between the power supply voltage terminal and the first output terminal and a resistance between the power supply voltage terminal and the second output terminal in response to the common mode voltage such that the first and second differential amplification signals have constant DC offset voltages.
摘要翻译：提供了一种低电压差分信号驱动电路及其控制方法。差分信号驱动电路包括：差分放大信号发生器，其设置在电源电压端和接地端之间，并分别响应于第一和第二差分输入信号而将第一和第二差分放大信号输出到第一和第二输出端; 共模电压发生器，用于响应于第一和第二差分放大信号的DC（直流）偏移电压产生共模电压; 以及可变负载部分，用于响应于共模电压来控制电源电压端子和第一输出端子之间的电阻以及电源电压端子和第二输出端子之间的电阻，使得第一和第二差分放大信号具有恒定的直流偏移电压。

49. 发明授权

US06870434B2 Method for compensating temperature in crystal oscillator 有权
标题翻译：晶体振荡器温度补偿方法
公开(公告)号：US06870434B2
公开(公告)日：2005-03-22
申请号：US10464735
申请日：2003-06-19
申请人： Jin Ho Han , Myung Shin Kwark , Jong Dae Kim
发明人： Jin Ho Han , Myung Shin Kwark , Jong Dae Kim
IPC分类号： H03B5/32 , H03B5/04 , H03B5/36 , H03L1/02
CPC分类号： H03L1/026
摘要： The present invention relates to a method for compensating temperature in a crystal oscillator including a capacitor array consisted of a first bank of unit capacitors each with low capacitance and a second bank of unit capacitors each with high capacitance. The method comprising the steps of calculating memory address that stores information about the capacitor array address in accordance with the temperature that is subtracted from present temperature by a temperature offset code; reading data from a memory address corresponding to remain bits excepted lowest bit when the lowest bit is 0 among the memory address; averaging data read from a memory address corresponding to remain bits excepted lowest bit and data of a memory address incremented by 1 from the memory address when the lowest bit is 1 among the memory address; transmitting data read from the memory address or averaged data to the first bank or second bank by comparing the memory address and temperature boundary code; and adjusting the capacitor array with capacitance corresponding to a present temperature by using data transmitted to the first bank or second bank.
摘要翻译：本发明涉及一种用于补偿晶体振荡器中的温度的方法，该晶体振荡器包括由具有低电容的第一组单位电容器组成的电容器阵列和具有高电容的第二组单位电容器。该方法包括以下步骤：根据从当前温度减去温度偏移代码的温度计算存储关于电容器阵列地址的信息的存储器地址; 从存储器地址中的最低位为0时，从与除了最低位之外的保持位相对应的存储器地址读取数据; 从存储器地址中的最低位为1时，从存储器地址递增1的存储器地址中除了除了最低位之外的保留位和存储器地址的数据读取的平均数据; 通过比较存储器地址和温度边界码，将从存储器地址读取的数据或平均数据发送到第一存储体或第二存储体; 以及通过使用发送到第一存储体或第二存储体的数据来调整电容器阵列与对应于当前温度的电容。

50. 发明授权

US06770529B2 EDMOS device having a lattice type drift region and method of manufacturing the same 有权
标题翻译：具有晶格型漂移区域的EDMOS器件及其制造方法
公开(公告)号：US06770529B2
公开(公告)日：2004-08-03
申请号：US10611502
申请日：2003-06-30
申请人： Dae Woo Lee , Tae Moon Roh , II Yong Park , Yil Suk Yang , Jong Dae Kim
发明人： Dae Woo Lee , Tae Moon Roh , II Yong Park , Yil Suk Yang , Jong Dae Kim
IPC分类号： H01L218242
CPC分类号： H01L29/0634 , H01L29/7835
摘要： The present invention provides an EDMOS (extended drain MOS) device having a lattice type drift region and a method of manufacturing the same. In the case of n channel EDMOS(nEDMOS), the drift region has a lattice structure in which an n lattice having a high concentration and a p lattice having a low concentration are alternately arranged. As a drain voltage is applied, a depletion layer is abruptly extended by a pn junction of the n lattice and the p lattice, so that the entire drift region is easily depleted. Therefore, a breakdown voltage of the device is increased, and an on resistance of the device is decreased due to the n lattice with high concentration.
摘要翻译：本发明提供一种具有晶格型漂移区域的EDMOS（延伸漏极MOS）器件及其制造方法。在n沟道EDMOS（nEDMOS）的情况下，漂移区域具有晶格结构，其中具有高浓度的n晶格和具有低浓度的p晶格交替排列。当施加漏极电压时，耗尽层被n晶格和p晶格的pn结突然延伸，使得整个漂移区域容易耗尽。因此，器件的击穿电压增加，并且由于具有高浓度的n晶格，器件的导通电阻降低。

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