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41. 发明授权

US06703676B2 Magnetic memory device and manufacturing method thereof 有权
标题翻译：磁存储器件及其制造方法
公开(公告)号：US06703676B2
公开(公告)日：2004-03-09
申请号：US10235810
申请日：2002-09-06
申请人： Tadahiko Hirai , Naoki Nishimura
发明人： Tadahiko Hirai , Naoki Nishimura
IPC分类号： H01L2982
CPC分类号： H01L27/228 , B82Y10/00
摘要： TMR elements in a magnetic memory device are formed to be flat to enable their stable operations. A TMR element is formed by putting a tunnel barrier layer being a non-magnetic layer between an upper magnetic layer and a lower magnetic layer, both having a perpendicular magnetic anisotropy. A conductive local connect elongating in a plane is formed on a second plug formed in a contact hole formed in a second and a third inter-layer insulating films. The TMR element is formed on the local connect at a position avoiding a position right above the second plug. The TMR element is connected with the upper surface of the second plug through the local connect. A bit line through which an electric current for applying a magnetic field to the TMR element flows is formed at a position shifted from a position right above the TMR element in a plane.
摘要翻译：磁存储器件中的TMR元件形成为平坦的，以使它们稳定地工作。通过将具有垂直磁各向异性的上磁性层和下磁性层之间的非磁性层的隧道势垒层设置成TMR元件。在形成在形成在第二和第三层间绝缘膜中的接触孔中的第二插塞上形成在平面内延伸的导电局部连接。 TMR元件形成在本地连接处，避开位于第二插头正上方的位置。 TMR元件通过本地连接与第二个插头的上表面连接。在TMR元件的正上方的位置偏移的位置，形成用于向TMR元件施加磁场的电流流过的位线。

42. 发明授权

US06614682B2 Magnetic material memory and information reproducing method of the same 有权
标题翻译：磁性物质记忆和信息再现方法相同
公开(公告)号：US06614682B2
公开(公告)日：2003-09-02
申请号：US10093522
申请日：2002-03-11
申请人： Tadahiko Hirai
发明人： Tadahiko Hirai
IPC分类号： G11C1115
CPC分类号： G11C11/15
摘要： To provide an MRAM, in which the information readout speed of the MRAM is increased up to a speed comparable to a synchronous DRAM, the MRAM includes a plurality of units each including a plurality of memory elements arranged in a matrix form, each of which includes a non-magnetic layer sandwiched between a hard layer made of a magnetic material and a soft layer made of a magnetic substance having coercive force lower than the hard layer; a plurality of bit lines arranged in parallel with each other; and a plurality of sense amplifiers connected to the respective bit lines, wherein the plurality of sense amplifiers in the same unit are activated at the same time to read out information in the unit, the units are successively changed over in synchronization with a clock pulse, and the sense amplifiers in the different units are successively activated.
摘要翻译：为了提供MRAM，其中MRAM的信息读取速度增加到与同步DRAM相当的速度，MRAM包括多个单元，每个单元包括以矩阵形式布置的多个存储器元件，每个存储器元件包括夹在由磁性材料制成的硬层之间的非磁性层和由具有低于硬层的矫顽力的磁性物质制成的软层; 多个位线，彼此平行布置; 以及连接到各位线的多个读出放大器，其中同一单元中的多个读出放大器同时被激活以读出该单元中的信息，该单元与时钟脉冲同步地依次切换，并且不同单元中的读出放大器被依次激活。

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