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    • 41. 发明授权
    • Method of manufacturing devices comprising conductive nano-dots, and devices comprising same
    • 制造包括导电纳米点的器件的方法,以及包括其的器件
    • US07173304B2
    • 2007-02-06
    • US11145624
    • 2005-06-06
    • Ronald A. WeimerChristopher Hill
    • Ronald A. WeimerChristopher Hill
    • H01L21/336H01L29/76
    • H01L21/28273B82Y10/00H01L29/42332
    • A method is disclosed that may include forming a first layer of insulating material above a semiconducting substrate, forming an aluminum oxide layer above the first layer of insulating material, forming a plurality of spaced-apart dots of material on the aluminum oxide layer, forming a second layer of insulating material on portions of the aluminum oxide layer not covered by the spaced-apart dots of material, forming a conductive layer above the second layer of insulating material and the plurality of spaced-apart dots of material, and removing excess portions of the layer of conductive material and the second layer of insulating material. A device is disclosed that may include a substrate and a floating gate electrode positioned above a tunnel insulation layer, the floating gate electrode including a layer of insulating material and a plurality of spaced-apart dots of material, each of which have a conductive nano-dot positioned on the dot of material, the dots of material and the conductive nano-dots being positioned in the layer of insulating material.
    • 公开了一种方法,其可以包括在半导体衬底上形成第一绝缘材料层,在第一绝缘材料层之上形成氧化铝层,在氧化铝层上形成多个间隔开的材料点,形成 第二层绝缘材料在不被间隔开的材料点覆盖的氧化铝层的部分上,在第二绝缘材料层上方形成导电层和多个间隔开的材料点,并且除去多余部分的绝缘材料 导电材料层和第二层绝缘材料。 公开了一种可以包括位于隧道绝缘层上方的衬底和浮置栅电极的器件,该浮栅电极包括一层绝缘材料和多个间隔开的点材料,每个点都具有导电的纳米 - 点位于材料点上,材料点和导电纳米点位于绝缘材料层中。
    • 42. 发明申请
    • Fork Leg Cap
    • 叉腿帽
    • US20060279061A1
    • 2006-12-14
    • US11160208
    • 2005-06-14
    • Christopher Hill
    • Christopher Hill
    • B62K21/00
    • B62K25/02
    • A fork leg cap for the attachment of a wheel to a fork assembly so when the wheel is attached to the fork leg, the mounting studs and nuts holding the fork leg cap in place against the fork leg end are hidden from view making the fork leg appear as a continuous solid piece. Particularly this invention relates to the attachment of the front wheel of a motorcycle and allows all the parts showing on the fork assembly to be chrome since the mounting hardware which secures the front wheel to the fork leg are hidden making the end of each fork appear to be continuous piece.
    • 一种用于将车轮连接到叉车组件上的叉腿帽,因此当车轮附接到叉腿时,将叉腿帽保持在与叉腿末端相对的位置的安装螺柱和螺母被隐藏,使叉腿 显示为连续实体。 特别地,本发明涉及摩托车的前轮的附接,并且允许在叉组件上显示的所有部件都是铬,因为将前轮固定到叉腿的安装件隐藏,使得每个叉的末端看起来 连续片。
    • 45. 发明申请
    • Full-speed BIST controller for testing embedded synchronous memories
    • 全速BIST控制器用于测试嵌入式同步存储器
    • US20050066247A1
    • 2005-03-24
    • US10985539
    • 2004-11-09
    • Wu-Tung ChengChristopher HillOmar Kebichi
    • Wu-Tung ChengChristopher HillOmar Kebichi
    • G11C29/14G11C29/16G11C29/50G01R31/28
    • G11C29/16G11C29/14G11C29/50
    • A test circuit is disclosed for testing embedded synchronous memories. A BIST controller is used to address the memory and provide reference data that is compared to the memory output. Pipeline registers are used to allow the BIST controller to perform reads and/or writes during every clock cycle. In one aspect, the BIST controller includes a reference data circuit that stores or generates data for comparison to the memory output. A pipeline register is positioned before the reference data circuit or between the reference data circuit and compare circuitry. Additional pipeline registers may be positioned between a compare capture circuit and the compare circuitry. The pipeline registers free the BIST controller from having to wait for a read to complete before starting the next read or write. To reduce the number of pipeline registers needed, a negative-edge BIST controller can be used with a positive-edge memory or vice versa.
    • 公开了一种用于测试嵌入式同步存储器的测试电路。 BIST控制器用于寻址存储器并提供与存储器输出进行比较的参考数据。 流水线寄存器用于允许BIST控制器在每个时钟周期内执行读取和/或写操作。 在一个方面,BIST控制器包括参考数据电路,其存储或产生用于与存储器输出进行比较的数据。 流水线寄存器位于参考数据电路之前或参考数据电路和比较电路之间。 另外的流水线寄存器可以位于比较捕捉电路和比较电路之间。 流水线注册使得BIST控制器在开始下一次读取或写入之前不必等待读取完成。 为了减少所需的流水线寄存器数量,负边缘BIST控制器可以与正边沿存储器一起使用,反之亦然。