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    • 42. 发明授权
    • Thin film transistor array panel and manufacturing method thereof
    • 薄膜晶体管阵列面板及其制造方法
    • US08207534B2
    • 2012-06-26
    • US12417280
    • 2009-04-02
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • H01L29/786
    • G02F1/13439G02F1/13458H01L27/12H01L27/124H01L29/458H01L29/4908
    • A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the metal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
    • 提供薄膜晶体管阵列面板,其包括基板,形成在基板上的多个栅极线,在基板上具有透明导电层的多个公共电极,覆盖栅极线和公共电极的栅极绝缘层 形成在所述栅极绝缘层上的多个半导体层,形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线,形成在所述半导体层上的多个漏电极和所述栅极绝缘体 并且与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON,IZON或者-IONON制成,或者是将双重层的ITO / ITON,IZO / IZON或者a-ITO / a-ITON,当注入H 2或SiH 4以形成氮化硅时 SiNX)层,在公共电极的表面上不产生在IZO,ITO或ITO中还原金属成分的不透明金属Sn或Zn。
    • 44. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管阵列及其制造方法
    • US20110284857A1
    • 2011-11-24
    • US13204553
    • 2011-08-05
    • Je-Hun LEESung-Jin KimHee-Joon KimChang-Oh Jeong
    • Je-Hun LEESung-Jin KimHee-Joon KimChang-Oh Jeong
    • H01L27/088H01L21/84
    • G02F1/13439G02F1/13458H01L27/12H01L27/124H01L29/458H01L29/4908
    • A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the rmetal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
    • 提供薄膜晶体管阵列面板,其包括基板,形成在基板上的多个栅极线,在基板上具有透明导电层的多个公共电极,覆盖栅极线和公共电极的栅极绝缘层 形成在所述栅极绝缘层上的多个半导体层,形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线,形成在所述半导体层上的多个漏电极和所述栅极绝缘体 并且与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON,IZON或者-IONON制成,或者是将双重层的ITO / ITON,IZO / IZON或者a-ITO / a-ITON,当注入H 2或SiH 4以形成氮化硅时 SiNX)层,在公共电极的表面上不产生在IZO,ITO或ITO中还原金属成分的不透明金属Sn或Zn。
    • 46. 发明授权
    • Method of manufacturing flash memory device with reduced void generation
    • 具有减少空穴产生的闪存器件的制造方法
    • US07892959B2
    • 2011-02-22
    • US12146183
    • 2008-06-25
    • Sung-Jin Kim
    • Sung-Jin Kim
    • H01L21/3205H01L21/4763
    • H01L27/11521H01L21/28273H01L27/115
    • A method of manufacturing a flash memory device that may include forming a first oxide film pattern and a first polysilicon pattern on a semiconductor substrate; sequentially forming a dielectric film pattern and a second polysilicon pattern on the semiconductor substrate including the first oxide film pattern and the first polysilicon pattern; forming a second oxide film pattern on the second polysilicon pattern; forming a gate by etching to the semiconductor substrate using the second oxide film pattern as a mask, the gate including the first oxide film pattern, the first polysilicon pattern, the dielectric film pattern and the second polysilicon pattern; removing the second oxide film pattern; forming a spacer on sidewalls of the gate; and forming an interlayer dielectric film on the semiconductor substrate including the gate and the spacer.
    • 一种制造闪存器件的方法,其可以包括在半导体衬底上形成第一氧化膜图案和第一多晶硅图案; 在包括第一氧化膜图案和第一多晶硅图案的半导体衬底上依次形成电介质膜图案和第二多晶硅图案; 在所述第二多晶硅图案上形成第二氧化膜图案; 通过使用第二氧化膜图案作为掩模通过蚀刻到半导体衬底来形成栅极,栅极包括第一氧化膜图案,第一多晶硅图案,电介质膜图案和第二多晶硅图案; 去除第二氧化膜图案; 在门的侧壁上形成间隔物; 以及在包括所述栅极和所述间隔物的所述半导体衬底上形成层间电介质膜。
    • 48. 发明授权
    • Flash memory device and method of forming the device
    • 闪存装置及其形成方法
    • US07767566B2
    • 2010-08-03
    • US11963563
    • 2007-12-21
    • Sung-Jin Kim
    • Sung-Jin Kim
    • H01L21/00
    • H01L27/115H01L27/11519
    • Cell gate patterns including first portions separated from each other with a first distance and second portions separated from each other with a second distance less than the first distance, and spacers are formed both sidewalls of the pair of cell gate patterns. The spacers formed on the sidewalls of the second portions are removed using a mask pattern. Accordingly, it is possible to prevent increase of an aspect ratio of a gap between the second portions with the small distance. Since the spacers formed on the sidewalls of the second portions separated from each other with the small distance are selectively removed, it is possible to minimize the increase of the aspect ratio of the gap between the second portions. Thus, it is possible to solve various problems which are caused due to occurrence of a void.
    • 电池栅极图案包括彼此分离的第一部分,第一距离和第二部分彼此分开,第二距离小于第一距离,并且间隔物形成在该对单元栅极图案的两个侧壁上。 使用掩模图案去除形成在第二部分的侧壁上的间隔物。 因此,可以防止第二部分之间的间隙的纵横比以较小的距离增加。 由于选择性地除去形成在彼此分开的小的距离的第二部分的侧壁上的间隔物,所以可以最小化第二部分之间的间隙的纵横比的增加。 因此,可以解决由于空隙的发生而引起的各种问题。
    • 49. 发明授权
    • Module for manufacturing a display device, method of manufacturing the same, and method of manufacturing a display device using the same
    • 用于制造显示装置的模块及其制造方法以及使用其的显示装置的制造方法
    • US07568961B2
    • 2009-08-04
    • US11404208
    • 2006-04-14
    • Sung-Jin Kim
    • Sung-Jin Kim
    • H01J9/00
    • G02F1/133305G02F1/133351H01J9/241H01J9/261H01L51/56H01L2227/326H01L2251/5338
    • A module for manufacturing a display device, a method for manufacturing the module, and a method for manufacturing a display device using the module, are provided. The module includes a solid substrate, a first flexible substrate, a second flexible substrate, and a third flexible substrate in one embodiment. The solid substrate has an upper surface and a lower surface facing to the upper surface. The first flexible substrate is on the upper surface of the solid substrate, and the second flexible substrate is on the first flexible substrate and has an opening to receive a flexible display substrate that has a display element. The third flexible substrate is on the lower surface of the solid substrate to prevent a bending of the solid substrate. Advantageously, a malfunction of pixels of the display element is decreased, and the module for manufacturing the display device may be recycled to decrease a manufacturing cost of the display device.
    • 提供一种显示装置的制造用模块,该模块的制造方法以及使用该模块的显示装置的制造方法。 在一个实施例中,该模块包括固体衬底,第一柔性衬底,第二柔性衬底和第三柔性衬底。 固体基板具有面向上表面的上表面和下表面。 第一柔性基板在固体基板的上表面上,第二柔性基板位于第一柔性基板上,并且具有开口以接收具有显示元件的柔性显示基板。 第三柔性基板在固体基板的下表面上,以防止固体基板弯曲。 有利地,显示元件的像素的故障减少,并且用于制造显示装置的模块可以被再循环以降低显示装置的制造成本。