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41. 发明授权

US08347158B2 System-on-chip with master/slave debug interface 有权
标题翻译：具有主/从调试接口的片上系统
公开(公告)号：US08347158B2
公开(公告)日：2013-01-01
申请号：US13528140
申请日：2012-06-20
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G06F11/0724 , G06F11/267 , G06F13/18
摘要： A System-on-Chip (SOC) debugging system comprising a plurality of SOCs connected to a shared bus, at least one of the plurality of SOCs being a master SOC and comprising a master/slave debug interface, wherein the master/slave debug interface is a bidirectional debug interface configured to initiate transactions on the shared bus and operable to send and receive debug data between the SOCs, wherein the debug data comprises trace data.
摘要翻译：一种系统级芯片（SOC）调试系统，包括连接到共享总线的多个SOC，所述多个SOC中的至少一个SOC是主SOC并且包括主/从调试接口，其中所述主/从调试接口是配置成在所述共享总线上启动事务并且可操作以在所述SOC之间发送和接收调试数据的双向调试接口，其中所述调试数据包括跟踪数据。

42. 发明申请

US20120260131A1 SYSTEM-ON-CHIP WITH MASTER/SLAVE DEBUG INTERFACE 有权
标题翻译：带主/从动调试接口的片上系统
公开(公告)号：US20120260131A1
公开(公告)日：2012-10-11
申请号：US13528140
申请日：2012-06-20
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F11/28
CPC分类号： G06F11/0724 , G06F11/267 , G06F13/18
摘要： A System-on-Chip (SOC) debugging system comprising a plurality of SOCs connected to a shared bus, at least one of the plurality of SOCs being a master SOC and comprising a master/slave debug interface, wherein the master/slave debug interface is a bidirectional debug interface configured to initiate transactions on the shared bus and operable to send and receive debug data between the SOCs, wherein the debug data comprises trace data.
摘要翻译：一种系统级芯片（SOC）调试系统，包括连接到共享总线的多个SOC，所述多个SOC中的至少一个SOC是主SOC并且包括主/从调试接口，其中所述主/从调试接口是配置成在所述共享总线上启动事务并且可操作以在所述SOC之间发送和接收调试数据的双向调试接口，其中所述调试数据包括跟踪数据。

43. 发明授权

US08234531B2 System-on-chip with master/slave debug interface 有权
标题翻译：具有主/从调试接口的片上系统
公开(公告)号：US08234531B2
公开(公告)日：2012-07-31
申请号：US12913236
申请日：2010-10-27
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G06F11/0724 , G06F11/267 , G06F13/18
摘要： A System-on-Chip (SOC) integrated circuit (IC) debugging system includes a plurality of SOC ICs connected to a shared debug bus. One of the plurality of SOC ICs is a master SOC IC having a master/slave debug interface. The master/slave debug interface on the master SOC IC is a bidirectional debug interface operable to send and receive debug data between the SOC ICs and an external host system.
摘要翻译：片上系统（SOC）集成电路（IC）调试系统包括连接到共享调试总线的多个SOC IC。多个SOC IC中的一个是具有主/从调试接口的主SOC IC。主SOC IC上的主/从调试接口是双向调试接口，用于在SOC IC和外部主机系统之间发送和接收调试数据。

44. 发明授权

US07634700B2 Semiconductor device with test interface 有权
标题翻译：具有测试接口的半导体器件
公开(公告)号：US07634700B2
公开(公告)日：2009-12-15
申请号：US11465540
申请日：2006-08-18
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G01R31/28
CPC分类号： G01R31/318594 , G01R31/318572
摘要： A semiconductor device with test interface, as well as to a method for operating a semiconductor device is disclosed. In one embodiment, in a test operating mode, the semiconductor device is, via a first pin, supplied with a work cycle signal synchronized with a test environment and, via at least one second pin, with test data. In accordance with a first embodiment it is suggested, so as to reduce the number of pins, that the work cycle signal is simultaneously used as test data clock signal.
摘要翻译：公开了一种具有测试接口的半导体器件，以及用于操作半导体器件的方法。在一个实施例中，在测试操作模式中，半导体器件经由第一引脚提供与测试环境同步的工作周期信号，并且经由至少一个第二引脚提供测试数据。根据第一实施例，建议减少引脚数，同时使用工作周期信号作为测试数据时钟信号。

45. 发明申请

US20090276665A1 APPARATUS, SYSTEM, AND METHOD OF EFFICIENTLY UTILIZING HARDWARE RESOURCES FOR A SOFTWARE TEST 有权
标题翻译：用于软件测试的设备，系统和有效利用硬件资源的方法
公开(公告)号：US20090276665A1
公开(公告)日：2009-11-05
申请号：US12115209
申请日：2008-05-05
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3648
摘要： Apparatus, system and method of efficiently utilizing hardware resources for a software test in system having at least one redundant component, at least a part of which is used for the software test.
摘要翻译：在具有至少一个冗余组件的系统中有效利用硬件资源进行软件测试的装置，系统和方法，其至少一部分用于软件测试。

46. 发明授权

US07577878B2 Method for storing or transferring data using time sequencing 有权
标题翻译：使用时间序列存储或传输数据的方法
公开(公告)号：US07577878B2
公开(公告)日：2009-08-18
申请号：US10490992
申请日：2002-09-25
申请人： Sammy Baradie , Klaus D. McDonald-Maier , Albrecht Mayer
发明人： Sammy Baradie , Klaus D. McDonald-Maier , Albrecht Mayer
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F5/065 , G06F11/3466 , G06F11/348 , G06F2201/835 , G06F2201/88
摘要： A method in which data is stored or transferred together with an information message on the basis of which it can be determined in which order, at which time, and/or during which time span, the data concerned has been acquired, stored or transferred.
摘要翻译：一种方法，其中数据与信息消息一起存储或传送，根据该信息消息，可以根据该信息消息确定已经获取，存储或传送相关数据的时间和/或时间跨度。

47. 发明授权

US07506086B2 Electronic network with identification code generation and assignment 有权
标题翻译：具有识别码生成和分配的电子网络
公开(公告)号：US07506086B2
公开(公告)日：2009-03-17
申请号：US11552775
申请日：2006-10-25
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F13/00
CPC分类号： G06F13/4282
摘要： An electronic network is disclosed. One embodiment includes a plurality of network devices, a bus for transferring data between the network devices and a bus master for controlling the transfer of data between the network devices. Each network device is identified using one unique identification code. At least one number generator is provided, which is adapted to generate a number upon a request from the bus master. The received number is used as identification code of the respective network device.
摘要翻译：公开了电子网络。一个实施例包括多个网络设备，用于在网络设备之间传送数据的总线和用于控制网络设备之间的数据传输的总线主控器。使用一个唯一的识别码识别每个网络设备。提供至少一个数字发生器，其适于根据来自总线主控器的请求生成数字。所接收的号码用作各个网络设备的识别码。

48. 发明授权

US07206926B2 Programmable unit including program operation unit and associated stopping device 有权
标题翻译：可编程单元，包括程序运行单元和关联的停止装置
公开(公告)号：US07206926B2
公开(公告)日：2007-04-17
申请号：US09974924
申请日：2001-10-10
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F9/44
CPC分类号： G06F11/3648
摘要： A programmable unit is described having one or more program running units for running a program, with at least one of the program running units having an associated stopping device by which it is possible to stop the running of the program by the program running unit with which that stopping device is associated. The described programmable unit is distinguished in that the stopping device can also cause other components of the programmable unit to be stopped, in addition to the program running unit with which it is associated.
摘要翻译：描述了一个可编程单元，其具有用于运行程序的一个或多个程序运行单元，其中至少一个程序运行单元具有关联的停止装置，通过该程序运行单元可以通过程序运行单元停止程序的运行，该停止装置关联。所描述的可编程单元的特征在于，除了与其相关联的程序运行单元之外，停止装置还可以使可编程单元的其他部件停止。

49. 发明授权

US07194401B2 Configuration for in-circuit emulation of a program-controlled unit 有权
标题翻译：用于程序控制单元的在线仿真的配置
公开(公告)号：US07194401B2
公开(公告)日：2007-03-20
申请号：US10444544
申请日：2003-05-23
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F9/455
CPC分类号： G06F11/3636 , G06F11/3652
摘要： A configuration contains a test unit that, during emulation, replaces a program-controlled unit that is used in normal operation of the system containing the program-controlled unit. The test unit has a first program-controlled unit and a second program-controlled unit. The first program-controlled unit contains only some of the components of the program-controlled unit replaced by the test unit, and the second program-controlled unit contains those components of the program-controlled unit replaced by the test unit that are not contained in the first program-controlled unit. In addition, the first program-controlled unit contains a control device which monitors whether one of the components of the first program-controlled unit requests access to a component not present in the first program-controlled unit and which, if this is so, prompts appropriate access to the corresponding component in the second program-controlled unit.
摘要翻译：配置包含一个测试单元，在仿真期间，替换在包含程序控制单元的系统的正常操作中使用的程序控制单元。测试单元具有第一程序控制单元和第二程序控制单元。第一程序控制单元仅包含由测试单元替换的程序控制单元的一些组件，并且第二程序控制单元包含由不包含在测试单元中的测试单元替换的程序控制单元的组件第一个程序控制单元。此外，第一程序控制单元包含控制装置，该控制装置监视第一程序控制单元的一个组件是否请求访问第一程序控制单元中不存在的组件，如果是这样，则提示适当地访问第二程序控制单元中的对应组件。

50. 发明申请

US20050192791A1 Method for emulating an integrated circuit and semiconductor chip for practicing the method 审中-公开
标题翻译：用于仿真集成电路和半导体芯片实施该方法的方法
公开(公告)号：US20050192791A1
公开(公告)日：2005-09-01
申请号：US11058144
申请日：2005-02-15
申请人： Albrecht Mayer
发明人： Albrecht Mayer
IPC分类号： G06F9/455
CPC分类号： G06F11/3652
摘要： An emulation method and a semiconductor chip for emulating an integrated circuit, in particular a program-controlled device, by means of an emulation circuit, which is arranged on the same semiconductor chip as the integrated circuit, has a trace memory and is coupled to the integrated circuit to be emulated via an internal interface, said method having the following method steps of: emulating the integrated circuit using the emulation circuit, continually storing the emulation results obtained during the emulation in the trace memory until the trace memory is full; interrupting the emulation; reading out the emulation results from the trace memory; and continuing the emulation of the integrated circuit.
摘要翻译：用于仿真集成电路，特别是程控装置的仿真方法和半导体芯片通过布置在与集成电路相同的半导体芯片上的仿真电路具有跟踪存储器并耦合到集成电路通过内部接口进行仿真，所述方法具有以下方法步骤：使用仿真电路仿真集成电路，将仿真期间获得的仿真结果持续存储在跟踪存储器中，直到跟踪存储器已满; 中断仿真; 从跟踪记忆中读出仿真结果; 并继续仿真集成电路。

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