会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 41. 发明授权
    • Systems and methods for parameter modification during data processing retry
    • 数据处理重试期间参数修改的系统和方法
    • US08630053B2
    • 2014-01-14
    • US13372600
    • 2012-02-14
    • Shaohua YangJin LuHaitao Xia
    • Shaohua YangJin LuHaitao Xia
    • G11B5/09
    • G11B5/09G11B20/10009
    • Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: a buffer circuit, an equalizer circuit, a data processing circuit, and a retry determination circuit. The buffer is operable to store digital samples as a buffered output, and the equalizer circuit is operable to equalize the buffered output using a first equalization target to yield a first equalized output, and to yield a second equalized output using a second equalization target. The retry determination circuit is operable to select the second equalization target based at least in part on an occurrence of an error.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,讨论了包括缓冲电路,均衡器电路,数据处理电路和重试确定电路的数据处理系统。 缓冲器可操作以将数字样本存储为缓冲输出,并且均衡器电路可操作以使用第一均衡目标来均衡缓冲输出,以产生第一均衡输出,并且使用第二均衡目标产生第二均衡输出。 重试确定电路可操作以至少部分地基于错误的发生来选择第二均衡目标。
    • 44. 发明申请
    • Systems and Methods for Zone Servo Timing Gain Recovery
    • 区域伺服定时增益恢复系统与方法
    • US20130148226A1
    • 2013-06-13
    • US13316899
    • 2011-12-12
    • Haitao XiaMing JinDahua QinShaohua Yang
    • Haitao XiaMing JinDahua QinShaohua Yang
    • G11B5/09
    • G11B5/59688G11B5/59622
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is disclosed that includes Various embodiments of the present invention provide data processing systems that include an analog to digital converter circuit and a phase and gain computation circuit. The analog to digital converter circuit is operable to convert an analog input into a series of digital samples. At least a portion of the series of digitals samples represent a periodic signal from a servo data region. The phase and gain computation circuit is operable to: determine an approximate amplitude of the periodic signal based at least in part upon the digital samples representing the periodic signal from the servo data region; determine a gain based at least in part on the approximate amplitude; and determine a phase based at least in part on the approximate amplitude.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了一种数据处理系统,其包括本发明的各种实施例,其提供包括模数转换器电路和相位和增益计算电路的数据处理系统。 模数转换器电路可操作以将模拟输入转换为一系列数字采样。 一系列数字采样的至少一部分表示来自伺服数据区的周期性信号。 相位和增益计算电路可操作以:至少部分地基于表示来自伺服数据区域的周期信号的数字采样来确定周期信号的近似幅度; 至少部分地基于近似幅度确定增益; 并且至少部分地基于近似幅度来确定相位。
    • 45. 发明申请
    • Systems and Methods for Parity Shared Data Encoding
    • 用于奇偶校验共享数据编码的系统和方法
    • US20130091400A1
    • 2013-04-11
    • US13269852
    • 2011-10-10
    • Haitao XiaShaohua YangJohnson Yen
    • Haitao XiaShaohua YangJohnson Yen
    • H03M13/05G06F11/10
    • H03M13/1102G11B20/1833G11B2020/185G11B2220/2516H03M13/2942H03M13/3761H03M13/6331H03M13/6343H03M13/6502
    • Various embodiments of the present invention provide systems and methods for data processing. For example, a low density parity check encoding system is described that includes: a low density parity check encoder circuit, and a combining circuit. The low density parity check encoder circuit is operable to encode a first data set to yield a first low density parity check encoded sub-codeword, and to encode a second data set to yield a second low density parity check encoded sub-codeword. The combining circuit is operable to: generate a composite low density parity check sub-codeword by mathematically combining at least the first low density parity check encoded sub-codeword and the second low density parity check encoded sub-codeword; and combine at least the first low density parity check encoded sub-codeword and the composite low density parity check sub-codeword into an overall codeword.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,描述了一种低密度奇偶校验编码系统,其包括:低密度奇偶校验编码器电路和组合电路。 低密度奇偶校验编码器电路可操作以对第一数据集进行编码以产生第一低密度奇偶校验编码子码字,并对第二数据集进行编码以产生第二低密度奇偶校验编码子码字。 组合电路可操作用于:通过至少第一低密度奇偶校验编码子码字和第二低密度奇偶校验编码子码字数学地组合来生成复合低密度奇偶校验子码字; 并且将至少第一低密度奇偶校验编码子码字和复合低密度奇偶校验子码字组合成总码字。
    • 46. 发明申请
    • Systems and Methods for Data Pre-Coding Calibration
    • 数据预编码校准系统与方法
    • US20120212849A1
    • 2012-08-23
    • US13031818
    • 2011-02-22
    • Changyou XuShaohua YangHaitao XiaKapil Gaba
    • Changyou XuShaohua YangHaitao XiaKapil Gaba
    • G11B5/00H04L27/01
    • G11B20/10083G11B20/10296G11B20/1833G11B2020/185G11B2220/2516G11B2220/415
    • Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.
    • 本发明的各种实施例提供了用于在预编码和非预编码之间进行选择的系统和方法。 作为示例,公开了一种数据处理电路,其包括:第一数据检测器电路,第二数据检测器电路,第一比较器电路,第二比较器电路和预代码选择电路。 第一数据检测器电路可选择地被配置为以预编码状态操作,并且可操作以将数据检测算法应用于数据输入以产生第一检测输出。 第二数据检测器电路可操作以将数据检测算法应用于数据输入以产生第二检测输出而不补偿预编码。 第一比较器电路可操作以将第一检测输出与已知输入进行比较以产生第一比较值,并且第二比较器电路可操作以将第二检测输出与已知输入进行比较以产生第二比较值。 预编码选择电路可操作以至少部分地基于第一比较值和第二比较值来确定第一数据检测器电路的可选配置。
    • 47. 发明申请
    • Systems and Methods for Data Detection Using Distance Based Tuning
    • 使用基于距离的调整进行数据检测的系统和方法
    • US20120207201A1
    • 2012-08-16
    • US13310028
    • 2011-12-02
    • Haitao XiaWeijun TanNenad MiladinovicShaohua Yang
    • Haitao XiaWeijun TanNenad MiladinovicShaohua Yang
    • H04L27/01
    • H04L25/03254H04L25/0305
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括均衡器电路和数据检测电路的数据处理电路。 均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波,并提供相应的一系列滤波样本。 数据检测电路包括:核心数据检测器电路和系数确定电路。 核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理,并提供最可能的路径和下一个最可能的路径。 系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。
    • 50. 发明授权
    • Systems and methods for track width determination
    • 轨道宽度确定的系统和方法
    • US08854752B2
    • 2014-10-07
    • US13100063
    • 2011-05-03
    • Ming JinHaitao Xia
    • Ming JinHaitao Xia
    • G11B27/36G11B19/04G11B20/22
    • G11B27/36G11B19/045G11B20/22G11B2220/2516
    • Various embodiments of the present invention provide systems and methods for read sensor characterization. As an example, a data storage device is disclosed that includes a storage medium, a read/write head assembly disposed in relation to the storage medium, and a track width setting circuit. The track width setting circuit is operable to: write data to at least a first track and a second track on the storage medium, read data from the second track, determine an estimated track offset where interference from the data written to the first track is insubstantial, and modify at least the second track width based at least in part on the estimated track offset. The first track is a first track width and the second track is a second track width.
    • 本发明的各种实施例提供用于读取传感器表征的系统和方法。 作为示例,公开了包括存储介质,相对于存储介质设置的读/写头组件和轨道宽度设置电路的数据存储设备。 轨道宽度设置电路可操作用于:将数据写入存储介质上的至少第一磁道和第二磁道,从第二磁道读取数据,确定估计的磁道偏移量,其中写入第一磁道的数据的干扰是非实质的 并且至少部分地基于估计的轨道偏移来修改至少第二轨道宽度。 第一轨道是第一轨道宽度,第二轨道是第二轨道宽度。