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    • 42. 发明申请
    • METHOD FOR CONTROLLING A DECELERATION PROCESS OF A DC MOTOR AND CONTROLLER
    • 控制直流电动机和控制器的减速过程的方法
    • US20090315490A1
    • 2009-12-24
    • US12307283
    • 2007-07-03
    • Gian Hoogzaad
    • Gian Hoogzaad
    • H02P3/14
    • H02P23/20
    • The invention is directed to a method for controlling a deceleration process of a DC motor (20), wherein the DC motor (20) is driven by a bridge driver (18) coupled to a power supply (12) intended to provide a supply voltage VDD at a power supply output (14), the method comprising the following steps: applying a deceleration PWM signal to the bridge driver (18) for decelerating the DC motor (20), and controlling the bridge driver (18) such that a motor-induced back current is reduced, if the voltage at the power supply output (14) exceeds a voltage threshold which is higher than VDD. In accordance with the invention the step of controlling the bridge driver (18) such that a motor-induced back current is reduced, if the voltage at the power supply output (14) exceeds a voltage threshold which is higher than VDD comprises: if the voltage at the power supply output exceeds the voltage threshold, changing stepwise the pulse width of the deceleration PWM signal in a first direction until the voltage at the power supply (14) output reaches or falls below the voltage threshold, and then, if the voltage at the power supply output (14) has fallen below the voltage threshold, changing stepwise the pulse width of the deceleration PWM signal in a second direction opposite to the first direction until the voltage at the power supply output (14) again reaches or exceeds the voltage threshold. The invention is also directed to a controller suitable to carry out the above method.
    • 本发明涉及一种用于控制直流电动机(20)的减速过程的方法,其中直流电动机(20)由连接到电源(12)的桥式驱动器(18)驱动,所述电源驱动器(18)旨在提供电源电压 VDD处于电源输出端(14),该方法包括以下步骤:向桥式驱动器(18)施加减速PWM信号,以减速直流电动机(20),并控制桥式驱动器(18),使电动机 如果电源输出(14)的电压超过VDD的电压阈值,则降低反向电流。 如果电源输出(14)处的电压超过高于VDD的电压阈值,则根据本发明,控制电桥驱动器(18)的步骤使得电机引起的反向电流降低,如果 电源输出端的电压超过电压阈值,逐步改变减速PWM信号的脉冲宽度,直到电源(14)输出端的电压达到或低于电压阈值,然后如果电压 在电源输出(14)下降到低于电压阈值的情况下,在与第一方向相反的第二方向上逐步改变减速PWM信号的脉冲宽度,直到电源输出(14)的电压再次达到或超过 电压阈值。 本发明还涉及一种适用于执行上述方法的控制器。
    • 43. 发明申请
    • Driver For an Inductive Load
    • 驱动器用于感性负载
    • US20090045764A1
    • 2009-02-19
    • US12093793
    • 2006-11-08
    • Gian Hoogzaad
    • Gian Hoogzaad
    • H03K3/00H02P7/06
    • H02M7/53871G11B19/20G11B19/2009H02M2003/1555H02M2007/53878H02P25/034
    • A driver (1) supplies an output voltage (VL) to an inductive load (30). The driver comprises an input to receive a pulse width modulated control signal (CS) having a controllable duty cycle within a predetermined range. A first switch circuit (10) receives a first switch signal (CS; ICS) to supply a first voltage (V1), a second switch circuit (13) receives a second switch signal (DCS; CSD) to supply a second voltage (V2), and the output voltage (VL) is the difference between the first voltage (V1) and the second voltage (V2). An inverter (11; 15) and delay circuit (12; 16) receives the control signal (CS) to supply the first switch signal (CS; ICS) and the second switch signal (DCS; CSD) being inverted and delayed with respect to each other. The delay (dT) of the delay circuit (12; 16) is selected to obtain an output voltage having a single polarity for each one of said controllable duty cycles within the predetermined range.
    • 驱动器(1)向感性负载(30)提供输出电压(VL)。 驱动器包括用于接收在预定范围内具有可控占空比的脉宽调制控制信号(CS)的输入。 第一开关电路(10)接收第一开关信号(CS; ICS)以提供第一电压(V1),第二开关电路(13)接收第二开关信号(DCS; CSD)以提供第二电压(V2 ),并且输出电压(VL)是第一电压(V1)和第二电压(V2)之间的差。 逆变器(11; 15)和延迟电路(12; 16)接收控制信号(CS)以提供第一开关信号(CS; ICS)和第二开关信号(DCS; CSD)相对于 彼此。 选择延迟电路(12; 16)的延迟(dT)以在预定范围内获得对于所述可控占空比中的每一个具有单个极性的输出电压。
    • 45. 发明授权
    • Random generator description
    • 随机发生器描述
    • US07236594B2
    • 2007-06-26
    • US10188139
    • 2002-07-02
    • Robert Henrikus Margaretha Van VeldhovenGian Hoogzaad
    • Robert Henrikus Margaretha Van VeldhovenGian Hoogzaad
    • H04L9/00
    • H03K3/84
    • A pseudo random generator comprising a shift register comprising a first flip flop (F0) and n further flip-flops (F1 . . . Fn) each flip-flop (F0) having a D input, a non-inverting output, an inverting output, and a common clock (fclk) input and the first flip-flop (F0) having a set input, each of the non-inverting outputs being connected via a NOR gate (10) to the set input of the first flip-flop (F0) and each of the non-inverting outputs of the flip-flops (F0 . . . Fn) being connected to the input of the first flip-flop (F0) via an XOR gate (11), characterised in that the generator comprises at least one additional logic gate (13, 14, 15; 17, 18, 19) including at least one additional flip-flop (14;18).The extra logic gates may comprise gated to toggle between the inverting end and the non-inverting outputs, or to generate an extra ‘0’ at the output or to chop, preferably randomly, the input signal.
    • 一种伪随机生成器,包括:移位寄存器,包括具有D输入的每个触发器(F 0)和非反相输出的第一触发器(F0)和n个另外的触发器(F 1 ... Fn) 反相输出和公共时钟(fclk)输入和具有设定输入的第一触发器(F0),每个非反相输出端经由或非门(10)连接到第一 触发器(F 0)和触发器的每个非反相输出(F0 ... Fn)经由异或门(11)连接到第一触发器(F 0)的输入端, 其特征在于,所述发生器包括至少一个包括至少一个附加触发器(14; 18)的附加逻辑门(13,14,15,17,18,19)。 额外的逻辑门可以包括门控以在反相端和非反相输出之间切换,或者在输出处产生额外的“0”或者优选地随机输入输入信号。
    • 46. 发明申请
    • Resistor network such as a resistor ladder network and a method for manufacturing such a resistor network
    • 电阻网络如电阻梯形网络以及制造这种电阻网络的方法
    • US20050224915A1
    • 2005-10-13
    • US10517106
    • 2003-05-21
    • Hans TuinhoutGian HoogzaadMaarten Vertregt
    • Hans TuinhoutGian HoogzaadMaarten Vertregt
    • H01L27/04H01L21/822H01L27/08H03M1/06H01L29/00
    • H01L27/0802
    • The invention relates to a resistor network (2) such as a resistor ladder network, comprising at least a resistor body (4) which is provided with at least a column (6) of taps (8) situated between a first tap and a second tap, wherein, in use, at least two taps can be connected with respective first and second sources of reference input potentials, and wherein each tap of the at least one column of taps can be used for outputting an output potential via a contact area which is connected with the concerning tap, wherein the resistor body (4) comprises a multiple of resistor sub-bodies (5), wherein each resistor sub-body (5) is connected with a column (6) of taps (8), and wherein the only electrical connections between the resistor sub-bodies (5) are established by electrical connections via taps (8) connected with the resistor sub-bodies (5). Furthermore the invention relates to a method for manufacturing a resistor network (2) such as a resistor ladder network.
    • 本发明涉及一种电阻网络(2),例如电阻梯形网络,至少包括一个电阻体(4),该电阻器体(4)至少设置有位于第一抽头和第二抽头之间的抽头(6)的至少一列 抽头,其中在使用中,至少两个抽头可以与相应的第一和第二参考输入电位源连接,并且其中所述至少一列抽头的每个抽头可以用于经由接触区域输出输出电位,所述接触区域 与所述有关抽头连接,其中所述电阻体(4)包括多个电阻子体(5),其中每个电阻子体(5)与抽头(8)的列(6)连接,以及 其中通过与电阻子体(5)连接的抽头(8)的电连接来建立电阻子体(5)之间的唯一电连接。 此外,本发明涉及一种用于制造诸如电阻梯形网络的电阻网络(2)的方法。
    • 49. 发明授权
    • Variable gain amplifier
    • 可变增益放大器
    • US08471637B2
    • 2013-06-25
    • US13368372
    • 2012-02-08
    • Gian Hoogzaad
    • Gian Hoogzaad
    • H03G3/10
    • H03G1/0088H03F1/22H03F3/19H03F3/50H03F2200/144H03F2200/211H03F2200/405H03F2200/411H03F2203/5018
    • The invention relates to a variable gain amplifier comprising a first attenuator (1) for receiving an input signal (rf_in) and for transmitting a first attenuated input signal to a first amplifier (2) for amplifying the first attenuated input signal and for generating a first amplified signal to a second attenuator (3) for attenuating the first amplified signal and for transmitting a second attenuated signal to a second amplifier (4) for amplifying the second attenuated signal and for generating an output signal (rf_out). The first attenuator (1) is supplied from a first supply voltage source (10). The second attenuator (3) is supplied from a second supply voltage source (30). The first amplifier (2) is supplied from a third supply voltage source (20), and the second amplifier (4) is supplied from a fourth supply voltage source (40).
    • 本发明涉及一种可变增益放大器,包括用于接收输入信号(rf_in)的第一衰减器(1)和用于将第一衰减输入信号发送到第一放大器(2),用于放大第一衰减输入信号并产生第一衰减输入信号 放大信号到第二衰减器(3),用于衰减第一放大信号并将第二衰减信号发送到第二放大器(4),用于放大第二衰减信号并产生输出信号(rf_out)。 第一衰减器(1)由第一电源电压源(10)提供。 第二衰减器(3)由第二电源电压源(30)提供。 第一放大器(2)由第三电源电压源(20)提供,第二放大器(4)由第四电源电压源(40)提供。