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41. 发明授权

US07849389B2 LDPC (low density parity check) coded modulation symbol decoding 失效
标题翻译： LDPC（低密度奇偶校验）编码调制符号解码
公开(公告)号：US07849389B2
公开(公告)日：2010-12-07
申请号：US11543956
申请日：2006-10-05
申请人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
发明人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
IPC分类号： G06F11/00
CPC分类号： H04L27/2602 , G11B20/1833 , H03M13/1111 , H03M13/1117 , H03M13/112 , H03M13/25 , H03M13/255 , H03M13/256 , H03M13/258 , H03M13/2957 , H03M13/4161 , H03M13/45 , H03M13/6516 , H03M13/6583 , H04L1/0041 , H04L1/005 , H04L1/0058 , H04L1/006 , H04L1/1671 , H04L27/18
摘要： LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.
摘要翻译： LDPC（低密度奇偶校验）编码调制符号解码。通过适当地修改LDPC三部分图来消除比特节点从而生成LDPC二分图（使得符号节点被适当地映射到校验节点从而消除比特节点）来支持符号解码。将符号节点通信地耦合到校验节点的边缘被适当地标记以支持LDPC编码调制信号的符号解码。迭代解码处理可以包括更新校验节点以及估计符号序列和更新符号节点。在一些实施例中，可以执行替代的混合解码方法，使得执行位电平和符号电平解码的组合。该LDPC码解码仅执行比特解码。此外，它提供可比较或更好的比特解码性能，涉及相关度量的迭代更新。

42. 发明申请

US20100220804A1 ASYMMETRICAL MIMO WIRELESS COMMUNICATIONS 有权
标题翻译：不对称MIMO无线通信
公开(公告)号：US20100220804A1
公开(公告)日：2010-09-02
申请号：US12783730
申请日：2010-05-20
申请人： Christopher J. Hansen , Jason A. Trachewsky , Nambirajan Seshadri , Kelly Brian Cameron , Hau Thien Tran , Ba-Zhong Shen
发明人： Christopher J. Hansen , Jason A. Trachewsky , Nambirajan Seshadri , Kelly Brian Cameron , Hau Thien Tran , Ba-Zhong Shen
IPC分类号： H04B7/02
CPC分类号： H04B7/0613 , H04B7/0413
摘要： A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.
摘要翻译：一种用于非对称MIMO无线通信的方法是通过确定用于非对称MIMO无线通信的多个发送天线来开始的。该方法通过确定用于非对称MIMO无线通信的接收天线的数量来继续。当发送天线的数量超过接收天线的数量时，该方法继续使用用于非对称MIMO无线通信的空间时间块编码。当发送天线的数量不超过接收天线的数量时，该方法继续使用用于非对称MIMO无线通信的空间复用。

43. 发明申请

US20100077282A1 True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations 有权
标题翻译： TTCM（Turbo Trellis编码调制）的可变速率和信号星座的真位解码
公开(公告)号：US20100077282A1
公开(公告)日：2010-03-25
申请号：US12627438
申请日：2009-11-30
申请人： Ba-Zhong Shen , Kelly Brian Cameron , Hau Thien Tran
发明人： Ba-Zhong Shen , Kelly Brian Cameron , Hau Thien Tran
IPC分类号： H03M13/25 , H03M13/03 , G06F11/08 , G06F11/10
CPC分类号： H04L1/005 , H03M13/256 , H03M13/258 , H03M13/27 , H03M13/2767 , H03M13/2771 , H03M13/2785 , H03M13/2957 , H03M13/4123 , H03M13/4161 , H04L1/0055 , H04L1/006 , H04L1/0066 , H04L1/0068 , H04L1/0071
摘要： True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations. A decoding approach is presented that allows for decoding on a bit level basis that allows for discrimination of the individual bits of a symbol. Whereas prior art approaches typically perform decoding on a symbol level basis, this decoding approach allows for an improved approach in which the hard decisions/best estimates may be made individually for each of the individual bits of an information symbol. In addition, the decoding approach allows for a reduction in the total number of calculations that need to be performed as well as the total number of values that need to be stored during the iterative decoding. The bit level decoding approach is also able to decode a signal whose code rate and/or signal constellation type (and mapping) may vary on a symbol by symbol basis.
摘要翻译： TTCM（Turbo Trellis编码调制）的可变速率和信号星座的真位解码。提出了一种解码方法，其允许基于比特级的解码，其允许区分符号的各个比特。而现有技术方法通常在符号级基础上执行解码，这种解码方法允许改进的方法，其中可以针对信息符号的各个比特分别进行硬判决/最佳估计。此外，解码方法允许减少需要执行的计算的总数以及在迭代解码期间需要存储的值的总数。比特级解码方法还能够解码其码率和/或信号星座类型（和映射）可以在逐个符号的基础上变化的信号。

44. 发明授权

US07617433B2 Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices 失效
标题翻译：通过扫描子矩阵来实现LDPC（低密度奇偶校验）解码器
公开(公告)号：US07617433B2
公开(公告)日：2009-11-10
申请号：US11360268
申请日：2006-02-23
申请人： Tak K. Lee , Hau Thien Tran , Ba-Zhong Shen , Kelly Brian Cameron
发明人： Tak K. Lee , Hau Thien Tran , Ba-Zhong Shen , Kelly Brian Cameron
IPC分类号： H03M13/00
CPC分类号： H03M13/116 , H03M13/1137 , H03M13/255 , H03M13/27 , H03M13/6362 , H03M13/6566
摘要： Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is decoded processing the columns and rows of the individual sub-matrices of the low density parity check matrix corresponding to the LDPC code. The low density parity check matrix can partitioned into rows and columns according to each of the sub-matrices of it, and each of those sub-matrices also includes corresponding rows and columns. For example, when performing bit node processing, the same columns of at 1 or more sub-matrices can be processed together (e.g., all 1st columns in 1 or more sub-matrices, all 2nd columns in 1 or more sub-matrices, etc.). Analogously, when performing check node processing, the same rows of 1 or more sub-matrices can be processed together (e.g., all 1st rows in 1 or more sub-matrices, all 2nd rows in 1 or more sub-matrices, etc.).
摘要翻译：通过扫描子矩阵实现LDPC（低密度奇偶校验）解码器。提出了一种解码处理与LDPC码对应的低密度奇偶校验矩阵的各个子矩阵的列和行的LDPC编码信号的新方法。低密度奇偶校验矩阵可以根据它的每个子矩阵划分成行和列，并且这些子矩阵中的每一个也包括相应的行和列。例如，当执行位节点处理时，可以一起处理1个或更多个子矩阵的相同列（例如，1个或更多个子矩阵中的所有第1列，1个或更多个子矩阵中的所有第2列等。）。类似地，当执行校验节点处理时，可以一起处理1个或更多个子矩阵的相同行（例如，1个或更多个子矩阵中的所有第1行，1个或更多个子矩阵中的所有第2行等）。

45. 发明申请

US20090217142A1 Rate control adaptable communications 有权
标题翻译：速率控制适应通信
公开(公告)号：US20090217142A1
公开(公告)日：2009-08-27
申请号：US12463386
申请日：2009-05-09
申请人： Kelly Brian Cameron , Ba-Zhong Shen , Hau Thien Tran
发明人： Kelly Brian Cameron , Ba-Zhong Shen , Hau Thien Tran
IPC分类号： H03M13/03 , G06F11/08
CPC分类号： H03M13/3905 , H03M13/256 , H03M13/258 , H03M13/2957 , H03M13/3988 , H03M13/6362 , H03M13/6516
摘要： Rate control adaptable communications. A common trellis is employed at both ends of a communication system (in an encoder and decoder) to code and decode data at different rates. The encoding employs a single encoder whose output bits may be selectively punctured to support multiple modulations (constellations and mappings) according to a rate control sequence. A single decoder is operable to decode each of the various rates at which the data is encoded by the encoder. The rate control sequence may include a number of rate controls arranged in a period that is repeated during encoding and decoding. Either one or both of the encoder and decoder may adaptively select a new rate control sequence based on a variety of operational parameters including operating conditions of the communication system, a change in signal to noise ratio (SNR), etc.
摘要翻译：速率控制适应通信。在通信系统（编码器和解码器）的两端采用通用网格，以不同速率对数据进行编码和解码。编码采用单个编码器，其输出位可以被选择性地打孔以支持根据速率控制序列的多个调制（星座和映射）。单个解码器可操作以解码编码器对数据进行编码的各种速率中的每一个。速率控制序列可以包括在编码和解码期间重复的周期中布置的速率控制的数量。编码器和解码器中的一个或两者可以基于包括通信系统的操作条件，信噪比（SNR）等的变化的各种操作参数自适应地选择新的速率控制序列。

46. 发明授权

US07451386B2 LDPC (Low Density Parity Check) coded modulation hybrid decoding 有权
标题翻译： LDPC（低密度奇偶校验）编码调制混合解码
公开(公告)号：US07451386B2
公开(公告)日：2008-11-11
申请号：US11701156
申请日：2007-02-01
申请人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
发明人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H04L1/005 , H03M13/1105 , H03M13/255 , H04L1/0058
摘要： LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.
摘要翻译： LDPC（低密度奇偶校验）编码调制混合解码。提出了一种新颖的方法，其中对LDPC编码信号执行比特解码和符号级解码（例如混合解码）的组合。对于预定数量的解码迭代，或直到达到足够的精确度，连续替代地对位边消息执行检查节点更新和符号节点更新。位边消息的符号节点更新涉及使用与被解码的符号相对应的符号度量以及最近由校验节点更新更新的位边消息。位边消息的校验节点更新涉及使用最近通过符号节点更新更新的位边消息。符号节点更新还涉及在每次解码迭代期间计算符号的可能的软符号估计。

47. 发明授权

US07447984B2 System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave 有权
公开(公告)号：US07447984B2
公开(公告)日：2008-11-04
申请号：US11292133
申请日：2005-12-01
申请人： Kelly Brian Cameron , Ba-Zhong Shen , Hau Thien Tran
发明人： Kelly Brian Cameron , Ba-Zhong Shen , Hau Thien Tran
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H03M13/253 , H03M13/1102 , H03M13/1515 , H03M13/2966
摘要： System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel approach is presented that combines different coding types within a communication system to perform various types of error correction. This combination of accommodating different coding types may be employed at either end of a communication channel (e.g., at a transmitter end when performing encoding and/or at a receiver end when performing decoding). By combining different coding types within a communication system, the error correcting capabilities of the overall system is significantly improved. The appropriate combination of turbo code and/or LDPC code along with RS code allows for error correction or various error types including random error and burst error (or impulse noise).

48. 发明申请

US20080215950A1 LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing 有权
标题翻译： LDPC（低密度奇偶校验）编码信号解码使用并行和同时的比特节点和校验节点处理
公开(公告)号：US20080215950A1
公开(公告)日：2008-09-04
申请号：US11846761
申请日：2007-08-29
申请人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
发明人： Ba-Zhong Shen , Hau Thien Tran , Kelly Brian Cameron
IPC分类号： H03M13/29 , G06F11/10
CPC分类号： H03M13/1137 , H04L1/005 , H04L1/0057
摘要： LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing. This novel approach to decoding of LDPC coded signals may be described as being LDPC bit-check parallel decoding. In some alternative embodiment, the approach to decoding LDPC coded signals may be modified to LDPC symbol-check parallel decoding or LDPC hybrid-check parallel decoding. A novel approach is presented by which the edge messages with respect to the bit nodes and the edge messages with respect to the check nodes may be updated simultaneously and in parallel to one another. Appropriately constructed executing orders direct the sequence of simultaneous operation of updating the edge messages at both nodes types (e.g., edge and check). For various types of LDPC coded signals, including parallel-block LDPC coded signals, this approach can perform decoding processing in almost half of the time as provided by previous decoding approaches.
摘要翻译： LDPC（低密度奇偶校验）编码信号解码使用并行和同时的比特节点和校验节点处理。这种LDPC编码信号的解码方法可以被描述为LDPC比特检验并行解码。在一些替代实施例中，解码LDPC编码信号的方法可以被修改为LDPC符号校验并行解码或LDPC混合校验并行解码。提出了一种新颖的方法，通过该方法可以相对于校验节点相对于比特节点和边缘消息的边缘消息可以同时并且彼此并行地更新。适当构造的执行命令指示在两种节点类型（例如，边缘和检查）上更新边缘消息的同时操作的顺序。对于包括并行块LDPC编码信号的各种类型的LDPC编码信号，该方法可以在几乎一半的时间内执行由先前的解码方法提供的解码处理。

49. 发明授权

US07409628B2 Efficient design to implement LDPC (Low Density Parity Check) decoder 有权
标题翻译：高效设计实现LDPC（低密度奇偶校验）解码器
公开(公告)号：US07409628B2
公开(公告)日：2008-08-05
申请号：US11171998
申请日：2005-06-30
申请人： Hau Thien Tran , Kelly Brian Cameron , Ba-Zhong Shen
发明人： Hau Thien Tran , Kelly Brian Cameron , Ba-Zhong Shen
IPC分类号： H03M13/45
CPC分类号： H03M13/255 , H03M13/1102 , H03M13/1111 , H03M13/1117 , H03M13/112 , H03M13/1134 , H03M13/1137 , H03M13/116 , H03M13/1165 , H03M13/6505 , H03M13/658
摘要： Efficient design to implement LDPC decoder. The efficient design presented herein provides for a solution that is much easier, smaller, and has less complexity than other possible solutions. The use of a ping-pong memory structure (or pseudo-dual port memory structure) in conjunction with a metric generator near the decoder's front end allows parallel bit/check node processing. An intelligently operating barrel shifter operates with a message passing memory that is operable to store updated edges messages with respect to check nodes as well as updated edges messages with respect to bit nodes. Using an efficient addressing scheme allows the same memory structure to store the two types of edges messages with respect to bit nodes: (1) corresponding to information bits and (2) corresponding to parity bits. In addition, an intelligently designed hardware macro block may be instantiated a number of times into the decoder design to support ever greater design efficiency.
摘要翻译：高效设计实现LDPC解码器。本文提供的高效设计提供了一种比其他可能的解决方案更简单，更小，复杂度更低的解决方案。与解码器前端附近的度量发生器结合使用乒乓存储器结构（或伪双端口存储器结构）允许并行位/校验节点处理。智能操作的桶形移位器利用消息传递存储器操作，该存储器可操作以存储相对于校验节点的更新的边缘消息以及相对于位节点的更新的边缘消息。使用有效的寻址方案允许相同的存储器结构相对于比特节点存储两种类型的边缘消息：（1）对应于信息比特和（2）对应于奇偶校验位。此外，智能设计的硬件宏块可以被多次实例化到解码器设计中以支持更大的设计效率。

50. 发明授权

US07401283B2 Amplifying magnitude metric of received signals during iterative decoding of LDPC (Low Density Parity Check) code and LDPC coded modulation 有权
标题翻译：在LDPC（低密度奇偶校验）码和LDPC编码调制的迭代解码期间，放大接收信号的幅度度量
公开(公告)号：US07401283B2
公开(公告)日：2008-07-15
申请号：US11190334
申请日：2005-07-27
申请人： Ba-Zhong Shen , Kelly Brian Cameron , Scott Richard Powell , Hau Thien Tran
发明人： Ba-Zhong Shen , Kelly Brian Cameron , Scott Richard Powell , Hau Thien Tran
IPC分类号： H03M13/00
CPC分类号： H03M13/658 , H03M13/1111
摘要： Amplifying magnitude metric of received signals during iterative decoding of LDPC code and LDPC coded modulation. By appropriately selecting a metric coefficient value that is used to calculate the initial conditions when decoding LDPC coded signals, a significant reduction in BER may be achieved at certain SNRs. The appropriate selection of the metric coefficient value may be performed depending on the particular SNR at which a communication system is operating. By adjusting this metric coefficient value according to the given LDPC code, modulation, and noise variance, the overall performance of the decoding may be significantly improved. The convergence speed is slowed down so that the decoder will not go to the wrong codeword, and the moving range of the outputs of the decoder is restricted so that the output will not oscillate too much and will eventually move to the correct codeword.
摘要翻译：在LDPC码和LDPC编码调制的迭代解码期间放大接收信号的幅度度量。通过在解码LDPC编码信号时适当地选择用于计算初始条件的度量系数值，可以在某些SNR下实现BER的显着降低。可以根据通信系统正在操作的特定SNR来执行度量系数值的适当选择。通过根据给定的LDPC码，调制和噪声方差调整该度量系数值，可以显着提高解码的整体性能。收敛速度变慢，因此解码器不会进入错误的码字，解码器的输出的移动范围受到限制，使得输出不会振荡太多，最终会移动到正确的码字。

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