会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 42. 发明授权
    • Nonvolatile memory circuit using spin MOS transistors
    • 使用自旋MOS晶体管的非易失性存储电路
    • US08385114B2
    • 2013-02-26
    • US13360904
    • 2012-01-30
    • Hideyuki SugiyamaTetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • Hideyuki SugiyamaTetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • G11C11/14
    • G11C14/0081
    • Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
    • 某些实施例提供了其中第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管串联连接的非易失性存储器电路,第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管串联连接 第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管的栅极连接,第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管的栅极连接,第一n沟道晶体管包括 连接到第一p沟道晶体管的漏极和第二p沟道晶体管的栅极的漏极,第二n沟道晶体管包括连接到第二p沟道晶体管的漏极和第一p沟道晶体管的栅极的漏极 p沟道晶体管,第一和第二n沟道晶体管的栅极连接。
    • 45. 发明授权
    • Reconfigurable logic circuit
    • 可重构逻辑电路
    • US07796423B2
    • 2010-09-14
    • US12339638
    • 2008-12-19
    • Hideyuki SugiyamaMizue IshikawaTomoaki InokuchiYoshiaki SaitoTetsufumi Tanamoto
    • Hideyuki SugiyamaMizue IshikawaTomoaki InokuchiYoshiaki SaitoTetsufumi Tanamoto
    • G11C11/00
    • H03K19/1733G11C11/161G11C11/1675G11C11/1697
    • It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin MOSFETs each having a source and drain containing a magnetic material, and a selecting portion including a plurality of MOSFETs and selecting a spin MOSFET from the plurality of spin MOSFETs, based on control data transmitted from control lines; a determining circuit which determines whether magnetization of the magnetic material of the source and drain of a selected spin MOSFET, which is selected by the selecting portion, is in a first state or in a second state; and a first and second write circuits which put the magnetization of the magnetic material of the source and drain of the selected spin MOSFET into the second and first states respectively by supplying a write current flowing between the source and drain of the selected spin MOSFET.
    • 可以提供可实现高集成度的可重构逻辑电路。 可重配置逻辑电路包括:多路复用器,其包括多个自旋MOSFET,每个具有包含磁性材料的源极和漏极,以及包括多个MOSFET的选择部分,并且基于控制从多个自旋MOSFET中选择自旋MOSFET 从控制线传输的数据; 确定电路,其确定由选择部分选择的所选择的自旋MOSFET的源极和漏极的磁性材料的磁化是处于第一状态还是处于第二状态; 以及第一和第二写入电路,其通过提供在选定的自旋MOSFET的源极和漏极之间流动的写入电流,将所选自旋MOSFET的源极和漏极的磁性材料的磁化分别置于第二和第一状态。
    • 49. 发明申请
    • Magneto-resistance effect element and magnetic memory
    • 磁阻效应元件和磁存储器
    • US20060227465A1
    • 2006-10-12
    • US11228326
    • 2005-09-19
    • Tomoaki InokuchiYoshiaki SaitoHideyuki Sugiyama
    • Tomoaki InokuchiYoshiaki SaitoHideyuki Sugiyama
    • G11B5/33G11B5/127
    • H01F10/3231B82Y25/00G11C11/161G11C11/1675H01F10/3254H01F10/3272H01F10/3281H01L43/08H01L43/10
    • It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer. When the second magnetization pinned layer is made of ferromagnetic material including Co, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Rh, Ag, and Au; when the second magnetization pinned layer is made of ferromagnetic material including Fe, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Rh, Pt, Ir, Al, Ag, and Au; and when the second magnetization pinned layer is made of ferromagnetic material including Ni, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Au, and Ag.
    • 可以减少自旋注入写入所需的电流。 磁阻效应元件包括:第一磁化固定层; 无磁化层; 隧道势垒层; 第二磁化固定层,其磁化方向固定为与第一磁化固定层的磁化方向基本上反平行; 非磁性层。 当第二磁化固定层由包括Co的铁磁材料制成时,非磁性层的材料是包括选自Zr,Hf,Rh,Ag和Au中的至少一种元素的金属; 当第二磁化被钉扎层由包括Fe的铁磁材料制成时,用于非磁性层的材料是包括选自Rh,Pt,Ir,Al,Ag和Au中的至少一种元素的金属; 并且当第二磁化被钉扎层由包括Ni的铁磁材料制成时,用于非磁性层的材料是包括选自Zr,Hf,Au和Ag中的至少一种元素的金属。