专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US07046089B2 Variable gain amplifier 失效
标题翻译：可变增益放大器
公开(公告)号：US07046089B2
公开(公告)日：2006-05-16
申请号：US10731610
申请日：2003-12-08
申请人： Chong Ki Kwon , Gyu Hyung Cho , Mun Yang Park , Jong Dae Kim
发明人： Chong Ki Kwon , Gyu Hyung Cho , Mun Yang Park , Jong Dae Kim
IPC分类号： H03F3/45
CPC分类号： H03G1/0029 , H03F1/3211 , H03F3/45188 , H03F2203/45288 , H03F2203/45398 , H03F2203/45702
摘要： Disclosed is a CMOS variable gain amplifier. The variable gain amplifier comprises a first means for first and second differential input voltages, a second means for controlling its transconductance to generate an output current according to a control voltage, a third means for a bias voltage to generate bias current by current mirror, and to supply a stabilized bias current to the second means using the replica current, and a fourth means for generating an output voltage with a variable gain according to control voltage by its output current generated in the second means. Therefore, the present invention provides a function of controlling low distortion and high linearity in low voltage and a high-speed operation by the supply of a stabilized sharing current bias, and can control a voltage gain in a wide range by the control voltage.
摘要翻译：公开了一种CMOS可变增益放大器。可变增益放大器包括用于第一和第二差分输入电压的第一装置，用于根据控制电压控制其跨导以产生输出电流的第二装置，用于由电流镜产生偏置电流的偏置电压的第三装置，以及使用复制电流向第二装置提供稳定的偏置电流;以及第四装置，用于根据控制电压通过其在第二装置中产生的输出电流产生具有可变增益的输出电压。因此，本发明提供了通过提供稳定的共享电流偏压来控制低电压和高速操作的低失真和高线性度的功能，并且可以通过控制电压来控制宽范围内的电压增益。

42. 发明授权

US06992366B2 Stacked variable inductor 有权
标题翻译：堆叠式可变电感
公开(公告)号：US06992366B2
公开(公告)日：2006-01-31
申请号：US10671637
申请日：2003-09-29
申请人： Cheon Soo Kim , Pil Jae Park , Mun Yang Park , Hyun Kyu Yu
发明人： Cheon Soo Kim , Pil Jae Park , Mun Yang Park , Hyun Kyu Yu
IPC分类号： H01L29/00 , H01L21/20
CPC分类号： H01L28/10 , H01F17/0013 , H01F21/12 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Disclosed is a stacked variable inductors manufactured by stacking M (M≧2) metal layers on a semiconductor substrate, and provides stacked variable inductors comprising, 1 to N inductors continuously connected in serial, wherein each of said inductors is formed on N (N≦M) metal layers that are different each other; first and second ports each connected to the highest positioned inductor and to the lowest positioned inductor among said 1 to N inductors; and at least one MOSFET, and wherein one terminal of at least one MOSFET is connected to one of the first and second ports, and the other one is connected to one of adjacent terminals connected in serial between 1 to N inductors.
摘要翻译：公开了一种通过在半导体衬底上堆叠M（M> = 2）金属层而制造的层叠可变电感器，并提供包括串联连续连接的1至N个电感器的堆叠可变电感器，其中每个所述电感器形成在N <= M）彼此不同的金属层; 所述1至N电感器中的第一和第二端口各自连接到最高位置的电感器和最低位置的电感器; 和至少一个MOSFET，并且其中至少一个MOSFET的一个端子连接到所述第一和第二端口中的一个，并且另一个连接到串联连接在1至N个电感器之间的相邻端子之一。

43. 发明授权

US06950051B2 Analog-digital converter with pipeline folding scheme 有权
标题翻译：具有管道折叠方案的模拟数字转换器
公开(公告)号：US06950051B2
公开(公告)日：2005-09-27
申请号：US10872530
申请日：2004-06-22
申请人： Seung Chul Lee , Min Hyung Cho , Mun Yang Park
发明人： Seung Chul Lee , Min Hyung Cho , Mun Yang Park
IPC分类号： H03M1/16 , H03M1/36 , H03M1/38
CPC分类号： H03M1/141
摘要： Provided is a pipelined folding analog-digital converter, the pipelined folding analog-digital converter comprising: a first sample-and-hold unit that samples and outputs a number of analog input voltages; a reference voltage generator that generates a number of reference voltages; a pre-amplifier that amplifies and outputs a number of values subtracting each reference voltage from the outputs of the first sample-and-hold unit, wherein an offset effect due to asymmetry of the amplifier is eliminated; a first folder that folds and outputs a number of outputs of the pre-amplifier; a second sample-and-hold unit that samples and outputs a number of outputs of the first folder; a second folder that folds and outputs a number of outputs of the second sample-and-hold unit; and a comparator that performs a comparison operation between the outputs of the pre-amplifier and the output values of the second folder to find a digital output value, whereby the offset caused by the device mismatch is removed, so that it is possible to realize a high-resolution analog-digital converter.
摘要翻译：提供了一种流水线折叠模拟数字转换器，该流水线折叠模数转换器包括：第一采样保持单元，其对多个模拟输入电压进行采样和输出; 产生多个参考电压的参考电压发生器; 前置放大器，其放大并输出从所述第一采样保持单元的输出中减去每个参考电压的多个值，其中消除了由于放大器的不对称引起的偏移影响; 折叠并输出前置放大器的多个输出的第一文件夹; 第二采样保持单元，其对所述第一文件夹的多个输出进行采样和输出; 折叠并输出第二采样保持单元的多个输出的第二文件夹; 以及比较器，其执行前置放大器的输出和第二文件夹的输出值之间的比较操作以找到数字输出值，由此消除由于器件失配引起的偏移，从而可以实现高分辨率模拟数字转换器。

44. 发明授权

US06605996B2 Automatically gain controllable linear differential amplifier using variable degeneration resistor 有权
标题翻译：使用可变退化电阻自动增益可控线性差分放大器
公开(公告)号：US06605996B2
公开(公告)日：2003-08-12
申请号：US10039542
申请日：2001-12-31
申请人： Hyun Kyu Yu , Sang-Gug Lee , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Seon-Ho Han , Nam-Soo Kim
发明人： Hyun Kyu Yu , Sang-Gug Lee , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Seon-Ho Han , Nam-Soo Kim
IPC分类号： H03F345
CPC分类号： H03G1/007 , H03F3/45179 , H03F2203/45492 , H03G1/0023
摘要： An automatically gain controllable linear differential amplifier using a variable degeneration resistor is disclosed. The linear differential amplifier includes an input end, a bias current source, a load unit, a first MOS transistor and a second MOS transistor. The linear differential amplifiers of the present invention can control an amplifying gain according to an input signal and improve linearity IIP3 without needing additional power consumption caused by improving the linearity. The automatically gain controllable linear differential amplifier uses NMOS/PMOS transistor so an integration process of the amplifier can be implemented more conveniently and efficiently.
摘要翻译：公开了一种使用可变退化电阻的自动增益可控线性差分放大器。线性差分放大器包括输入端，偏置电流源，负载单元，第一MOS晶体管和第二MOS晶体管。本发明的线性差分放大器可以根据输入信号控制放大增益，并提高线性度IIP3，而不需要通过提高线性度而引起的附加功耗。自动增益可控线性差分放大器使用NMOS / PMOS晶体管，因此可以更方便，高效地实现放大器的集成过程。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式