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41. 发明申请

US20100231310A1 MIXED-MODE PLL 有权
标题翻译：混合模式PLL
公开(公告)号：US20100231310A1
公开(公告)日：2010-09-16
申请号：US12404384
申请日：2009-03-16
申请人： Ping-Ying Wang , Hsiang-Hui Chang
发明人： Ping-Ying Wang , Hsiang-Hui Chang
IPC分类号： H03L7/085
CPC分类号： H03L7/099 , H03L7/16
摘要： A mixed-mode PLL is disclosed. The mixed-mode PLL comprises a digital sigma-delta modulator, a low pass filter, and a digital controlled oscillator. The digital sigma-delta modulator receives a fractional bit signal. The low pass filter is coupled to the digital sigma-delta modulator. The low pass filter receives an output signal of the digital sigma-delta modulator and converts the output signal to an analog control signal. The digital controlled oscillator comprises a varactor dynamically coupled to the low pass filter and receiving the analog control signal.
摘要翻译：公开了一种混合模式PLL。混合模式PLL包括数字Σ-Δ调制器，低通滤波器和数字控制振荡器。数字Σ-Δ调制器接收分数位信号。低通滤波器耦合到数字Σ-Δ调制器。低通滤波器接收数字Σ-Δ调制器的输出信号并将输出信号转换为模拟控制信号。数字控制振荡器包括动态耦合到低通滤波器并接收模拟控制信号的变容二极管。

42. 发明申请

US20100105341A1 TRANSMITTER AND CONTROL METHOD FOR TRANSMITTING AND CALIBRATING A PHASE SIGNAL AND AN AMPLITUDE SIGNAL 有权
标题翻译：用于发射和校准相位信号和放大信号的发射机和控制方法
公开(公告)号：US20100105341A1
公开(公告)日：2010-04-29
申请号：US12258647
申请日：2008-10-27
申请人： Hsin-Hung CHEN , Hsiang-Hui CHANG , Chun-Pang WU
发明人： Hsin-Hung CHEN , Hsiang-Hui CHANG , Chun-Pang WU
IPC分类号： H04B1/02
CPC分类号： H03C5/00
摘要： A transmitter for transmitting and calibrating a phase signal and an amplitude signal. The transmitter comprises a phase modulation path, an amplitude modulation path, and a control unit. The phase modulation path transmits the phase signal. The amplitude modulation path transmits the amplitude signal. The control unit delays the signal on at least one of the phase modulation path and the amplitude modulation.
摘要翻译：用于发送和校准相位信号和振幅信号的发射机。发射机包括相位调制路径，幅度调制路径和控制单元。相位调制路径传输相位信号。振幅调制路径发送振幅信号。控制单元将信号延迟至相位调制路径和振幅调制中的至少一个。

43. 发明申请

US20090096535A1 All-Digital Phase-Locked Loop 有权
标题翻译：全数字锁相环
公开(公告)号：US20090096535A1
公开(公告)日：2009-04-16
申请号：US12202310
申请日：2008-08-31
申请人： Hsiang-Hui Chang
发明人： Hsiang-Hui Chang
IPC分类号： H03L7/08
CPC分类号： H03L7/085 , H03L7/0991 , H03L2207/50
摘要： For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with only digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By modulating certain parameters within the ADPLL by following an all-pass frequency response, a loop gain of the ADPLL may be precisely modulated, and an available bandwidth of the ADPLL is also significantly broadened.
摘要翻译：为了减少模拟锁相环中的误差，使用仅数字分量和数字运算的全数字锁相环（ADPLL）。 ADPLL也可用于直接调频（DFM）。通过跟踪全通频率响应来调制ADPLL内的某些参数，可以精确地调制ADPLL的环路增益，并且ADPLL的可用带宽也显着扩大。

44. 发明授权

US08861644B2 Devices of IQ mismatch calibration, and methods thereof 有权
标题翻译： IQ失配校准装置及其方法
公开(公告)号：US08861644B2
公开(公告)日：2014-10-14
申请号：US13168226
申请日：2011-06-24
申请人： Hsin-Hung Chen , Hsiang-Hui Chang
发明人： Hsin-Hung Chen , Hsiang-Hui Chang
IPC分类号： H04L27/20 , H04L27/36
CPC分类号： H04L27/364
摘要： The device with IQ mismatch compensation includes a transmitter oscillator, a transmitter module, and a loop-back module. The transmitter module is arranged to up-convert a transmitter signal with the oscillator signal to generate an RF signal. The loop-back module is arranged to down-convert the RF signal with the oscillator signal to determine a transmitter IQ mismatch parameter, and effects of IQ mismatch of the loop-back module are calibrated by inputting a test signal and the oscillator signal before the down-converting of the RF signal. The transmitter module is arranged to reduce effects of IQ mismatch of a transmitter path in the transmitter module according to the transmitter IQ mismatch parameter.
摘要翻译：具有IQ失配补偿的器件包括发射机振荡器，发射器模块和环回模块。发射机模块被布置成使用振荡器信号对发射机信号进行上变频以产生RF信号。环回模块被布置为利用振荡器信号对RF信号进行下变频，以确定发射机IQ失配参数，并且通过在测试信号之前输入测试信号和振荡器信号来校准环回模块的IQ失配的影响 RF信号的下变频。发射机模块被布置为根据发射机IQ不匹配参数来减少发射机模块中的发射机路径的IQ失配的影响。

45. 发明授权

US08502613B2 Oscillating circuit 有权
标题翻译：振荡电路
公开(公告)号：US08502613B2
公开(公告)日：2013-08-06
申请号：US13170860
申请日：2011-06-28
申请人： Ping-Ying Wang , Hsiang-Hui Chang
发明人： Ping-Ying Wang , Hsiang-Hui Chang
IPC分类号： H03L7/085 , H03C3/22
CPC分类号： H03L7/099 , H03L7/16
摘要： An oscillating circuit including a digital sigma-delta modulator and a controlled oscillator is disclosed. The digital sigma-delta modulator receives a fractional bit signal to generate a control signal. The controlled oscillator includes a varactor dynamically coupled to receive the control signal.
摘要翻译：公开了一种包括数字Σ-Δ调制器和受控振荡器的振荡电路。数字Σ-Δ调制器接收分数位信号以产生控制信号。受控振荡器包括动态耦合以接收控制信号的变容二极管。

46. 发明申请

US20120328041A1 DEVICES OF IQ MISMATCH CALIBRATION, AND METHODS THEREOF 有权
标题翻译： IQ错配校准的设备及其方法
公开(公告)号：US20120328041A1
公开(公告)日：2012-12-27
申请号：US13168226
申请日：2011-06-24
申请人： Hsin-Hung Chen , Hsiang-Hui Chang
发明人： Hsin-Hung Chen , Hsiang-Hui Chang
IPC分类号： H04B15/00 , H04L25/03
CPC分类号： H04L27/364
摘要： The device with IQ mismatch compensation includes a transmitter oscillator, a transmitter module, and a loop-back module. The transmitter module is arranged to up-convert a transmitter signal with the oscillator signal to generate an RF signal. The loop-back module is arranged to down-convert the RF signal with the oscillator signal to determine a transmitter IQ mismatch parameter, and effects of IQ mismatch of the loop-back module are calibrated by inputting a test signal and the oscillator signal before the down-converting of the RF signal. The transmitter module is arranged to reduce effects of IQ mismatch of a transmitter path in the transmitter module according to the transmitter IQ mismatch parameter.
摘要翻译：具有IQ失配补偿的器件包括发射机振荡器，发射器模块和环回模块。发射机模块被布置成使用振荡器信号对发射机信号进行上变频以产生RF信号。环回模块被布置为利用振荡器信号对RF信号进行下变频，以确定发射机IQ失配参数，并且通过在测试信号之前输入测试信号和振荡器信号来校准环回模块的IQ失配的影响 RF信号的下变频。发射机模块被布置为根据发射机IQ不匹配参数来减少发射机模块中的发射机路径的IQ失配的影响。

47. 发明申请

US20120212296A1 SIGNAL GENERATING CIRCUIT AND SIGNAL GENERATING METHOD 有权
标题翻译：信号发生电路和信号发生方法
公开(公告)号：US20120212296A1
公开(公告)日：2012-08-23
申请号：US13029130
申请日：2011-02-17
申请人： Hsin-Hung Chen , Hsiang-Hui Chang
发明人： Hsin-Hung Chen , Hsiang-Hui Chang
IPC分类号： H03L7/24 , H03L7/099
CPC分类号： H03C3/0925 , H03C3/0941 , H03C3/0958
摘要： A signal generating circuit includes: an operating circuit arranged to generate a first control signal according to a reference clock signal and a feedback oscillating signal; a controllable oscillator arranged to generate an output oscillating signal according to the first control signal and a second control signal; a feedback circuit arranged to generate the feedback oscillating signal according to the output oscillating signal and a third control signal; a control circuit arranged to generate the second control signal and the third control signal according to an input signal; and a calibrating circuit arranged to calibrate the control circuit to adjust the second control signal by detecting a phase difference between the reference clock signal and the feedback oscillating signal.
摘要翻译：信号发生电路包括：操作电路，被配置为根据参考时钟信号和反馈振荡信号产生第一控制信号; 可控振荡器，被配置为根据第一控制信号和第二控制信号产生输出振荡信号; 反馈电路，被配置为根据输出振荡信号和第三控制信号产生反馈振荡信号; 控制电路，被配置为根据输入信号产生第二控制信号和第三控制信号; 以及校准电路，其布置成通过检测参考时钟信号和反馈振荡信号之间的相位差校准控制电路来调整第二控制信号。

48. 发明申请

US20120177094A1 POLAR TRANSMITTER AND RELATED SIGNAL TRANSMITTING METHOD 有权
标题翻译：极点发射器及相关信号传输方法
公开(公告)号：US20120177094A1
公开(公告)日：2012-07-12
申请号：US12987154
申请日：2011-01-09
申请人： Hsiang-Hui Chang , Hsin-Hung Chen , Chi-Hsueh Wang
发明人： Hsiang-Hui Chang , Hsin-Hung Chen , Chi-Hsueh Wang
IPC分类号： H04L27/04 , H04B17/00 , H04L27/36
CPC分类号： H03C5/00 , H03C2200/0079
摘要： A polar transmitter includes: a processor arranged to convert signals from a specific coordinate system to a polar coordinate system, wherein the signals in the polar coordinate system comprises a phase component and an amplitude component; a PM path configured to have a constant PM group delay, for processing the phase component; an AM path, of which an AM group delay is capable of being determined, for processing the amplitude component; and an adjustable delay circuit, arranged to adjust delay of the signals in the specific coordinate system according to the constant PM group delay and the calibrated AM group delay.
摘要翻译：极性发射器包括：处理器，被布置成将来自特定坐标系的信号转换为极坐标系，其中极坐标系中的信号包括相位分量和振幅分量; PM路径被配置为具有恒定的PM组延迟，用于处理相位分量; 可以确定AM组延迟的AM路径，用于处理幅度分量; 以及可调延迟电路，被布置为根据恒定的PM组延迟和校准的AM组延迟来调整特定坐标系中的信号的延迟。

49. 发明申请

US20120056767A1 SIGNAL PROCESSING APPARATUS WITH SIGMA-DELTA MODULATING BLOCK COLLABORATING WITH NOTCH FILTERING BLOCK AND RELATED SIGNAL PROCESSING METHOD THEREOF 有权
标题翻译：信号处理装置与SIGMA-DELTA调制块与NOTCH滤波器协同工作及其相关信号处理方法
公开(公告)号：US20120056767A1
公开(公告)日：2012-03-08
申请号：US13025171
申请日：2011-02-11
申请人： Hsiang-Hui Chang , Caiyi Wang , George Chien , Hsin-Hung Chen , Chih-Jung Chen
发明人： Hsiang-Hui Chang , Caiyi Wang , George Chien , Hsin-Hung Chen , Chih-Jung Chen
IPC分类号： H03M3/02
CPC分类号： H03M3/344 , H03M3/436 , H03M3/50 , H03M7/3042
摘要： One signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is arranged to perform a notch filtering operation upon the signal output for generating a filtered signal output. Another signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is enabled for performing a notch filtering operation upon the signal output when the signal processing apparatus operates in a first operational mode, and the notch filtering block is disabled when the signal processing apparatus operates in a second operational mode.
摘要翻译：一个信号处理装置包括Σ-Δ调制块和陷波滤波块。 Σ-Δ调制块被布置成在信号输入端执行Σ-Δ调制，从而产生信号输出。陷波滤波块被布置成在信号输出上执行陷波滤波操作以产生滤波信号输出。另一信号处理装置包括Σ-Δ调制块和陷波滤波块。 Σ-Δ调制块被布置成在信号输入端执行Σ-Δ调制，从而产生信号输出。当信号处理装置在第一操作模式下操作时，陷波滤波块被使能以对信号输出执行陷波滤波操作，并且当信号处理装置在第二操作模式下操作时，陷波滤波块被禁用。

50. 发明申请

US20120040630A1 AMPLITUDE MODULATION CIRCUIT IN POLAR TRANSMITTER AND METHOD FOR CALIBRATING AMPLITUDE OFFSET IN POLAR TRANSMITTER 有权
标题翻译：极坐标放大器中的振幅调制电路和用于校准极坐标放大器中的振幅偏移的方法
公开(公告)号：US20120040630A1
公开(公告)日：2012-02-16
申请号：US13279319
申请日：2011-10-23
申请人： Hsin-Hung Chen , Hsiang-Hui Chang , Chun-Pang Wu , Yung-Yu Lin , Jong-Woei Chen
发明人： Hsin-Hung Chen , Hsiang-Hui Chang , Chun-Pang Wu , Yung-Yu Lin , Jong-Woei Chen
IPC分类号： H04B1/02
CPC分类号： H04B1/04 , H03C5/00 , H04B2001/0491
摘要： An amplitude modulation circuit in a polar transmitter includes a digital-to-analog converter (DAC), a filter, a gm stage, and a calibration module. The DAC is arranged to be coupled to an amplitude modulation signal input in a normal mode. The filter is coupled to the DAC, and the gm stage is coupled to the filter. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. A method for calibrating an amplitude offset in the polar transmitter includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.
摘要翻译：极性发射机中的幅度调制电路包括数模转换器（DAC），滤波器，gm级和校准模块。 DAC被布置成与正常模式中输入的幅度调制信号耦合。滤波器耦合到DAC，并且gm级耦合到滤波器。校准模块具有耦合到gm级的输入，以及耦合到DAC和gm级之间路径上的节点的输出。用于校准极化发射机中的振幅偏移的方法包括：根据从gm级产生的幅度调制信号产生振幅偏移校准信号; 以及经由校准模块的输出将幅度偏移校准信号发送到DAC和gm级之间的路径上的节点，以便校准振幅偏移。

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