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31. 发明申请

US20150220129A1 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM AND CONTROL METHOD FOR INFORMATION PROCESSING SYSTEM 有权
标题翻译：信息处理装置，信息处理系统和信息处理系统的控制方法
公开(公告)号：US20150220129A1
公开(公告)日：2015-08-06
申请号：US14572854
申请日：2014-12-17
申请人： FUJITSU LIMITED
发明人： Masahiro Miwa
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F1/324 , G06F1/3206 , G06F1/3228 , G06F1/3234 , G06F1/3296 , G06F9/45533 , G06F13/1657 , Y02D10/126 , Y02D10/26 , Y02D10/28
摘要： An information processing apparatus connected to another information processing apparatus includes an arithmetic processing device, and one or more processors configured to detect an exception event of a self main memory when the arithmetic processing device requests an access to data on a main memory possessed by the another information processing apparatus and vary a clock frequency or a voltage of the arithmetic processing device on the basis of the detection of the exception event.
摘要翻译：连接到另一个信息处理设备的信息处理设备包括算术处理设备，以及一个或多个处理器，被配置为当算术处理设备请求对另一个所拥有的主存储器上的数据的访问时，检测自主主存储器的异常事件信息处理装置，并且基于异常事件的检测来改变算术处理装置的时钟频率或电压。

32. 发明授权

US09069593B2 Systems and methods for deletion of untracked datastore paths 有权
标题翻译：用于删除未跟踪的数据存储路径的系统和方法
公开(公告)号：US09069593B2
公开(公告)日：2015-06-30
申请号：US13211087
申请日：2011-08-16
申请人： Andrey Falko
发明人： Andrey Falko
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , G06F2009/45562 , Y02D10/26 , Y02D10/28
摘要： In an embodiment, first and second lists of virtual machine datastore paths are obtained. The first list includes datastore paths on a datastore. The second list includes datastore paths that are associated with existing virtual machines. The first and second lists are compared and non-matching datastore paths are deleted from the datastore, thereby freeing up disk space on the datastore.
摘要翻译：在一个实施例中，获得虚拟机数据存储路径的第一和第二列表。第一个列表包括数据存储上的数据存储路径。第二个列表包括与现有虚拟机相关联的数据存储路径。比较第一个和第二个列表，并从数据存储中删除不匹配的数据存储区路径，从而释放数据存储区上的磁盘空间。

33. 发明申请

US20150006918A1 METHOD AND SYSTEM FOR MONITORING RESOURCE USAGE OF LOGICAL DOMAINS 有权
标题翻译：监控逻辑域资源使用的方法与系统
公开(公告)号：US20150006918A1
公开(公告)日：2015-01-01
申请号：US13932715
申请日：2013-07-01
申请人： Oracle International Corporation
发明人： Kellena Dunckley Page , Julia Diane Harper
IPC分类号： G06F1/26 , G06F9/455
CPC分类号： G06F1/26 , G06F1/28 , G06F1/3206 , G06F1/3209 , G06F1/3234 , G06F9/45533 , Y02D10/26 , Y02D10/28
摘要： A method for obtaining power management data for a system executing by at least one processor, where a plurality of logical domains are executing on the system. The method includes determining, using the power management data, power consumption for each of the plurality of logical domains and receiving a request for power consumption information for the system. The method further includes providing, in response to the request, the power consumption information, where the power consumption information specifies the power consumption for at least one of the plurality of logical domains.
摘要翻译：一种用于获得由至少一个处理器执行的系统的功率管理数据的方法，其中多个逻辑域正在系统上执行。该方法包括使用功率管理数据来确定多个逻辑域中的每一个的功率消耗，并且接收对该系统的功耗信息的请求。所述方法还包括响应于所述请求提供所述功耗信息，其中所述功耗信息指定所述多个逻辑域中的至少一个的功率消耗。

34. 发明授权

US08898666B2 Virtual machine system and virtual machine system control method for controlling program execution on a plurality of processors that have a plurality of privileged modes 有权
标题翻译：用于控制具有多个特权模式的多个处理器上的程序执行的虚拟机系统和虚拟机系统控制方法
公开(公告)号：US08898666B2
公开(公告)日：2014-11-25
申请号：US13577311
申请日：2011-09-07
申请人： Masahiko Saito , Teruto Hirota , Hiroo Ishikawa
发明人： Masahiko Saito , Teruto Hirota , Hiroo Ishikawa
IPC分类号： G06F9/455 , G06F9/50 , G06F21/74
CPC分类号： G06F9/5077 , G06F9/45533 , G06F21/74 , G06F2009/45587 , Y02D10/22 , Y02D10/26 , Y02D10/28 , Y02D10/36
摘要： A virtual machine system is provided with a processor having only two privileged modes, a low privileged mode and a high privileged mode, and achieves both a security function for protecting digital copyrighted works or the like and an operating system switching function that guarantees system reliability. The virtual machine system is provided with a first and a second processor and executes a hypervisor on the first processor in the high privileged mode. An operating system on the second processor is executed by cooperation between the hypervisor running on the first processor and a program running on the second processor in low privileged mode. This eliminates the need for running the hypervisor on the second processor in the high privileged mode, thus allowing for execution on the second processor in the high privileged mode of a program for implementing the security function.
摘要翻译：虚拟机系统具有仅具有两个特权模式，低特权模式和高特权模式的处理器，并且实现了保护数字版权作品等的安全功能和保证系统可靠性的操作系统切换功能。虚拟机系统设置有第一和第二处理器，并且在高特权模式下在第一处理器上执行管理程序。第二处理器上的操作系统通过在第一处理器上运行的虚拟机管理程序与在低特权模式下在第二处理器上运行的程序之间的协作来执行。这消除了在高特权模式下在第二处理器上运行管理程序的需要，从而允许在用于实现安全功能的程序的高特权模式下在第二处理器上执行。

35. 发明申请

US20140282501A1 Algorithm and Apparatus To Deploy Virtual Machine Monitor on Demand 有权
标题翻译：根据需要部署虚拟机监控的算法和装置
公开(公告)号：US20140282501A1
公开(公告)日：2014-09-18
申请号：US13796442
申请日：2013-03-12
申请人： QUALCOMM INCORPORATED
发明人： Thomas M. Zeng , Azzedine Touzni , Philip T. Mueller, JR. , Plyush Patel
IPC分类号： G06F9/455 , G06F9/50
CPC分类号： G06F9/45558 , G06F9/45533 , G06F9/45545 , G06F9/5016 , G06F12/10 , G06F12/1009 , G06F12/1027 , G06F12/1491 , G06F21/44 , G06F21/53 , G06F2009/45583 , G06F2009/45587 , G06F2212/1052 , G06F2212/151 , G06F2212/152 , G06F2212/68 , Y02D10/13 , Y02D10/26 , Y02D10/28
摘要： In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a hypervisor operating on a computing device during sandbox sessions. In the various aspects, a high-level operating system may allocate memory such that its intermediate physical addresses are equal to the physical addresses. When the hypervisor is disabled, the hypervisor may suspend second stage translations from intermediate physical addresses to physical addresses. During a sandbox session, the hypervisor may be enabled and resume performing second stage translations.
摘要翻译：在各个方面，可以使用虚拟化技术来提高性能并且通过在沙盒会话期间选择性地启用在计算设备上操作的管理程序来减少所消耗的功率量。在各个方面，高级操作系统可以分配存储器，使得其中间物理地址等于物理地址。当管理程序被禁用时，管理程序可以将中间物理地址的第二级转换挂起到物理地址。在沙箱会话期间，管理程序可能被启用，并恢复执行第二阶段转换。

36. 发明申请

US20140281376A1 Creating An Isolated Execution Environment In A Co-Designed Processor 有权
标题翻译：在协同设计的处理器中创建一个隔离的执行环境
公开(公告)号：US20140281376A1
公开(公告)日：2014-09-18
申请号：US13795720
申请日：2013-03-12
申请人： Koichi Yamada , Palanivel Rajan Shanmugavelayutham , Scott D. Rodgers , Barry E. Huntley , James D. Beaney, JR. , Boaz Tamir
发明人： Koichi Yamada , Palanivel Rajan Shanmugavelayutham , Scott D. Rodgers , Barry E. Huntley , James D. Beaney, JR. , Boaz Tamir
IPC分类号： G06F9/38
CPC分类号： G06F9/3885 , G06F9/44 , G06F9/45516 , G06F9/45533 , Y02D10/26 , Y02D10/28
摘要： In an embodiment, a processor includes a binary translation (BT) container having code to generate a binary translation of a first code segment and to store the binary translation in a translation cache, a host entity logic to manage the BT container and to identify the first code segment, and protection logic to isolate the BT container from a software stack. In this way, the BT container is configured to be transparent to the software stack. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括具有生成第一代码段的二进制转换和将二进制转换存储在转换高速缓存中的代码的二进制转换（BT）容器，用于管理BT容器的主机实体逻辑，并且识别第一代码段和用于将BT容器与软件堆栈隔离的保护逻辑。这样，BT容器被配置为对软件堆栈是透明的。描述和要求保护其他实施例。

37. 发明申请

US20140259013A1 VIRTUALIZATION ACROSS PHYSICAL PARTITIONS OF A MULTI-CORE PROCESSOR (MCP) 有权
标题翻译：多核处理器（MCP）物理分区之间的虚拟化
公开(公告)号：US20140259013A1
公开(公告)日：2014-09-11
申请号：US14281062
申请日：2014-05-19
申请人： International Business Machines Corporation
发明人： Karl J. Duvalsaint , Harm P. Hofstee , Daeik Kim , Moon J. Kim
IPC分类号： G06F9/50 , G06F9/455
CPC分类号： G06F9/5077 , G06F9/45533 , Y02D10/22 , Y02D10/26 , Y02D10/28 , Y02D10/36
摘要： Among other things, the disclosure is applied to a generic microprocessor architecture with a set (e.g., one or more) of controlling/main processing elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs using program code embodied as a set of virtualized control threads. The apparatus includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements. In accordance with these features, virtualized control threads can traverse the physical boundaries of the MCP to control SPE(s) (e.g., logical partitions having one or more SPEs) in a different physical partition (e.g., different from the physical partition from which the virtualized control threads originated.
摘要翻译：除其他之外，本公开应用于具有一组（例如，一个或多个）控制/主处理元件（例如MPE）和一组子处理元件（例如SPE）的通用微处理器架构。在这种安排下，MPEs和SPE的组织方式是使用较少数量的MPE使用体现为一组虚拟控制线程的程序代码控制一组SPE的行为。该装置包括耦合到与核耦合的电源的MCP，以向每个核（或核心组）提供电源电压以及控制数字元件和子处理元件的多个实例。根据这些特征，虚拟化控制线程可以遍历MCP的物理边界以控制不同物理分区（例如，不同于其中的物理分区）的SPE（例如，具有一个或多个SPE的逻辑分区）虚拟化控制线程发起。

38. 发明授权

US08813175B2 Multimodal computing device 有权
标题翻译：多模式计算设备
公开(公告)号：US08813175B2
公开(公告)日：2014-08-19
申请号：US13498424
申请日：2011-08-15
申请人： Tripatinder Chowdhry
发明人： Tripatinder Chowdhry
IPC分类号： G06F21/00 , H04L29/06
CPC分类号： G06F9/45533 , G06F9/468 , G06F9/485 , G06F21/74 , Y02D10/24 , Y02D10/26 , Y02D10/28
摘要： Technologies described herein generally provide a multimodal device capable of providing at least dual usage. In an example, the multimodal device may include base hardware and a hypervisor that runs on the base hardware. A work virtual machine may include a work operating system that is configured to operate on the hypervisor. A home virtual machine may include a home operating system that is configured to operate on the hypervisor. The work virtual machine may further include an arbitrator operating system that is configured to operate on hypervisor. The arbitrator operating system may be configured to run a smart arbitrator server. The smart arbitrator server may be configured to provide a gateway between the work virtual machine and the home virtual machine. The smart arbitrator server may also be configured to enforce various policies between the work virtual machine and the home virtual machine.
摘要翻译：本文描述的技术通常提供能够提供至少双重用途的多模式设备。在一个示例中，多模式设备可以包括基本硬件和在基础硬件上运行的管理程序。工作虚拟机可以包括配置为在管理程序上操作的工作操作系统。家庭虚拟机可以包括被配置为在管理程序上操作的家庭操作系统。工作虚拟机还可以包括被配置为在管理程序上操作的仲裁操作系统。仲裁器操作系统可以被配置为运行智能仲裁器服务器。智能仲裁器服务器可以被配置为在工作虚拟机和家庭虚拟机之间提供网关。智能仲裁器服务器还可以被配置为在工作虚拟机和家庭虚拟机之间执行各种策略。

39. 发明授权

US08806182B2 Multiple-core processor supporting multiple instruction set architectures 有权
标题翻译：支持多指令集架构的多核处理器
公开(公告)号：US08806182B2
公开(公告)日：2014-08-12
申请号：US13182181
申请日：2011-07-13
申请人： James Walter Rymarczyk , Michael Ignatowski , Thomas J. Heller, Jr.
发明人： James Walter Rymarczyk , Michael Ignatowski , Thomas J. Heller, Jr.
IPC分类号： G06F15/00 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F9/45533 , G06F9/30181 , G06F9/3885 , G06F9/5077 , G06F12/0802 , G06F15/7842 , G06F2209/507 , G06F2212/1028 , Y02D10/13 , Y02D10/22 , Y02D10/26 , Y02D10/28 , Y02D10/36
摘要： A multiple-core processor supporting multiple instruction set architectures provides a power-efficient and flexible platform for virtual machine environments requiring multiple support for multiple instruction set architectures (ISAs). The processor includes multiple cores having disparate native ISAs and that may be selectively enabled for operation, so that power is conserved when support for a particular ISA is not required of the processor. The multiple cores may share a common first level cache and be mutually-exclusively selected for operation, or multiple level-one caches may be provided, one associated with each of the cores and the cores operated as needed, including simultaneous execution of disparate ISAs. A hypervisor controls operation of the cores and locates a core and enables it if necessary when a request to instantiate a virtual machine having a specified ISA is received.
摘要翻译：支持多指令集架构的多核处理器为需要多个支持多指令集体系结构（ISAs）的虚拟机环境提供功率高效且灵活的平台。处理器包括具有不同的本地ISA的多个核，并且可以选择性地启用操作，以便当对处理器不需要对特定ISA的支持时，节省功率。多个核心可以共享公共的第一级高速缓存并且被互斥地选择用于操作，或者可以提供多个一级缓存，一个与每个核心和根据需要运行的核心相关联，包括同时执行不同的ISA。虚拟机管理程序控制核心的操作并定位核心，并且如果需要，当接收到具有指定的ISA的虚拟机的实例化请求时，它可以启用它。

40. 发明申请

US20140096132A1 FLEXIBLE ACCELERATION OF CODE EXECUTION 有权
标题翻译：代码执行的灵活加速
公开(公告)号：US20140096132A1
公开(公告)日：2014-04-03
申请号：US13631408
申请日：2012-09-28
申请人： Cheng Wang , Youfeng Wu
发明人： Cheng Wang , Youfeng Wu
IPC分类号： G06F9/455 , G06F9/00
CPC分类号： G06F9/4552 , G06F8/44 , G06F9/45516 , G06F9/45533 , G06F9/45554 , Y02D10/26 , Y02D10/28
摘要： Technologies for performing flexible code acceleration on a computing device includes initializing an accelerator virtual device on the computing device. The computing device allocates memory-mapped input and output (I/O) for the accelerator virtual device and also allocates an accelerator virtual device context for a code to be accelerated. The computing device accesses a bytecode of the code to be accelerated and determines whether the bytecode is an operating system-dependent bytecode. If not, the computing device performs hardware acceleration of the bytecode via the memory-mapped I/O using an internal binary translation module. However, if the bytecode is operating system-dependent, the computing device performs software acceleration of the bytecode.
摘要翻译：在计算设备上执行灵活代码加速的技术包括在计算设备上初始化加速器虚拟设备。计算设备为加速器虚拟设备分配内存映射输入和输出（I / O），并为加速的代码分配加速器虚拟设备上下文。计算设备访问要加速的代码的字节码，并确定字节码是否是依赖于操作系统的字节码。如果不是，计算设备通过使用内部二进制翻译模块的内存映射I / O执行字节码的硬件加速。但是，如果字节码与操作系统有关，则计算设备执行字节码的软件加速。

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