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31. 发明授权

US5841155A Semiconductor device containing two joined substrates 失效
标题翻译：包含两个接合的基板的半导体器件
公开(公告)号：US5841155A
公开(公告)日：1998-11-24
申请号：US597228
申请日：1996-02-06
申请人： Yoshio Terasawa
发明人： Yoshio Terasawa
IPC分类号： H01L21/18 , H01L21/329 , H01L21/331 , H01L21/332 , H01L21/336 , H01L29/423 , H01L29/739 , H01L29/744 , H01L29/78 , H01L29/74
CPC分类号： H01L29/7397 , H01L21/187 , H01L29/66348 , H01L29/66356 , H01L29/66371 , H01L29/7392 , H01L29/744 , H01L29/7813 , H01L29/4232 , H01L29/4238 , Y10S148/012
摘要： A method of manufacturing a joined-type semiconductor device having a gate structure. The semiconductor device includes a first and second semiconductor substrates each having a substrate body, and a first and a second main surfaces which are opposite to each other. A gate structure is formed in the first main surface of the first substrate. A highly-doped semiconductor layer is formed in the first main surface of the second substrate and has an impurity-concentration which is higher than that of the substrate body of the second substrate. The first main surfaces of the two substrates are joined with each other, by subjecting the two substrates to a heat treatment so that impurities in the highly-doped semiconductor layer of the second substrate are driven into the surface region of the first substrate, and a diffusion layer is thereby formed in the first main surface of the first substrate.
摘要翻译：一种具有栅极结构的接合型半导体器件的制造方法。半导体器件包括每个具有基板主体的第一和第二半导体基板以及彼此相对的第一主表面和第二主表面。栅极结构形成在第一基板的第一主表面中。在第二基板的第一主表面上形成高掺杂半导体层，其杂质浓度高于第二基板的基板本体的杂质浓度。通过对两个基板进行热处理，使第二基板的高掺杂半导体层中的杂质被驱动到第一基板的表面区域中，使两个基板的第一主表面相互连接，从而在第一基板的第一主表面上形成扩散层。

32. 发明授权

US5757035A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5757035A
公开(公告)日：1998-05-26
申请号：US772884
申请日：1996-12-24
申请人： Yoshio Terasawa
发明人： Yoshio Terasawa
IPC分类号： H01L29/739 , H01L29/74 , H01L29/744
CPC分类号： H01L29/744 , H01L29/7392
摘要： In a surface of a silicon substrate of one conductivity type, there are formed a plurality of depressions or recesses, gate regions of opposite conductivity type are formed at bottoms of respective recesses, gate electrodes are provided on respective gate regions, and an electrically conductive block is joined to the surface of the semiconductor substrate. Between the surface of the semiconductor substrate and the electrically conductive block a contact region having a high impurity concentration and/or an electrically conductive material layer may be provided in order to improve electrical and mechanical properties of the contact between the semiconductor substrate and the electrically conductive block. The gate region can have a high impurity concentration and a distance between a channel region and the electrically conductive block can be very small.
摘要翻译：在一种导电类型的硅衬底的表面中，形成多个凹陷或凹陷，在各个凹部的底部形成相反导电类型的栅极区，在各个栅极区上设置栅电极，并且导电块连接到半导体衬底的表面。在半导体衬底的表面和导电块之间可以提供具有高杂质浓度的接触区域和/或导电材料层，以便改善半导体衬底与导电之间的接触的电学和机械性能块。栅极区域可以具有高的杂质浓度，并且沟道区域和导电块之间的距离可以非常小。

33. 发明授权

US5017992A High blocking-capacity semiconductor component 失效
标题翻译：高阻塞容量半导体元件
公开(公告)号：US5017992A
公开(公告)日：1991-05-21
申请号：US490288
申请日：1990-03-08
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/74 , H01L29/08 , H01L29/417 , H01L29/744
CPC分类号： H01L29/744 , H01L29/0834 , H01L29/41716
摘要： In the case of a high blocking-capacity semiconductor component with an anode structure, which provides between the n-type base layer (6) and the anode-side p-type emitter regions (8) an n-doped barrier layer (7), and between the p-type emitter regions (8) emitter short-circuits with short-circuit contact regions (9), by partitioning of the barrier layer (7) into local barrier-layer regions (7a,b) an easily adjustable and simultaneously increased short-circuit resistance (R.sub.s) in the short-circuit path is obtained.
摘要翻译：在n型基极层（6）和阳极侧p型发射极区域（8）之间提供具有阳极结构的高阻塞容量半导体元件的情况下，n掺杂势垒层（7），并且通过将阻挡层（7）分隔成局部阻挡层区域（7a，b），在p型发射极区域（8）具有短路接触区域（9）的发射极短路之间，容易调节和同时增加了短路路径中的短路电阻（Rs）。

34. 发明授权

US5005065A High current gate turn-off thyristor 失效
标题翻译：大电流门极关断晶闸管
公开(公告)号：US5005065A
公开(公告)日：1991-04-02
申请号：US334131
申请日：1989-04-06
申请人： Dante E. Piccone , James E. McIntyre, deceased , Leroy B. Major
发明人： Dante E. Piccone , James E. McIntyre, deceased , Leroy B. Major
IPC分类号： H01L29/744
CPC分类号： H01L29/744
摘要： This GTO thyristor comprises: (i) a cathode layer that is divided into a large number of cathode-layer fingers, (ii) a gate layer contiguous with the fingers, with a PN junction J1 between each finger and the gate layer, (iii) a cathode electrode on each finger, and (iv) a gate electrode on the gate layer having portions surrounding the fingers disposed in spaced relation to the fingers. Turn-off of the GTO thyristor is effected by forcing a turn-off current to flow between the cathode electrode of each finger and the gate electrode through the associated PN junction J1. This PN junction at each finger has a centrally-located region that is characterized by an avalanche voltage that is substantially lower than the avalanche voltage that characterizes this junction in the region of the junction surrounding the centrally-located region, and this relatively lower avalanche voltage enhances the current turn-off capabilities of the GTO thyristor.
摘要翻译：该GTO晶闸管包括：（i）分为大量阴极层指状物的阴极层，（ii）与指状物相邻的栅极层，每个指状物和栅极层之间具有PN结J1，（iii ）每个指状物上的阴极电极，以及（iv）栅极层上的栅极电极，其具有围绕指状物的部分，与手指间隔开设置。 GTO晶闸管的关断是通过强制关断电流通过相关联的PN结J1在每个指状物的阴极和栅电极之间流动来实现的。每个手指处的PN结具有中心定位的区域，其特征在于雪崩电压基本上低于在围绕中心定位区域的结的区域中表征该结的雪崩电压，并且该相对较低的雪崩电压提高GTO晶闸管的电流关断能力。

35. 发明授权

US4951109A Turn-off power semiconductor component 失效
标题翻译：关断功率半导体元件
公开(公告)号：US4951109A
公开(公告)日：1990-08-21
申请号：US165874
申请日：1988-03-09
申请人： Martin Bechteler , Wolfgang Gross
发明人： Martin Bechteler , Wolfgang Gross
IPC分类号： H01L29/861 , H01L21/331 , H01L29/10 , H01L29/36 , H01L29/73 , H01L29/744
CPC分类号： H01L29/744 , H01L29/102 , H01L29/36
摘要： Conventional turnoff power semiconductor devices each comprise a p-n junction blocking in case of turnoff, one zone of which, lying at the p-n junction, has a high doping gradient. But this produces a low dynamic voltage stability characteristic for the power semiconductor device. To increase the dynamic voltage stability characteristic of the power semiconductor device, it is proposed to provide one zone in the form of a region having at least a width of twenty microns viewed from the p-n junction, wherein a maximum doping gradient dN.sub.2 /dx=5.times.10.sup.16 cm.sup.-4 and a predetermined basic dopant concentration is present.
摘要翻译：传统的关断功率半导体器件在断开的情况下各自包括p-n结阻塞，其中一个区位于p-n结处具有高掺杂梯度。但这为功率半导体器件产生低动态电压稳定特性。为了增加功率半导体器件的动态电压稳定特性，建议从pn结看到具有至少二十微米宽的区域形式的一个区域，其中最大掺杂梯度dN2 / dx = 5×1016 cm-4，并且存在预定的基本掺杂剂浓度。

36. 发明授权

US4866315A Turn-on/off driving technique for insulated gate thyristor 失效
标题翻译：绝缘栅极晶闸管的开/关驱动技术
公开(公告)号：US4866315A
公开(公告)日：1989-09-12
申请号：US161095
申请日：1988-02-26
申请人： Tsuneo Ogura , Akio Nakagawa
发明人： Tsuneo Ogura , Akio Nakagawa
IPC分类号： H01L29/08 , H01L29/10 , H01L29/744 , H01L29/749 , H03K17/732
CPC分类号： H01L29/102 , H01L29/0834 , H01L29/744 , H01L29/749 , H03K17/732
摘要： A turn-on/off driving technique for an insulated gate thyristor which has a first gate electrode insulatively provided above a first base layer and functioning as a gate of MOSFET, and a second gate electrode formed on the second base layer. To drive the turn-on of the thyristor, a first voltage for rendering the MOSFET conductive is applied to the first gate electrode, while substantially simultaneously a second voltage for producing forward biasing between the second base layer and a second emitter layer is applied to the second gate electrode. To turn-off drive the thyristor, a third voltage for reverse biasing between the second emitter layer and the second base layer to stop the operation of the thyristor is applied to the second gate, while the MOSFET is kept conductive. The thyristor starts turning off in response to the voltage application. At this time, charge carriers exhausted from the second emitter layer are allowed to flow into the first base layer through the channel region of the MOSFET, thereby suppressing the local concentration of the turn-off current in the thyristor.

37. 发明授权

US4821083A Thyristor drive system 失效
标题翻译：晶闸管驱动系统
公开(公告)号：US4821083A
公开(公告)日：1989-04-11
申请号：US101790
申请日：1987-09-28
申请人： Tsuneo Ogura , Katsuhiko Takigami , Akio Nakagawa , Tomokazu Domon
发明人： Tsuneo Ogura , Katsuhiko Takigami , Akio Nakagawa , Tomokazu Domon
IPC分类号： H01L29/08 , H01L29/744 , H03K17/00 , H03K17/732
CPC分类号： H01L29/0834 , H01L29/744 , H03K17/732 , H03K2217/0036
摘要： A gate turn-off thyristor drive system with low power loss when it is in the turn-off mode, is disclosed. A first turn-off pulse of a predetermined amplitude is applied to a first gate electrode. A second turn-off pulse is applied to a second gate electrode. An amplitude of the second turn-off pulse is smaller in absolute value than that of the first turn-off pulse. The fall time of the anode current at the time of turn-off is reduced, and the initial value of the tail current of the anode current is reduced. The power loss as the product of the anode voltage and the anode current is reduced.
摘要翻译：公开了一种在关闭模式时具有低功率损耗的栅极截止晶闸管驱动系统。将预定幅度的第一关断脉冲施加到第一栅电极。第二截止脉冲被施加到第二栅电极。第二截止脉冲的幅度的绝对值小于第一截止脉冲的幅度。在关断时的阳极电流的下降时间减少，阳极电流的尾电流的初始值减小。作为阳极电压和阳极电流的乘积的功率损耗减小。

38. 发明授权

US4743950A Thyristor with switchable emitter short circuit 失效
标题翻译：晶闸管可切换发射极短路
公开(公告)号：US4743950A
公开(公告)日：1988-05-10
申请号：US940921
申请日：1986-12-12
申请人： Peter Roggwiller
发明人： Peter Roggwiller
IPC分类号： H01L29/08 , H01L29/74 , H01L29/06
CPC分类号： H01L29/0839 , H01L29/7404 , H01L29/744 , H01L29/0649
摘要： In thyristor having disconnectable emitter short circuits provided by means of monolithically integrated transistor structure, wherein a simplified production and improved control of the short circuits is achieved by the fact that a bipolar structure is integrated as the transistor structure into the component. In a preferred illustrative embodiment, the n.sup.+ -type emitter layer of the thyristor is interrupted by intermediate spaces in which the transistor structure is in each case disposed.
摘要翻译：在具有通过单片集成晶体管结构提供的可断开的发射极短路的晶闸管中，其中通过将双极结构作为晶体管结构集成到部件中而实现短路的简化生产和改进的控制。在优选的说明性实施例中，晶闸管的n +型发射极层被中间空间中断，其中晶体管结构在每种情况下都被布置。

39. 发明授权

US4713679A Reverse blocking type semiconductor device 失效
标题翻译：反向阻挡型半导体器件
公开(公告)号：US4713679A
公开(公告)日：1987-12-15
申请号：US787116
申请日：1985-10-15
申请人： Yoshio Terasawa , Saburo Oikawa
发明人： Yoshio Terasawa , Saburo Oikawa
IPC分类号： H01L29/06 , H01L29/08 , H01L29/36 , H01L29/744 , H01L29/74 , H01L29/80
CPC分类号： H01L29/744 , H01L29/0688 , H01L29/0834 , H01L29/36
摘要： A reverse blocking type semiconductor device capable of being rapidly turned off is disclosed in which a semiconductor substrate includes four semiconductor layers in a region sandwiched between a pair of principal surfaces in such a manner that adjacent ones of these layers are different in conductivity type from each other, one outermost layer of the layers is surrounded by the layer adjacent to the one outermost layer, the one outermost layer and the layer adjacent thereto are exposed to one principal surface, a cathode electrode kept in low-resistance contact with one outermost layer, a gate electrode is kept in low-resistance contact with the layer adjacent to the one outermost layer and lies in close proximity to the one outermost layer, an anode electrode is kept in low-resistance contact with the other outermost layer at the other principal surface, and a main operating region of the other outermost layer has an impurity concentration gradient in a direction parallel to the anode electrode.
摘要翻译：公开了一种能够快速关闭的反向阻挡型半导体器件，其中半导体衬底在夹在一对主表面之间的区域中包括四个半导体层，使得这些层中的相邻层之间的导电类型不同于每个另一方面，层的一个最外层被邻近一个最外层的层包围，一个最外层和与其相邻的层暴露于一个主表面，与一个最外层保持低电阻接触的阴极电极，栅电极与邻近一个最外层的层保持低电阻接触，并且位于一个最外层附近，阳极电极与另一个主表面处的另一个最外层保持低电阻接触，另一个最外层的主工作区域在与ano平行的方向上具有杂质浓度梯度电极。

40. 发明授权

US4682198A Gate turn-off thyristor with integral capacitive anode 失效
标题翻译：具有集成电容性阳极的栅极截止晶闸管
公开(公告)号：US4682198A
公开(公告)日：1987-07-21
申请号：US709139
申请日：1985-03-07
申请人： Shuroku Sakurada , Yasuhiko Ikeda
发明人： Shuroku Sakurada , Yasuhiko Ikeda
IPC分类号： H01L29/74 , H01L29/06 , H01L29/08 , H01L29/36 , H01L29/744
CPC分类号： H01L29/0661 , H01L29/0834 , H01L29/36 , H01L29/744
摘要： A gate turn-off thyristor is provided having a semiconductor substrate, an anode electrode, a cathode electrode and a gate electrode. The semiconductor substrate includes a P emitter layer connected to the anode electrode, an N base layer adjacent to the P emitter layer, a P base layer adjacent to the N base layer and connected to a gate electrode, and an N emitter layer adjacent to the P base layer and connected to the cathode electrode. In order to improve in its current cut-off performance, the semiconductor substrate further includes a P-type layer provided between the P emitter layer and the N base layer and having the impurity concentration lower than that of the N base layer.
摘要翻译：提供了具有半导体衬底，阳极电极，阴极电极和栅电极的栅极截止晶闸管。半导体衬底包括连接到阳极电极的P发射极层，与P发射极层相邻的N基极层，与N基极层相邻并连接到栅电极的P基极层和与发射极层相邻的N发射极层 P基极层并连接到阴极电极。为了提高其截止性能，半导体衬底还包括设置在P发射极层和N基极层之间并且杂质浓度低于N基极层的P型层的P型层。

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