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31. 发明申请

US20150280013A1 TRANSISTOR AND SEMICONDUCTOR DEVICE 有权
标题翻译：晶体管和半导体器件
公开(公告)号：US20150280013A1
公开(公告)日：2015-10-01
申请号：US14669459
申请日：2015-03-26
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei YAMAZAKI , Masayuki SAKAKURA
IPC分类号： H01L29/786 , H01L29/04 , H01L29/10 , H01L27/092
CPC分类号： H01L29/78693 , H01L21/823807 , H01L27/0688 , H01L27/092 , H01L27/1225 , H01L29/045 , H01L29/105 , H01L29/41733 , H01L29/42384 , H01L29/78648 , H01L29/78696 , H01L2029/42388
摘要： A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor.
摘要翻译：可以提供具有小寄生电容的晶体管。可以提供具有高频特性的晶体管。可以提供包括晶体管的半导体器件。提供了包括氧化物半导体，第一导体，第二导体，第三导体，第一绝缘体和第二绝缘体的晶体管。第一导体具有第一区域，其中第一导体与氧化物半导体重叠，第一绝缘体位于它们之间; 第二区域，其中第一导体与第二导体重叠，其中第一和第二绝缘体位于它们之间; 以及第一导体与第三导体重叠的第三区域，其中第一和第二绝缘体位于它们之间。氧化物半导体包括氧化物半导体与第二导体接触的第四区域; 以及氧化物半导体与第三导体接触的第五区域。

32. 发明申请

US20150187956A1 IGZO Devices with Increased Drive Current and Methods for Forming the Same 审中-公开
标题翻译：具有增加驱动电流的IGZO器件及其形成方法
公开(公告)号：US20150187956A1
公开(公告)日：2015-07-02
申请号：US14140777
申请日：2013-12-26
申请人： Intermolecular Inc.
发明人： Khaled Ahmed
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/78609 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L2029/42388
摘要： Embodiments described herein provide indium-gallium-zinc oxide (IGZO) devices, such as IGZO thin-film transistors (TFTs), and methods for forming such devices. A substrate is provided. A gate electrode is formed above the substrate. A gate dielectric layer is formed above the gate electrode. The gate dielectric layer includes titanium. An interface layer is formed above the gate dielectric layer. The interface layer includes silicon. An IGZO channel layer is formed above the interface layer. A source electrode and a drain electrode are formed above the IGZO channel layer.
摘要翻译：本文所述的实施例提供诸如IGZO薄膜晶体管（TFT）的铟镓锌氧化物（IGZO）器件，以及用于形成这种器件的方法。提供基板。在基板上方形成栅电极。栅极电介质层形成在栅电极上。栅介电层包括钛。界面层形成在栅介电层上。界面层包括硅。在界面层的上方形成IGZO沟道层。源电极和漏极形成在IGZO沟道层上方。

33. 发明申请

US20150170906A1 POLYMER ON GRAPHENE 有权
标题翻译：石墨聚合物
公开(公告)号：US20150170906A1
公开(公告)日：2015-06-18
申请号：US14554000
申请日：2014-11-25
申请人： NUtech Ventures
发明人： Jody G. Redepenning , Alexander Sinitskii , Benjamin Wymore
IPC分类号： H01L21/02 , H01L29/786 , H01L29/51 , H01L29/24 , H01L29/66 , H01L29/16
CPC分类号： H01L29/51 , H01L21/02118 , H01L21/02282 , H01L21/02425 , H01L21/02527 , H01L21/0262 , H01L21/044 , H01L29/1606 , H01L29/42364 , H01L29/4908 , H01L29/66045 , H01L29/66742 , H01L29/78684 , H01L29/78696 , H01L2029/42388
摘要： A top-gated graphene field effect transistor can be fabricated by forming a layer of graphene on a substrate, and applying an electrochemical deposition process to deposit a layer of dielectric polymer on the graphene layer. An electric potential between the graphene layer and a reference electrode is cycled between a lower potential and a higher potential. A top gate is formed above the polymer.
摘要翻译：顶盖石墨烯场效应晶体管可以通过在衬底上形成一层石墨烯并施加电化学沉积工艺以在石墨烯层上沉积介电聚合物层来制造。石墨烯层和参考电极之间的电位在较低电位和较高电位之间循环。在聚合物上形成顶栅。

34. 发明申请

US20150008437A1 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20150008437A1
公开(公告)日：2015-01-08
申请号：US14495835
申请日：2014-09-24
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Yeon Taek JEONG , Bo Sung KIM , Doo-Hyoung LEE , June Whan CHOI , Tae-Young CHOI , Kano MASATAKA
IPC分类号： H01L29/423 , H01L29/51 , H01L29/49 , H01L29/786
CPC分类号： H01L29/42384 , H01L29/4908 , H01L29/51 , H01L29/512 , H01L29/786 , H01L2029/42388
摘要： A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
摘要翻译：提供薄膜晶体管。根据本发明的示例性实施例的薄膜晶体管包括：基板; 栅极线，设置在所述基板上并且包括栅电极; 半导体层，设置在所述基板上，并且至少包括与所述栅电极重叠的部分; 设置在所述栅极线和所述半导体层之间的栅极绝缘层; 以及设置在所述基板上并且在所述半导体层的沟道区域上彼此面对的源电极和漏电极。栅极绝缘层包括第一区域和第二区域，第一区域对应于半导体层的沟道区域，第一区域由第一材料制成，第二区域由第二材料制成，第一材料并且第二材料具有不同的碳和硅原子数比。

35. 发明申请

US20140346603A1 TRANSISTOR DEVICES HAVING AN ANTI-FUSE CONFIGURATION AND METHODS OF FORMING THE SAME 有权
标题翻译：具有防熔丝配置的晶体管器件及其形成方法
公开(公告)号：US20140346603A1
公开(公告)日：2014-11-27
申请号：US13899150
申请日：2013-05-21
申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.
发明人： Eng Huat Toh , Shyue Seng Tan , Elgin Quek
IPC分类号： H01L29/423 , H01L27/112
CPC分类号： H01L29/42364 , G11C17/16 , H01L21/8221 , H01L23/5252 , H01L27/0688 , H01L27/10826 , H01L27/10879 , H01L27/11206 , H01L27/1203 , H01L29/66795 , H01L29/785 , H01L2029/42388 , H01L2924/0002 , H01L2924/00
摘要： Transistor devices having an anti-fuse configuration and methods of forming the transistor devices are provided. An exemplary transistor device includes a semiconductor substrate including a first fin. A first insulator layer overlies the semiconductor substrate and has a thickness less than a height of the first fin. The first fin extends through and protrudes beyond the first insulator layer to provide a buried fin portion and an exposed fin portion. A gate electrode structure overlies the exposed fin portion. A gate insulating structure is disposed between the first fin and the gate electrode structure. The gate insulating structure includes a first dielectric layer overlying a first surface of the first fin. The gate insulating structure further includes a second dielectric layer overlying a second surface of the first fin. A potential breakdown path is defined between the first fin and the gate electrode structure through the first dielectric layer.
摘要翻译：提供具有反熔丝配置的晶体管器件和形成晶体管器件的方法。示例性晶体管器件包括包括第一鳍片的半导体衬底。第一绝缘体层覆盖半导体衬底并且具有小于第一鳍片的高度的厚度。第一鳍延伸穿过第一绝缘体层并突出超过第一绝缘体层以提供掩埋鳍部分和暴露的鳍部分。栅电极结构覆盖在暴露的鳍部上。栅绝缘结构设置在第一鳍和栅电极结构之间。栅极绝缘结构包括覆盖第一鳍片的第一表面的第一介电层。栅极绝缘结构还包括覆盖第一鳍片的第二表面的第二介电层。通过第一介电层在第一鳍片和栅极电极结构之间限定电势击穿路径。

36. 发明授权

US08872179B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08872179B2
公开(公告)日：2014-10-28
申请号：US13687461
申请日：2012-11-28
申请人： Semiconductor Energy Labortory Co., Ltd.
发明人： Masashi Tsubuku
IPC分类号： H01L29/04 , H01L31/20 , H01L31/036 , H01L31/0376 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/1033 , H01L29/42384 , H01L29/78693 , H01L2029/42388
摘要： To improve switching characteristics of a transistor in which a channel is formed in an oxide semiconductor layer. A parasitic channel is formed at an end portion of the oxide semiconductor layer because a source and a drain of the transistor are electrically connected to the end portion. That is, when at least one of the source and the drain of the transistor is not electrically connected to the end portion, the parasitic channel is not formed at the end portion. In view of this, a transistor having a structure in which at least one of a source and a drain of the transistor is not or less likely to be electrically connected to an end portion of an oxide semiconductor layer is provided.
摘要翻译：为了改善在氧化物半导体层中形成沟道的晶体管的开关特性。由于晶体管的源极和漏极电连接到端部，所以在氧化物半导体层的端部形成寄生沟道。也就是说，当晶体管的源极和漏极中的至少一个没有电连接到端部时，在端部处不形成寄生沟道。鉴于此，提供一种晶体管，其晶体管的源极和漏极中的至少一个不或多或少可能电连接到氧化物半导体层的端部。

37. 发明申请

US20140299860A1 METHOD OF MANUFACTURING THIN FILM TRANSISTOR,THIN FILM TRANSISTOR MANUFACTURED BY USING THE METHOD, METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY APPARATUS, AND ORGANIC LIGHT-EMITTING DISPLAY APPARATUS MANUFACTURED BY USING THE METHOD 审中-公开
标题翻译：制造薄膜晶体管的方法，使用该方法制造的薄膜晶体管，制造有机发光显示装置的方法和使用该方法制造的有机发光显示装置
公开(公告)号：US20140299860A1
公开(公告)日：2014-10-09
申请号：US14307980
申请日：2014-06-18
申请人： Samsung Display Co., Ltd.
发明人： Byoung-Keon Park , Jong-Ryuk Park , Dong-Hyun Lee , Jin-Wook Seo , Ki-Yong Lee
IPC分类号： H01L27/32
CPC分类号： H01L27/3244 , H01L27/1288 , H01L27/3258 , H01L27/3262 , H01L29/0657 , H01L29/0847 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78606 , H01L29/78675 , H01L29/78696 , H01L2029/42388
摘要： A method of manufacturing a thin film transistor (TFT) comprises forming a buffer layer, an amorphous silicon layer, and an insulating layer on a substrate; crystallizing the amorphous silicon layer as a polycrystalline silicon layer; forming a semiconductor layer and a gate insulating layer which have a predetermined shape by simultaneously patterning the polycrystalline silicon layer and the insulating layer; forming a gate electrode including a first portion and a second portion by forming and patterning a metal layer on the gate insulating layer. The first portion is formed on the gate insulating layer and overlaps a channel region of a semiconductor layer, and the second portion contacts the semiconductor layer. A source region and a drain region are formed on the semiconductor layer by doping a region of the semiconductor layer. The region excludes the channel region overlapping the gate electrode and constitutes a region which does not overlap the gate electrode. An interlayer insulating layer is formed on the gate electrode so as to cover the gate insulating layer; contact holes are formed on the interlayer insulating layer and the gate insulating layer so as to expose the source region and the drain region, and simultaneously an opening for exposing the second portion is formed. A source electrode and a drain electrode are formed by patterning a conductive layer on the interlayer insulating layer. The source electrode and the drain electrode are electrically connected to the source region and the drain region via the contact holes, and simultaneously the second portion exposed via the opening is removed.
摘要翻译：制造薄膜晶体管（TFT）的方法包括在基板上形成缓冲层，非晶硅层和绝缘层; 使非晶硅层结晶为多晶硅层; 通过同时构图多晶硅层和绝缘层来形成具有预定形状的半导体层和栅极绝缘层; 通过在栅极绝缘层上形成和图案化金属层，形成包括第一部分和第二部分的栅电极。第一部分形成在栅极绝缘层上并且与半导体层的沟道区重叠，并且第二部分接触半导体层。通过掺杂半导体层的区域，在半导体层上形成源极区和漏极区。该区域排除与栅电极重叠的沟道区域，并构成不与栅电极重叠的区域。在栅电极上形成层间绝缘层，以覆盖栅极绝缘层; 在层间绝缘层和栅极绝缘层上形成接触孔，露出源极区域和漏极区域，同时形成露出第二部分的开口部。源电极和漏电极通过在层间绝缘层上图案化导电层而形成。源电极和漏电极经由接触孔电连接到源极区域和漏极区域，同时去除经由开口露出的第二部分。

38. 发明申请

US20130302939A1 MANUFACTURING METHOD OF TFT ARRAY SUBSTRATE 有权
标题翻译： TFT阵列基板的制造方法
公开(公告)号：US20130302939A1
公开(公告)日：2013-11-14
申请号：US13980202
申请日：2012-12-10
申请人： Xiang Liu , Jianshe Xue
发明人： Xiang Liu , Jianshe Xue
IPC分类号： H01L29/66
CPC分类号： H01L29/66742 , H01L27/1225 , H01L27/1288 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78693 , H01L2029/42388
摘要： A manufacturing method of a TFT array substrate is provided. The method includes the following steps: respectively forming a metal oxide semiconductor layer (3), an etching barrier layer (4), a source electrode (7), a data line, a drain electrode (6), a pixel electrode (5), a gate insulating layer (8), a contact hole, a gate electrode (9) and a gate scanning line on a substrate (1) by patterning processes, wherein the metal oxide semiconductor layer (3) and the etching barrier layer (4) are formed by a same patterning process, and the source electrode (7), the drain electrode (6), the pixel electrode (5) and the data line are formed by another same patterning process.
摘要翻译：提供了TFT阵列基板的制造方法。该方法包括以下步骤：分别形成金属氧化物半导体层（3），蚀刻阻挡层（4），源电极（7），数据线，漏电极（6），像素电极（5），通过图案化工艺在衬底（1）上的栅极绝缘层（8），接触孔，栅电极（9）和栅极扫描线，其中金属氧化物半导体层（3）和蚀刻阻挡层（4））通过相同的构图工艺形成，源电极（7），漏电极（6），像素电极（5）和数据线由另一相同的图案化工艺形成。

39. 发明申请

US20130134422A1 TRANSISTOR AND SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20130134422A1
公开(公告)日：2013-05-30
申请号：US13687461
申请日：2012-11-28
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Tsubuku
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/1033 , H01L29/42384 , H01L29/78693 , H01L2029/42388
摘要： To improve switching characteristics of a transistor in which a channel is formed in an oxide semiconductor layer. A parasitic channel is formed at an end portion of the oxide semiconductor layer because a source and a drain of the transistor are electrically connected to the end portion. That is, when at least one of the source and the drain of the transistor is not electrically connected to the end portion, the parasitic channel is not formed at the end portion. In view of this, a transistor having a structure in which at least one of a source and a drain of the transistor is not or less likely to be electrically connected to an end portion of an oxide semiconductor layer is provided.

40. 发明申请

US20120313114A1 Method of manufacturing thin film transistor, thin film transistor manufactured by using the method, method of manufacturing organic light-emitting display apparatus, and organic light-emitting display apparatus manufactured by using the method 有权
标题翻译：制造薄膜晶体管的方法，使用该方法制造的薄膜晶体管，制造有机发光显示装置的方法和使用该方法制造的有机发光显示装置
公开(公告)号：US20120313114A1
公开(公告)日：2012-12-13
申请号：US13200383
申请日：2011-09-23
申请人： Byoung-Keon Park , Jong-Ryuk Park , Dong-Hyun Lee , Jin-Wook Seo , Ki-Yong Lee
发明人： Byoung-Keon Park , Jong-Ryuk Park , Dong-Hyun Lee , Jin-Wook Seo , Ki-Yong Lee
IPC分类号： H01L51/50 , H01L29/786 , H01L51/40 , H01L21/336
CPC分类号： H01L27/3244 , H01L27/1288 , H01L27/3258 , H01L27/3262 , H01L29/0657 , H01L29/0847 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78606 , H01L29/78675 , H01L29/78696 , H01L2029/42388
摘要： A method of manufacturing a thin film transistor (TFT), a TFT manufactured by the method, a method of manufacturing an organic light-emitting display apparatus that includes the TFT, a display including the TFT. By including a buffer layer below and an insulating layer above a silicon layer for the TFT, the silicon layer can be crystallized without being exposed to air, so that contamination can be prevented. Also, due to the overlying insulating layer, the silicon layer can be patterned without directly contacting photoresist. The result is a TFT with uniform and improved electrical characteristics, and an improved display apparatus.
摘要翻译：一种制造薄膜晶体管（TFT）的方法，通过该方法制造的TFT，制造包括TFT的有机发光显示装置的方法，包括TFT的显示器。通过在TFT的下方包含缓冲层和在硅层上方的绝缘层，硅层可以结晶而不暴露于空气，从而可以防止污染。此外，由于上覆绝缘层，可以将硅层图案化而不直接接触光致抗蚀剂。结果是具有均匀和改善的电特性的TFT和改进的显示装置。

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