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31. 发明授权

US07204924B2 Method and apparatus to deposit layers with uniform properties 有权
标题翻译：沉积具有均匀性质的层的方法和装置
公开(公告)号：US07204924B2
公开(公告)日：2007-04-17
申请号：US10744294
申请日：2003-12-22
申请人： Bulent M. Basol , Homayoun Talieh
发明人： Bulent M. Basol , Homayoun Talieh
IPC分类号： C25D5/00 , C25D5/50 , C25D5/22
CPC分类号： C25D5/22 , B23H5/06 , B24B37/26 , C25D5/02 , C25D5/06 , C25D7/123 , C25F7/00 , H01L21/2885 , H01L21/32125 , H01L21/76877
摘要： The present invention provides a method for forming a conductive film with uniform properties on a wafer surface that has features or cavities. During the process, the workpiece is rotated and laterally moved while an electrodeposition solution is delivered onto the wafer surface at a predetermined flow rate, and a potential difference is applied between the workpiece surface and the electrode. The workpiece is rotated about an axis at predetermined revolutions per minute so that an edge region of the workpiece has a first predetermined linear velocity due to the rotation. The workpiece has a second predetermined linear velocity due to the lateral motion. The second predetermined velocity may be larger than the first predetermined velocity. Further, the wafer may not be rotated.
摘要翻译：本发明提供一种在具有特征或空穴的晶片表面上形成具有均匀性质的导电膜的方法。在该过程中，工件被旋转并横向移动，同时电沉积溶液以预定流速输送到晶片表面上，并且在工件表面和电极之间施加电位差。工件以预定转数每分钟绕轴线旋转，使得工件的边缘区域由于旋转而具有第一预定的线速度。由于横向运动，工件具有第二预定的线速度。第二预定速度可以大于第一预定速度。此外，晶片可能不会旋转。

32. 发明授权

US07204743B2 Integrated circuit interconnect fabrication systems 有权
标题翻译：集成电路互连制造系统
公开(公告)号：US07204743B2
公开(公告)日：2007-04-17
申请号：US10703293
申请日：2003-11-07
申请人： Bulent M. Basol , Homayoun Talieh
发明人： Bulent M. Basol , Homayoun Talieh
IPC分类号： B24B7/22
CPC分类号： H01L21/7684 , B23H5/08 , H01L21/67219
摘要： A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure is disclosed. The system for processing comprises an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer on the front surface of the wafer, a chamber within the ECMPR module configured to remove conductive material from an edge region of the wafer, a CMP module configured to receive the wafer from the ECMPR module and polish the planarized conductive layer on the surface of the wafer to form the metallic interconnect structure, and a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module. In one aspect of the invention, the ECMPR module deposits conductive material on the front surface of the wafer. The ECMPR module removes at least a portion of the conductive layer from the front surface of the wafer. Advantages of the invention include improved control of deposited metal to improve device consistency and yield.
摘要翻译：公开了一种用于处理晶片前表面上的导电表面以形成金属互连结构的系统。用于处理的系统包括电化学机械处理（ECMPR）模块，其被配置为在晶片的前表面上形成基本平坦化的导电层，ECMPR模块内的腔室被配置为从晶片的边缘区域去除导电材料，CMP 模块，被配置为从ECMPR模块接收晶片并抛光晶片表面上的平坦化导电层以形成金属互连结构，以及被配置为将晶片从ECMPR模块传送到化学机械抛光（CMP）模块的机器人。在本发明的一个方面，ECMPR模块将导电材料沉积在晶片的前表面上。 ECMPR模块从晶片的前表面去除导电层的至少一部分。本发明的优点包括改善沉积金属的控制以提高器件的一致性和产率。

33. 发明授权

US07097538B2 Advanced chemical mechanical polishing system with smart endpoint detection 有权
公开(公告)号：US07097538B2
公开(公告)日：2006-08-29
申请号：US10817784
申请日：2004-04-02
申请人： Homayoun Talieh , Bulent M. Basol
发明人： Homayoun Talieh , Bulent M. Basol
IPC分类号： B24B49/00
CPC分类号： B24B37/013 , B24B21/04 , B24B21/08 , B24B37/04 , B24B37/205 , B24B47/04 , B24B49/10 , B24B49/12 , B24B49/16
摘要： The methods and systems described provide for an in-situ endpoint detection for material removal processes such as chemical mechanical polishing (CMP) performed on a workpiece. In a preferred embodiment, an optical detection system is used to detect endpoint during the removal of planar conductive layers using CMP. An optically transparent polishing belt provides endpoint detection through any spot on the polishing belt. Once endpoint is detected, a signal can be used to terminate or alter a CMP process that has been previously initiated.

34. 发明授权

US06942780B2 Method and apparatus for processing a substrate with minimal edge exclusion 有权
标题翻译：用于处理具有最小边缘排除的基板的方法和装置
公开(公告)号：US06942780B2
公开(公告)日：2005-09-13
申请号：US10460032
申请日：2003-06-11
申请人： Bulent M. Basol , Cyprian Uzoh , Homayoun Talieh
发明人： Bulent M. Basol , Cyprian Uzoh , Homayoun Talieh
IPC分类号： C25D7/12 , C25D17/00 , C25D17/08 , C25D21/00 , H01L21/288 , H01L21/321 , H01L21/768 , C25D5/00 , C25D5/08 , C25F3/00
CPC分类号： C25D5/02 , C25D7/123 , C25D17/001 , H01L21/2885 , H01L21/3212 , H01L21/76877
摘要： An apparatus for processing a material on a wafer surface includes a cavity defined by a peripheral wall and configured to direct a process solution and direct it to the surface to to a first wafer surface region without being directed to a second wafer surface region, a head configured to hold the wafer so that the surface of the wafer faces the cavity, and an electrical contact member positioned outside the cavity peripheral wall and configured to contact the second wafer surface region extending beyond the cavity, when the wafer is moved relative to the contact member. Advantages of the invention include substantially full surface treatment of the wafer.
摘要翻译：用于处理晶片表面上的材料的设备包括由周壁限定的空腔，并且被配置为引导处理溶液并将其引导到表面到达第一晶片表面区域而不被引导到第二晶片表面区域，头部被配置为保持所述晶片使得所述晶片的表面面向所述空腔;以及电接触构件，其定位在所述腔周壁外部并且被配置为当所述晶片相对于所述触点移动时接触延伸超过所述腔的所述第二晶片表面区域会员。本发明的优点包括晶片的基本全表面处理。

35. 发明授权

US06861354B2 Method and structure to reduce defects in integrated circuits and substrates 失效
标题翻译：降低集成电路和基板缺陷的方法和结构
公开(公告)号：US06861354B2
公开(公告)日：2005-03-01
申请号：US10358565
申请日：2003-02-04
申请人： Cyprian E. Uzoh , Homayoun Talieh , Bulent M. Basol
发明人： Cyprian E. Uzoh , Homayoun Talieh , Bulent M. Basol
IPC分类号： H01L21/288 , H01L21/768 , H01L23/532 , H01L21/4763
CPC分类号： H01L21/76843 , H01L21/2885 , H01L21/7684 , H01L21/76864 , H01L21/76873 , H01L21/76877 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： A method for forming conductor structures on a semiconductor wafer is provided. The method begins with depositing a seed layer having a substantially consistent thickness over a barrier layer that covers the features and the field regions among them. The process continues with electrodepositing a planar copper layer on the seed layer and subsequently electroetching it until a thinned seed layer remains over the field regions. When another layer of planar copper is deposited on the remaining copper in the features and on the thinned seed layer on the field regions, this structure minimizes stress related defects in the features which occur during a following anneal process.
摘要翻译：提供了一种在半导体晶片上形成导体结构的方法。该方法开始于在覆盖其中的特征和场区域的阻挡层上沉积具有基本上一致的厚度的种子层。该过程继续在种子层上电沉积平面铜层，随后电蚀，直到变薄的种子层保留在场区域上。当另一层平面铜沉积在特征中的剩余铜上以及在场区上的薄化种子层上时，该结构使得在随后的退火过程中发生的特征中的应力相关缺陷最小化。

36. 发明授权

US06777338B2 Edge and bevel cleaning process and system 有权
标题翻译：边缘和斜面清洁过程和系统
公开(公告)号：US06777338B2
公开(公告)日：2004-08-17
申请号：US10051755
申请日：2002-01-15
申请人： Jalal Ashjaee , Rimma Volodarsky , Cyprian E. Uzoh , Bulent M. Basol , Homayoun Talieh
发明人： Jalal Ashjaee , Rimma Volodarsky , Cyprian E. Uzoh , Bulent M. Basol , Homayoun Talieh
IPC分类号： H01L21461
CPC分类号： H01L21/6708 , H01L21/2885 , H01L21/32134
摘要： The present invention provides at least one nozzle that sprays a rotating workpiece with an etchant at an edge thereof. The at least one nozzle is located in an upper chamber of a vertically configured processing subsystem that also includes mechanisms for plating, cleaning and drying in upper and lower chambers.
摘要翻译：本发明提供了至少一个喷嘴，其在其边缘处用蚀刻剂喷射旋转的工件。至少一个喷嘴位于垂直配置的处理子系统的上部室中，其还包括用于上部和下部室中的电镀，清洁和干燥的机构。

37. 发明授权

US06722946B2 Advanced chemical mechanical polishing system with smart endpoint detection 失效
标题翻译：先进的化学机械抛光系统，智能端点检测
公开(公告)号：US06722946B2
公开(公告)日：2004-04-20
申请号：US10197090
申请日：2002-07-15
申请人： Homayoun Talieh , Bulent M. Basol
发明人： Homayoun Talieh , Bulent M. Basol
IPC分类号： B24B4900
CPC分类号： B24B37/013 , B24B21/04 , B24B21/08 , B24B37/04 , B24B37/205 , B24B47/04 , B24B49/10 , B24B49/12 , B24B49/16
摘要： The methods and systems described provide for an in-situ endpoint detection for material removal processes such as chemical mechanical polishing (CMP) performed on a workpiece. In a preferred embodiment, an optical detection system is used to detect endpoint during the removal of planar conductive layers using CMP. An optically transparent polishing belt provides endpoint detection through any spot on the polishing belt. Once endpoint is detected, a signal can be used to terminate or alter a CMP process that has been previously initiated.
摘要翻译：所描述的方法和系统提供用于材料去除过程（例如在工件上进行的化学机械抛光（CMP））的原位端点检测。在优选实施例中，使用光学检测系统来检测使用CMP去除平面导电层期间的端点。光学透明的抛光带通过抛光带上的任何点提供端点检测。一旦检测到端点，就可以使用信号来终止或改变先前已经启动的CMP过程。

38. 发明授权

US07329335B2 Device providing electrical contact to the surface of a semiconductor workpiece during processing 有权
标题翻译：在处理过程中提供与半导体工件的表面的电接触的装置
公开(公告)号：US07329335B2
公开(公告)日：2008-02-12
申请号：US10459323
申请日：2003-06-10
申请人： Homayoun Talieh , Cyprian Uzoh , Bulent M. Basol
发明人： Homayoun Talieh , Cyprian Uzoh , Bulent M. Basol
IPC分类号： B23H3/00 , C25F3/30 , B23H7/12
CPC分类号： B23H3/04 , B23H5/08 , C25D5/08 , C25D17/00 , C25D17/001 , C25D17/005 , C25F7/00 , H01L21/2885
摘要： Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.
摘要翻译：可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

39. 发明授权

US07257893B2 Efficient wafer processing technology 有权
标题翻译：高效的晶片加工技术
公开(公告)号：US07257893B2
公开(公告)日：2007-08-21
申请号：US11447368
申请日：2006-06-05
申请人： Hung-Ming Wang , Bulent M. Basol , Homayoun Talieh
发明人： Hung-Ming Wang , Bulent M. Basol , Homayoun Talieh
IPC分类号： H01K3/10
CPC分类号： H01L21/76877 , H01L21/2885 , H01L21/7684 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： Consistent excess conductive material is provided for plated conductors in integrated circuit metallization, regardless of the size and depth of trenches/vias into which the conductive material is deposited. Accordingly, subsequent processing (e.g., material removal) can be consistent and efficient for wafers with different feature sizes (particularly different depths), and for wafers at different metallization levels.
摘要翻译：为集成电路金属化中的电镀导体提供一致的过量导电材料，而不管沉积导电材料的沟槽/通孔的尺寸和深度。因此，对于具有不同特征尺寸（特别是不同深度）的晶片以及对于不同金属化水平的晶片，后续处理（例如，材料去除）可以是一致的和有效的。

40. 发明授权

US07250104B2 Method and system for optically enhanced metal planarization 有权
标题翻译：用于光学增强金属平面化的方法和系统
公开(公告)号：US07250104B2
公开(公告)日：2007-07-31
申请号：US10637731
申请日：2003-08-08
申请人： Cyprian E. Uzoh , Homayoun Talieh , Bulent M. Basol , Halit N. Yakupoglu
发明人： Cyprian E. Uzoh , Homayoun Talieh , Bulent M. Basol , Halit N. Yakupoglu
IPC分类号： C25F3/00
CPC分类号： H01L21/32125
摘要： The methods and systems described provide for radiation assisted material deposition, removal, and planarization at a surface, edge, and/or bevel of a workpiece such as a semiconductor wafer. Exemplary processes performed on a workpiece surface having topographical features include radiation assisted electrochemical material deposition, which produces an adsorbate layer outside of the features to suppress deposition outside of the features and to encourage, through charge conservation, deposition into the features to achieve, for example, a planar surface profile. A further exemplary process is radiation assisted electrochemical removal of material, which produces an adsorbate layer in the features to suppress removal of material from the features and to encourage, through charge conservation, removal of material outside of the features so that, for example, a planar surface profile is achieved.
摘要翻译：所描述的方法和系统提供了诸如半导体晶片的工件的表面，边缘和/或斜面处的辐射辅助材料沉积，去除和平坦化。在具有形貌特征的工件表面上执行的示例性工艺包括辐射辅助电化学材料沉积，其在特征之外产生吸附物层以抑制特征外的沉积，并且通过电荷保存沉积到特征中以实现例如，平面表面轮廓。进一步的示例性方法是材料的辐射辅助电化学去除，其在特征中产生吸附物层以抑制材料从特征中的去除并且通过电荷保持除去特征外的材料，从而例如，实现了平面表面轮廓。

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