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31. 发明授权

US06362033B1 Self-aligned LDD formation with one-step implantation for transistor formation 有权
标题翻译：用于晶体管形成的一步注入的自对准LDD形成
公开(公告)号：US06362033B1
公开(公告)日：2002-03-26
申请号：US09460318
申请日：1999-12-14
申请人： Heon Lee , Young-Jin Park
发明人： Heon Lee , Young-Jin Park
IPC分类号： H01L21338
CPC分类号： H01L29/66598 , H01L21/266 , H01L21/28035 , H01L21/28123 , H01L21/32137
摘要： A method for forming a transistor is formed where a gate electrode of the transistor is formed over a substrate defining a gate channel portion of the substrate. A mask is also formed over the substrate, a portion of the mask extending over a first portion of the substrate adjacent to the gate channel portion of the substrate. The mask defines a second portion of the substrate adjacent to the first portion of the substrate. An ion beam is directed toward the substrate to form a drain or a source region of said transistor adjacent to the gate channel portion of the substrate, the source or drain region including the first and second portions of the substrate. The ion beam implants the second portion of the substrate with a first implantation characteristic. The ion beam passes through the extended portion of the mask to reach the first portion to implant the first portion with a second implantation characteristic, such second implantation characteristic being different from the first implantation characteristic.
摘要翻译：形成晶体管的方法形成在晶体管的栅电极形成在限定衬底的栅极沟道部分的衬底上。掩模也形成在衬底上，掩模的一部分在与衬底的栅极沟道部分相邻的衬底的第一部分上延伸。掩模限定与基板的第一部分相邻的基板的第二部分。离子束指向衬底以形成与衬底的栅极沟道部分相邻的所述晶体管的漏极或源极区域，源极或漏极区域包括衬底的第一和第二部分。离子束以第一注入特性注入衬底的第二部分。离子束通过掩模的延伸部分到达第一部分以将第一部分注入第二注入特性，这种第二注入特性与第一注入特性不同。

32. 发明授权

US5296400A Method of manufacturing a contact of a highly integrated semiconductor device 失效
标题翻译：制造高度集成的半导体器件的接触的方法
公开(公告)号：US5296400A
公开(公告)日：1994-03-22
申请号：US989196
申请日：1992-12-11
申请人： Cheol-Soo Park , Yo-Hwan Koh , Jae-Beom Park , Young-Jin Park , Jin-Seong Oh
发明人： Cheol-Soo Park , Yo-Hwan Koh , Jae-Beom Park , Young-Jin Park , Jin-Seong Oh
IPC分类号： H01L21/285 , H01L21/768 , H01L21/8242 , H01L21/70
CPC分类号： H01L27/10873 , H01L21/28525 , H01L21/76897
摘要： When contacting a bit line and a charge storage electrode to a source/drain of the MOS transistor during a manufacturing process of a highly integrated semiconductor device, a contact pad is formed by filling up polysilicon into a contact hole that had been made using a self-align method in order not to damage the word line or the bit line as a result of a small processing margin during a contact hole forming process. Also, the occurrence of a topological difference during a semiconductor manufacturing process is minimized by forming an oxide layer such as SOG, BPSG, TEOS, and PECVD oxide over the top of the field oxide for a flattening effect.
摘要翻译：在高度集成的半导体器件的制造过程中，当将位线和电荷存储电极接触MOS晶体管的源极/漏极时，通过将多晶硅填充到使用自身制成的接触孔中来形成接触焊盘以在接触孔形成过程中由于处理余量小而不会损坏字线或位线的方法。此外，通过在场氧化物的顶部上形成诸如SOG，BPSG，TEOS和PECVD氧化物之类的氧化物层以实现平坦化效果，使半导体制造过程中的拓扑差异的发生最小化。

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