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31. 发明授权

US5848020A Semiconductor memory and method of using the same, column decoder, and image processor 失效
标题翻译：半导体存储器及其使用方法，列解码器和图像处理器
公开(公告)号：US5848020A
公开(公告)日：1998-12-08
申请号：US943418
申请日：1997-09-30
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C11/401 , G09G5/39 , G11C5/06 , G11C7/10 , G11C8/12 , G11C8/14 , G11C7/00
CPC分类号： G11C8/12 , G11C5/063 , G11C7/1033 , G11C7/1075 , G11C8/14 , G09G5/39
摘要： In a semiconductor memory for storing image data, memory cell blocks each containing a plurality of memory cells arranged in a column direction are formed such that the plurality of memory cells belonging to each of the memory cell blocks are connected with a sub word line. The above memory cell blocks are arranged in an array. There are installed a plurality of horizontal word lines and a plurality of diagonal word lines. By selecting one of the horizontal word lines, aL set of rectangular-region data of the image data is stored in the respective memory cells of the plurality of memory cell blocks placed in a given column direction. By selecting one of the diagonal word lines, sets of rectangular-region data placed in the same column are read out. Consequently, by selecting one of the horizontal word lines or one of the diagonal word lines, either or both of a set of rectangular-region data and one line of data on an image can be accessed at a high speed using a page mode cycle.
摘要翻译：在用于存储图像数据的半导体存储器中，形成每个包含以列方向布置的多个存储单元的存储单元块，使得属于每个存储单元块的多个存储单元与子字线连接。上述存储单元块被布置成阵列。安装有多个水平字线和多个对角线字线。通过选择一个水平字线，将一组图像数据的矩形区域数据存储在放置在给定列方向上的多个存储单元块的相应存储单元中。通过选择对角字线之一，读出放置在同一列中的矩形区域数据集。因此，通过选择一个水平字线或一个对角字线，可以使用页模式周期高速地访问一组矩形区域数据和图像上的一行数据中的一个或两个。

32. 发明授权

US5237102A Sulfone aldehydes useful for producing .beta.-carotene 失效
标题翻译：用于生产β-胡萝卜素的砜醛
公开(公告)号：US5237102A
公开(公告)日：1993-08-17
申请号：US937375
申请日：1992-08-31
申请人： Toshiki Mori , Hiroshi Fujii , Takashi Onishi , Kazuo Yamamoto
发明人： Toshiki Mori , Hiroshi Fujii , Takashi Onishi , Kazuo Yamamoto
IPC分类号： C07C317/10 , C07C317/24
CPC分类号： C07C403/24 , C07C403/22 , C07C2101/16 , Y02P20/55
摘要： Provided is a novel process for readily producing .beta.-carotene in which a sulfone compound represented by the general formula (1), (2) or (3) is reacted with an alkali, ##STR1## wherein R represents a phenyl group which may be substituted, R' a protecting group of acetal type and X a halogen atom.
摘要翻译：提供了一种容易生产β-胡萝卜素的新方法，其中通式（1），（2）或（3）表示的砜化合物与碱反应，（2）（3）其中R表示可被取代的苯基，R'为缩醛型保护基，X为卤素原子。

33. 发明授权

US5118833A Process for producing .alpha.-keto-carboxylic acid ester 失效
标题翻译：制备（ALPHA） - 羧酸 - 羧酸酯的方法
公开(公告)号：US5118833A
公开(公告)日：1992-06-02
申请号：US537647
申请日：1990-06-14
申请人： Toshiki Mori , Shigeaki Suzuki , Takashi Onishi , Kazuo Yamamoto
发明人： Toshiki Mori , Shigeaki Suzuki , Takashi Onishi , Kazuo Yamamoto
IPC分类号： B01J31/02 , C07B41/06 , C07B61/00 , C07C67/313 , C07C69/716 , C07C69/738
CPC分类号： C07C69/716 , C07C67/313 , C07C69/738
摘要： The invention provides a novel process for produing .alpha. -keto-carboxylic acid esters that are useful as intermediates for the preparation of pharmaceutical drugs in high yield by oxidizing .alpha. -hydroxycarbocylic acid esters with hypochlorous acid in the presence of nitroxy radical.

34. 发明授权

US4924030A Process for preparing cyclic terpenoids 失效
标题翻译：制备环状萜类化合物的方法
公开(公告)号：US4924030A
公开(公告)日：1990-05-08
申请号：US164909
申请日：1988-03-07
申请人： Takashi Onishi , Shigeaki Suzuki , Toshiki Mori , Yoshiji Fujita
发明人： Takashi Onishi , Shigeaki Suzuki , Toshiki Mori , Yoshiji Fujita
IPC分类号： C07C315/04 , C07B37/08 , C07C20060101 , C07C67/00 , C07C313/00 , C07C315/06 , C07C317/14
CPC分类号： C07C317/00
摘要： A present invention provides a process for preparing a mixture of cyclic terpenoids of general formula (I), ##STR1## wherein R is a hydrogen atom or a lower alkyl group, and general formula (II), ##STR2## wherein R is defined as above, containing (I) predominant over (II) by the reaction of an acid with a cyclic terpenoid of general formula (II), or a mixture of cyclic terpenoids of general formulas (I) and (II), containing (II) predominant over (I).

35. 发明授权

US4635292A Image processor 失效
标题翻译：图像处理器
公开(公告)号：US4635292A
公开(公告)日：1987-01-06
申请号：US682321
申请日：1984-12-17
申请人： Toshiki Mori , Haruyasu Yamada , Kenichi Hasegawa , Kunitoshi Aono
发明人： Toshiki Mori , Haruyasu Yamada , Kenichi Hasegawa , Kunitoshi Aono
IPC分类号： G06T5/20 , G06F9/28 , G06F15/66 , G06K9/36
CPC分类号： G06T5/20
摘要： This invention provides parallel partial image processing such as spatial convolution or non-linear neighbor arithmetic operation using an image processor which can easily be formed as a large-scale integrated circuit and can be used for various purposes. The image processor has an adder-subtractor, a multiplier, a reciprocal number memory in which the reciprocal of an address and the amount of shift are stored at each address, and a shift register. The processor therefore is capable of high-speed dividing operations by multiplying a multiplicant by the reciprocal of a multiplier and by shifting the result of the multiplication. Also, by switching the inputs to the adder-subtractor and to the multiplier rapidly under program control, it is possible to perform arbitrary addition, subtraction, multiplication and division on partial image data of m rows and n columns stored in a partial image memory of the image processor.
摘要翻译：本发明提供并行部分图像处理，例如使用可以容易地形成为大规模集成电路并可用于各种目的的图像处理器的空间卷积或非线性相邻算术运算。图像处理器具有加法器 - 减法器，乘法器，互易数存储器，其中地址的倒数和移位量存储在每个地址处，以及移位寄存器。因此，处理器能够通过将乘数乘以乘法器的倒数并通过移位乘法结果来进行高速分频操作。此外，通过在程序控制下将输入切换到加法器 - 减法器和乘法器，可以对存储在部分图像存储器中的m行和n列的部分图像数据执行任意加法，减法，乘法和除法图像处理器。

36. 发明授权

US09264745B2 Video server apparatus, video editing system, and control method of video server apparatus 有权
标题翻译：视频服务器设备，视频编辑系统以及视频服务器设备的控制方法
公开(公告)号：US09264745B2
公开(公告)日：2016-02-16
申请号：US13363105
申请日：2012-01-31
申请人： Naoko Satoh , Shuichi Yamaguchi , Toshiki Mori , Hiroyuki Watanabe , Hiroyuki Wada , Keita Kobayashi
发明人： Naoko Satoh , Shuichi Yamaguchi , Toshiki Mori , Hiroyuki Watanabe , Hiroyuki Wada , Keita Kobayashi
IPC分类号： H04N5/93 , H04N21/234 , H04N21/236 , H04N21/81 , H04N21/8352
CPC分类号： H04N21/23424 , H04N21/23608 , H04N21/814 , H04N21/8352
摘要： According to one embodiment, a video server apparatus includes a table generator, an acquisition module, and a controller. The table generator generates a management table associating a contents ID with the contents data, and stores the management table in the memory. The acquisition module acquires contents management information from a change request source upon generation of a change request for the contents data. The controller refers to the management table based on the contents ID included in the contents management information, executes change processing for the contents data recorded in the memory based on a reference result of the management table.
摘要翻译：根据一个实施例，视频服务器设备包括表生成器，采集模块和控制器。表生成器生成将内容ID与内容数据相关联的管理表，并将管理表存储在存储器中。生成对内容数据的变更请求时，获取模块从变更请求源获取内容管理信息。控制器基于包含在内容管理信息中的内容ID来引用管理表，基于管理表的参考结果对记录在存储器中的内容数据执行改变处理。

37. 发明授权

US07636263B2 Semiconductor memory having function to determine semiconductor low current 有权
标题翻译：具有确定半导体低电流功能的半导体存储器
公开(公告)号：US07636263B2
公开(公告)日：2009-12-22
申请号：US11905646
申请日：2007-10-03
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C16/04
CPC分类号： G11C29/02 , G11C16/04 , G11C29/025 , G11C2029/5006
摘要： A semiconductor memory, including word lines, bit lines, memory cells provided at intersections between the word lines and bit lines, and a sense amplifier for reading out what is stored in the memory cells, bit line selection means for selecting a bit line from among the bit lines; switch means for turning ON/OFF a current of the bit line selected by the bit line selection means; current generation means for generating a threshold current; means for extracting a differential current between the selected bit line current and the threshold current when a value of the selected bit line current is greater than that of the threshold current; voltage conversion means for converting the differential current to a voltage; and determination means for determining a magnitude relationship between the threshold current and the selected bit line current based on an output voltage from the voltage conversion means.
摘要翻译：一种半导体存储器，包括字线，位线，提供在字线和位线之间的交叉处的存储单元，以及用于读出存储在存储单元中的内容的读出放大器，位线选择装置，用于从位线用于接通/关闭由位线选择装置选择的位线的电流的开关装置; 用于产生阈值电流的电流产生装置; 用于当所选位线电流的值大于阈值电流的值时，提取所选位线电流与阈值电流之间的差分电流的装置; 电压转换装置，用于将差分电流转换成电压; 以及确定装置，用于基于来自电压转换装置的输出电压确定阈值电流与所选位线电流之间的大小关系。

38. 发明授权

US07480183B2 Semiconductor memory device, and read method and read circuit for the same 有权
标题翻译：半导体存储器件，以及读取方法和读取电路相同
公开(公告)号：US07480183B2
公开(公告)日：2009-01-20
申请号：US11783799
申请日：2007-04-12
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C11/34
CPC分类号： G11C16/24 , G11C16/28
摘要： In a semiconductor memory device operative to discharge residual charge in a read bit line in a read cycle, the bit line is in the reset state at all times except during read operation. The reset state of a bit line is canceled when selected and connected to a read circuit for read, and information stored in a selected memory cell is read via the selected bit line. Upon completion of the read of the memory cell, the selected bit line is disconnected from the read circuit and reset to thereby complete discharge of residual charge in the read bit line prior to read operation in the next cycle. This ensures that during read determination operation in the next read cycle, the potential of a selected bit line will not vary with the bit line residual discharge in the previous read cycle.
摘要翻译：在可读取周期中对读取位线中剩余电荷进行放电的半导体存储器件中，除了读取操作之外，位线始终处于复位状态。当选择并且连接到读取电路进行读取时，位线的复位状态被取消，并且通过所选择的位线读取存储在所选存储单元中的信息。在完成存储单元的读取之后，所选择的位线与读取电路断开连接并重置，从而在下一个周期的读取操作之前完成读取位线中的剩余电荷的放电。这确保了在下一个读取周期的读取确定操作期间，所选位线的电位将不会随先前读取周期中的位线残留放电而变化。

39. 发明授权

US07417898B2 Non-volatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US07417898B2
公开(公告)日：2008-08-26
申请号：US11436632
申请日：2006-05-19
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C11/34
CPC分类号： G11C16/28 , G11C11/5671 , G11C2211/5634
摘要： Charge is trapped into a charge trapping region of one of two reference cells so as to achieve a state equivalent to memory cell characteristics having a smallest amount of current. Charge is trapped into a charge trapping region of the other reference cell so as to achieve a state equivalent to memory cell characteristics having a largest amount of current. Currents output from these reference cells are averaged by a current averaging circuit, and the resultant average current is output as a reference current R_REF 1.
摘要翻译：电荷被捕获到两个参考单元之一的电荷捕获区域中，以达到等效于具有最小电流量的存储单元特性的状态。电荷被捕获到另一参考单元的电荷捕获区域中，以达到与具有最大电流量的存储单元特性相当的状态。通过电流平均电路对这些参考单元输出的电流进行平均，并将合成的平均电流作为参考电流R_REF1输出。

40. 发明申请

US20080170445A1 Semiconductor memory having function to determine semiconductor low current 有权
标题翻译：具有确定半导体低电流功能的半导体存储器
公开(公告)号：US20080170445A1
公开(公告)日：2008-07-17
申请号：US11905646
申请日：2007-10-03
申请人： Toshiki Mori
发明人： Toshiki Mori
IPC分类号： G11C29/50
CPC分类号： G11C29/02 , G11C16/04 , G11C29/025 , G11C2029/5006
摘要： A semiconductor memory, including a plurality of word lines, a plurality of bit lines, a plurality of memory cells provided at intersections between the plurality of word lines and the plurality of bit lines, and a sense amplifier for reading out what is stored in the memory cells, the semiconductor memory including: bit line selection means for selecting a bit line from among the plurality of bit lines; switch means for turning ON/OFF a current of the bit line selected by the bit line selection means; current generation means for generating a threshold current; means for extracting a differential current between the selected bit line current and the threshold current when a value of the selected bit line current is greater than that of the threshold current; voltage conversion means for converting the differential current to a voltage; and determination means for determining a magnitude relationship between the threshold current and the selected bit line current based on an output voltage from the voltage conversion means.
摘要翻译：一种半导体存储器，包括多个字线，多个位线，设置在多个字线和多个位线之间的交叉处的多个存储单元，以及读出放大器，用于读出存储在存储单元，所述半导体存储器包括：位线选择装置，用于从所述多个位线中选择位线; 用于接通/关闭由位线选择装置选择的位线的电流的开关装置; 用于产生阈值电流的电流产生装置; 用于当所选位线电流的值大于阈值电流的值时，提取所选位线电流与阈值电流之间的差分电流的装置; 电压转换装置，用于将差分电流转换成电压; 以及确定装置，用于基于来自电压转换装置的输出电压确定阈值电流与所选位线电流之间的大小关系。

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