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    • 32. 发明申请
    • Time-domain equalizer for discrete multi-tone based DSL systems with cyclic extension in training
    • 用于在训练中具有循环扩展的离散多音调DSL系统的时域均衡器
    • US20060153310A1
    • 2006-07-13
    • US11320918
    • 2005-12-30
    • Tai-Lai Tung
    • Tai-Lai Tung
    • H04K1/10
    • H04L25/03019H04L5/14H04L27/2607H04L2025/03414
    • The present invention provides for a method and system to implement time-domain equalizer (TEQ) training to shorten the channel impulse response of twisted copper lines for DMT-based VDSL systems. The coefficients of TEQ are trained when training signal has cyclic extension (CE), such as specified in current VDSL standard and proposed for VDSL2. The invention effects frame alignment and removal of CE to effectively permit implementation of TEQ training for VDSL where the training signal has cyclic extension. The advantage of this new invent is that Intersymbol interference (ISI) can be reduced in the current VDSL systems and FFT (Fast Fourier Transform) can be applied in place of presently used DFT (Direct Fourier Transform) for TEQ training. Use of the present invention in effectively implementing TEQ training in systems having cyclic extension results in reduced complexity, power saving, reduced memory requirements in terms of code space, and cost savings
    • 本发明提供了一种实现时域均衡器(TEQ)训练以缩短用于基于DMT的VDSL系统的绞合铜线的信道脉冲响应的方法和系统。 当训练信号具有循环扩展(CE)时,TEQ的系数被训练,例如在当前的VDSL标准中指定并且针对VDSL2提出。 本发明实现了CE的帧对准和去除,从而有效地实现了训练信号具有循环扩展的VDSL的TEQ训练。 这种新发明的优点是可以在当前的VDSL系统中减少符号间干扰(ISI),并且可以应用FFT(快速傅里叶变换)代替目前使用的用于TEQ训练的DFT(直接傅立叶变换)。 使用本发明在具有循环扩展的系统中有效实现TEQ训练导致复杂度降低,功率节省,代码空间方面的减少的存储器要求以及成本节约
    • 34. 发明授权
    • Signal processing circuit and method thereof
    • 信号处理电路及其方法
    • US08526549B2
    • 2013-09-03
    • US12986873
    • 2011-01-07
    • Ching-Hsiang ChuangTien Hsin HoShao Ping HungTai-Lai Tung
    • Ching-Hsiang ChuangTien Hsin HoShao Ping HungTai-Lai Tung
    • H04L27/08
    • H04L25/10
    • A signal processing circuit is provided. The signal processing circuit, adjusting a received radio frequency (RF) signal according to a gain, and generating a digital signal accordingly, the signal processing circuit including a signal analysis circuit, for analyzing the digital signal to generate the gain, determining whether the received RF signal is a target signal, and generating a reference value according to the digital signal, and a baseband circuit, for performing a carrier frequency offset (CFO) compensation to the digital signal according to the reference value, wherein, the reference value is generated while the signal analysis circuit is determining whether the received RF signal is the target signal.
    • 提供信号处理电路。 信号处理电路,根据增益调整接收到的射频(RF)信号,并相应地生成数字信号,所述信号处理电路包括信号分析电路,用于分析数字信号以产生增益,确定是否接收到 RF信号是目标信号,并根据数字信号产生参考值,以及基带电路,用于根据参考值对数字信号执行载波频率偏移(CFO)补偿,其中生成参考值 而信号分析电路正在确定接收到的RF信号是否是目标信号。