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31. 发明申请

US20120105037A1 Voltage Conversion Device Capable of Enhancing Conversion Efficiency 有权
标题翻译：电压转换装置能够提高转换效率
公开(公告)号：US20120105037A1
公开(公告)日：2012-05-03
申请号：US13342210
申请日：2012-01-03
申请人： Chih-Jen Yen , Tsung-Yin Yu
发明人： Chih-Jen Yen , Tsung-Yin Yu
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , G11C5/145
摘要： A voltage conversion device capable of enhancing conversion efficiency includes a charge pump for generating output voltage linear to input voltage according to the input voltage, a feedback unit for generating a feedback signal according to the output voltage generated by the charge pump, and a regulating unit for outputting and adjusting the input voltage according to the feedback signal provided by the feedback unit, so as to keep the output voltage unchanged.
摘要翻译：能够提高转换效率的电压转换装置包括用于根据输入电压产生与输入电压成线性的输出电压的电荷泵，用于根据由电荷泵产生的输出电压产生反馈信号的反馈单元和调节单元用于根据反馈单元提供的反馈信号输出和调节输入电压，以保持输出电压不变。

32. 发明授权

US07605663B2 Method and apparatus for stabilizing output frequency of PLL (phase lock loop) and phase lock loop thereof 失效
标题翻译：用于稳定PLL（锁相环）的输出频率及其锁相环的方法和装置
公开(公告)号：US07605663B2
公开(公告)日：2009-10-20
申请号：US11163122
申请日：2005-10-05
申请人： Chiu-Hung Cheng , Chih-Jen Yen
发明人： Chiu-Hung Cheng , Chih-Jen Yen
IPC分类号： H03L7/08
CPC分类号： H03L7/0891 , H03L7/14 , H03L7/18
摘要： A method and an apparatus for stabilizing output from a Phase Lock Loop (PLL) and the PLL thereof is disclosed. The method mainly relates to enabling the control voltage of a voltage control oscillator VCO in the PLL remained unchanged by means of turning off a charge-discharge current source of a charge pump in a PLL in response to a detected reference signal lower than a default value. Furthermore, the method enables the pulse frequency output from the VCO no exceeding a default tolerant frequency range in a distance from a desired output frequency. Thus, when the reference signal resumes the original frequency, the PLL can quickly lock the phase and the frequency again.
摘要翻译：公开了一种用于稳定锁相环（PLL）的输出及其PLL的方法和装置。该方法主要涉及通过响应于低于默认值的检测到的参考信号，通过关闭PLL中的电荷泵的充电 - 放电电流源来使PLL中的压控振荡器VCO的控制电压保持不变。此外，该方法使得来自VCO的脉冲频率输出不会超过与期望的输出频率相距一定距离的默认容限频率范围。因此，当参考信号恢复原始频率时，PLL可以再次快速锁定相位和频率。

33. 发明授权

US07403046B2 Sample-and-hold circuits 失效
标题翻译：采样保持电路
公开(公告)号：US07403046B2
公开(公告)日：2008-07-22
申请号：US11161433
申请日：2005-08-03
申请人： Chih-Jen Yen , Chih-Hsin Hsu
发明人： Chih-Jen Yen , Chih-Hsin Hsu
IPC分类号： G11C27/02 , H03K5/00 , H03K17/00
CPC分类号： G11C27/026 , G11C27/02
摘要： A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacitor couples to the second terminal of the first switch, and the second terminal of the first capacitor couples to a first voltage for storing the sampling result of the input signal. The amplifier couples to the second terminal of the first switch, wherein the amplifier is disabled in the sample period, and the amplifier is enabled to generate the output signal according to the sampling result in the hold period.
摘要翻译：提供了包括第一开关，第一电容器和放大器的采样保持电路。开关具有接收输入信号的第一端子并且在采样周期中将其发送到其第二端子。第一电容器的第一端子耦合到第一开关的第二端子，并且第一电容器的第二端子耦合到用于存储输入信号的采样结果的第一电压。放大器耦合到第一开关的第二端子，其中放大器在采样周期中禁用，并且放大器能够根据保持周期中的采样结果产生输出信号。

34. 发明授权

US07388532B2 Overdrive digital-to-analog converter, source driver and method thereof 失效
标题翻译：超速数模转换器，源驱动器及其方法
公开(公告)号：US07388532B2
公开(公告)日：2008-06-17
申请号：US11556173
申请日：2006-11-03
申请人： Chih-Jen Yen
发明人： Chih-Jen Yen
IPC分类号： H03M1/66
CPC分类号： H03M1/667 , H03M1/765
摘要： An overdrive digital-to-analog converter (DAC), a source driver, and a method thereof are provided. The DAC comprises a voltage divider unit, a selection unit, a buffer unit, and a detection unit. The voltage divider unit provides a plurality of reference voltages. The detection unit outputs a regulation signal according to a comparison result between a specific reference signal corresponding to an input digital signal and an output voltage output from the buffer unit. The selection unit regulates an overdrive voltage input to the buffer unit according to the regulation signal and the input digital signal. Accordingly, the output voltage of the buffer unit is changed quickly, and the conversion speed of the DAC is improved.
摘要翻译：提供了一种过驱动数模转换器（DAC），源驱动器及其方法。 DAC包括分压器单元，选择单元，缓冲单元和检测单元。分压器单元提供多个参考电压。检测单元根据对应于输入数字信号的特定参考信号与从缓冲单元输出的输出电压之间的比较结果输出调节信号。选择单元根据调节信号和输入数字信号调节输入到缓冲器单元的过驱动电压。因此，缓冲单元的输出电压快速变化，并且DAC的转换速度提高。

35. 发明申请

US20070229440A1 SOURCE DRIVER OF AN LCD PANEL WITH REDUCED VOLTAGE BUFFERS AND METHOD OF DRIVING THE SAME 审中-公开
标题翻译：具有降低电压缓冲器的液晶面板的源驱动器及其驱动方法
公开(公告)号：US20070229440A1
公开(公告)日：2007-10-04
申请号：US11425378
申请日：2006-06-20
申请人： Chih-Jen Yen
发明人： Chih-Jen Yen
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3696 , G09G2310/027
摘要： A source driver for driving an M-bit liquid crystal display panel includes a reference voltage generator, 2M-X voltage buffers and a voltage-dividing circuit. The 2M-X voltage buffers are coupled to the reference voltage generator for enhancing the driving abilities of 2M-X reference voltages generated by the reference voltage generator, thereby generating corresponding 2M-X output voltages. The voltage-dividing circuit is coupled to the 2M-X voltage buffers for voltage-dividing the 2M-X output voltages generated by the 2M-X voltage buffers, thereby generating 2M reference voltages required for driving the M-bit liquid crystal display panel.
摘要翻译：用于驱动M位液晶显示面板的源极驱动器包括参考电压发生器，2-M-X电压缓冲器和分压电路。两个MX 电压缓冲器耦合到参考电压发生器，以增强由参考电压发生器产生的2个MX参考电压的驱动能力，从而产生相应的2 < MX 输出电压。分压电路耦合到2×MX电压缓冲器，用于对由2×MX电压缓冲器产生的2×MX输出电压进行分压从而产生用于驱动M位液晶显示面板所需的2个M参考电压。

36. 发明申请

US20060202722A1 SAMPLE-AND-HOLD CIRCUITS 失效
标题翻译：样品保持电路
公开(公告)号：US20060202722A1
公开(公告)日：2006-09-14
申请号：US11161433
申请日：2005-08-03
申请人： Chih-Jen Yen , Chih-Hsin Hsu
发明人： Chih-Jen Yen , Chih-Hsin Hsu
IPC分类号： G11C27/02
CPC分类号： G11C27/026 , G11C27/02
摘要： A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacitor couples to the second terminal of the first switch, and the second terminal of the first capacitor couples to a first voltage for storing the sampling result of the input signal. The amplifier couples to the second terminal of the first switch, wherein the amplifier is disabled in the sample period, and the amplifier is enabled to generate the output signal according to the sampling result in the hold period.
摘要翻译：提供了包括第一开关，第一电容器和放大器的采样保持电路。开关具有接收输入信号的第一端子并且在采样周期中将其发送到其第二端子。第一电容器的第一端子耦合到第一开关的第二端子，并且第一电容器的第二端子耦合到用于存储输入信号的采样结果的第一电压。放大器耦合到第一开关的第二端子，其中放大器在采样周期中禁用，并且放大器能够根据保持周期中的采样结果产生输出信号。

37. 发明授权

US08907939B2 Frame maintaining circuit and frame maintaining method 有权
标题翻译：帧保持电路和帧保持方法
公开(公告)号：US08907939B2
公开(公告)日：2014-12-09
申请号：US13492328
申请日：2012-06-08
申请人： Yueh-Hsiu Liu , Hsin-Yih Li , Chih-Yung Hsu , Yu-Shao Liu , Chih-Jen Yen
发明人： Yueh-Hsiu Liu , Hsin-Yih Li , Chih-Yung Hsu , Yu-Shao Liu , Chih-Jen Yen
IPC分类号： G06F3/038 , G09G5/00 , G09G3/20 , G09G3/34 , G09G3/36
CPC分类号： G09G3/2096 , G09G3/20 , G09G3/3406 , G09G3/3677 , G09G3/3688 , G09G5/008 , G09G2310/0267 , G09G2330/06 , G09G2330/12
摘要： A frame maintaining circuit including a detection circuit and a display control circuit is provided. The detection circuit detects an unusual status to output a status feedback signal. The display control circuit maintains a frame displayed by a display apparatus according to the status feedback signal until the unusual status ceases.
摘要翻译：提供了一种包括检测电路和显示控制电路的帧保持电路。检测电路检测异常状态以输出状态反馈信号。显示控制电路根据状态反馈信号维持由显示装置显示的帧，直到异常状态停止。

38. 发明申请

US20120242644A1 FRAME MAINTAINING CIRCUIT AND FRAME MAINTAINING METHOD 有权
标题翻译：框架维护电路和框架维护方法
公开(公告)号：US20120242644A1
公开(公告)日：2012-09-27
申请号：US13492328
申请日：2012-06-08
申请人： Yueh-Hsiu LIU , Hsun-Yih Li , Chih-Yung Hsu , Yu -Shau Liu , Chih-Jen Yen
发明人： Yueh-Hsiu LIU , Hsun-Yih Li , Chih-Yung Hsu , Yu -Shau Liu , Chih-Jen Yen
IPC分类号： G06F3/038
CPC分类号： G09G3/2096 , G09G3/20 , G09G3/3406 , G09G3/3677 , G09G3/3688 , G09G5/008 , G09G2310/0267 , G09G2330/06 , G09G2330/12
摘要： A frame maintaining circuit including a detection circuit and a display control circuit is provided. The detection circuit detects an unusual status to output a status feedback signal. The display control circuit maintains a frame displayed by a display apparatus according to the status feedback signal until the unusual status ceases.
摘要翻译：提供一种包括检测电路和显示控制电路的帧保持电路。检测电路检测异常状态以输出状态反馈信号。显示控制电路根据状态反馈信号维持由显示装置显示的帧，直到异常状态停止。

39. 发明授权

US07479833B2 Dynamic biasing amplifier apparatus, dynamic biasing apparatus and method 有权
标题翻译：动态偏置放大器装置，动态偏置装置及方法
公开(公告)号：US07479833B2
公开(公告)日：2009-01-20
申请号：US11832653
申请日：2007-08-02
申请人： Wei-Zen Chen , Dar-Huei Liao , Chih-Jen Yen
发明人： Wei-Zen Chen , Dar-Huei Liao , Chih-Jen Yen
IPC分类号： H03F3/04
CPC分类号： H03F3/45475 , H03F1/0211 , H03F2200/78 , H03F2203/45541
摘要： A dynamic biasing amplifier apparatus, and dynamic biasing apparatus, and method are disclosed. The dynamic biasing amplifier apparatus includes a comparator unit, a dynamic bias generator unit, and an amplifier unit. The amplifier unit receives an input signal and output an output signal based on at least a bias voltage. The comparator unit compares the positive and negative input signals of the amplifier unit. The dynamic bias generator unit generates and adjusts the bias voltage in accordance with the comparing result of the comparator unit. Therefore, the dynamic bias generator unit controls the amplifier unit to operate in a low static current mode when the input signal is in steady state; and the dynamic bias generator unit controls the amplifier unit to operate in a high dynamic current mode when the input signal is in transition state.
摘要翻译：公开了一种动态偏置放大器装置和动态偏置装置及方法。动态偏置放大器装置包括比较器单元，动态偏置发生器单元和放大器单元。放大器单元接收输入信号并至少基于偏置电压输出输出信号。比较器单元比较放大器单元的正和负输入信号。动态偏置发生器单元根据比较器单元的比较结果生成和调整偏置电压。因此，当输入信号处于稳定状态时，动态偏置发生器单元控制放大器单元在低静态电流模式下工作; 并且当输入信号处于转换状态时，动态偏置发生器单元控制放大器单元在高动态电流模式下工作。

40. 发明申请

US20080258809A1 Amplifier Device Capable of Reducing Offset Voltage 失效
标题翻译：具有降低失调电压的放大器装置
公开(公告)号：US20080258809A1
公开(公告)日：2008-10-23
申请号：US11772241
申请日：2007-07-01
申请人： Chih-Jen Yen
发明人： Chih-Jen Yen
IPC分类号： H03F1/02 , H03L5/00
CPC分类号： H03F3/45475 , H03F3/45968 , H03F2200/453 , H03F2203/45551 , H03F2203/45588 , H03F2203/45681
摘要： An amplifier device capable of reducing offset voltage includes an offset-voltage cancellation device, an input stage circuit, an output stage circuit, a pseudo output stage circuit, a switch circuit, and an output end. The switch circuit is coupled to the input stage circuit, the output stage circuit, and the pseudo output stage circuit, and is utilized for transmitting an amplified signal provided by the input stage circuit to the output stage circuit and transmitting a first feedback voltage provided by the output stage circuit to the input stage circuit or transmitting the amplified signal provided by the input stage circuit to the pseudo output stage circuit and transmitting a second feedback voltage provided by the pseudo output stage circuit to the input stage circuit according to an operating mode.
摘要翻译：能够降低偏移电压的放大器装置包括偏移电压消除装置，输入级电路，输出级电路，伪输出级电路，开关电路和输出端。开关电路耦合到输入级电路，输出级电路和伪输出级电路，用于将由输入级电路提供的放大信号发送到输出级电路，并传输由第一反馈电压将输出级电路输入到输入级电路，或者将由输入级电路提供的放大信号发送到伪输出级电路，并根据工作模式将由伪输出级电路提供的第二反馈电压发送到输入级电路。

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