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31. 发明申请

US20070171730A1 Method and system for error correction in flash memory 有权
标题翻译：闪存中纠错方法和系统
公开(公告)号：US20070171730A1
公开(公告)日：2007-07-26
申请号：US11598117
申请日：2006-11-08
申请人： Aditya Ramamoorthy , Zining Wu , Pantas Sutardja
发明人： Aditya Ramamoorthy , Zining Wu , Pantas Sutardja
IPC分类号： G11C16/04
CPC分类号： G06F11/1068 , G06F11/1072 , G06F11/1666 , G06F2212/403 , G11C7/02 , G11C7/1006 , G11C7/16 , G11C11/56 , G11C11/5621 , G11C16/10 , G11C27/005 , G11C29/00 , G11C2029/0411 , G11C2207/16 , G11C2211/562 , G11C2211/563 , H03M13/1177 , H03M13/1515
摘要： A solid state non-volatile memory unit. The memory unit includes a multi-level solid state non-volatile memory array adapted to store data characterized by a first number of digital levels. The memory unit also includes an analog-to-digital converter having an input and an output. The input of the analog-to-digital converter is adapted to receive data from the multi-level solid state non-volatile memory array. The output of the analog-to-digital converter is adapted to output a digital signal characterized by a second number of digital levels greater than the first number of digital levels.
摘要翻译：固态非易失性存储器单元。存储器单元包括适于存储由第一数字级别表征的数据的多级固态非易失性存储器阵列。存储器单元还包括具有输入和输出的模拟 - 数字转换器。模拟 - 数字转换器的输入适于从多级固态非易失性存储器阵列接收数据。模拟 - 数字转换器的输出适于输出特征在于数字电平大于第一数字电平数量的第二数字电平的数字信号。

32. 发明申请

US20070171714A1 Flash memory with coding and signal processing 有权
标题翻译：闪存与编码和信号处理
公开(公告)号：US20070171714A1
公开(公告)日：2007-07-26
申请号：US11598178
申请日：2006-11-08
申请人： Zining Wu , Pantas Sutardja
发明人： Zining Wu , Pantas Sutardja
IPC分类号： G11C11/34 , G11C16/04 , G11C16/06
CPC分类号： G06F11/1072 , G06F11/1068 , G11C7/1006 , G11C7/16 , G11C11/56 , G11C29/00 , G11C2029/0411 , G11C2211/5641
摘要： A solid state non-volatile memory unit includes, in part, an encoder, a multi-level solid state non-volatile memory array adapted to store data encoded by the encoder, and a decoder adapted to decode the data retrieved from the memory array. The memory array may be a flash EEPROM array. The memory unit optionally includes a modulator and a demodulator. The data modulated by the modulator is stored in the memory array. The demodulator demodulates the modulated data retrieved from the memory array.
摘要翻译：固态非易失性存储器单元部分地包括编码器，适用于存储由编码器编码的数据的多级固态非易失性存储器阵列，以及适于对从存储器阵列检索的数据进行解码的解码器。存储器阵列可以是闪存EEPROM阵列。存储器单元可选地包括调制器和解调器。由调制器调制的数据被存储在存储器阵列中。解调器解调从存储器阵列检索的调制数据。

33. 发明授权

US08566664B2 System and method for correcting errors in non-volatile memory using products codes 有权
标题翻译：使用产品代码纠正非易失性存储器中的错误的系统和方法
公开(公告)号：US08566664B2
公开(公告)日：2013-10-22
申请号：US13280168
申请日：2011-10-24
申请人： Zining Wu , Pantas Sutardja
发明人： Zining Wu , Pantas Sutardja
IPC分类号： H03M13/00
CPC分类号： G11C29/52 , G06F11/1068
摘要： A product code encoder for non-volatile (NV) memory includes a first encoder that encodes data in codewords in a first dimension that is stored in the NV memory. The product code encoder also includes a second encoder that encodes data in codewords in a second dimension that is stored in the NV memory. A product code codeword is based on the codewords in the first dimension and the codewords in the second dimension.
摘要翻译：用于非易失性（NV）存储器的产品代码编码器包括编码存储在NV存储器中的第一维中的码字中的数据的第一编码器。产品代码编码器还包括编码存储在NV存储器中的第二维度中的码字中的数据的第二编码器。产品代码码字基于第一维度中的码字和第二维度中的码字。

34. 发明授权

US08219775B2 Nonvolatile memory system 有权
标题翻译：非易失性存储器系统
公开(公告)号：US08219775B2
公开(公告)日：2012-07-10
申请号：US13230624
申请日：2011-09-12
申请人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
发明人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F3/0688 , G06F3/0619 , G06F3/0661 , G06F11/1068 , G06F12/0246
摘要： A memory system including a nonvolatile memory, and a memory control module. The nonvolatile memory includes a plurality of memory cells arranged among a plurality of physical memory blocks, wherein each physical memory block is of a predetermined size. The memory control module includes a write path module and a read path module. In response to the memory control module receiving data in a first format such that the data is evenly distributable among the plurality of physical memory blocks, the write path module modifies the first format of the data into a second format prior to writing the data to the plurality of physical memory blocks. The second format of the data is such that the data is no longer evenly distributable among the plurality of physical memory blocks. The read path module is configured to read the data from the nonvolatile memory in accordance with the second format.
摘要翻译：一种包括非易失性存储器和存储器控制模块的存储器系统。非易失性存储器包括布置在多个物理存储器块之间的多个存储器单元，其中每个物理存储块具有预定尺寸。存储器控制模块包括写路径模块和读路径模块。响应于存储器控制模块以第一格式接收数据使得数据在多个物理存储器块之间可均匀地分配，写入路径模块在将数据写入到第二格式之前将数据的第一格式修改为第二格式多个物理存储器块。数据的第二格式使得数据不再能够在多个物理存储器块之间均匀分配。读路径模块被配置为根据第二格式从非易失性存储器读取数据。

35. 发明授权

US08166370B1 Efficient RAID ECC controller for RAID systems 有权
标题翻译： RAID系统的高效RAID ECC控制器
公开(公告)号：US08166370B1
公开(公告)日：2012-04-24
申请号：US11805344
申请日：2007-05-23
申请人： Heng Tang , Zining Wu , Gregory Burd , Pantas Sutardja
发明人： Heng Tang , Zining Wu , Gregory Burd , Pantas Sutardja
IPC分类号： G11C29/00
CPC分类号： G06F11/1076 , G06F11/08 , G06F11/1443 , G11C29/00 , H03M13/09 , H03M13/1515 , H03M13/155 , H03M13/611 , H03M13/618
摘要： A Redundant Array of Inexpensive Disks (RAID) controller comprises a RAID error correction code (ECC) encoder module that receives data for storage and that generates code words for data drives and one or more parity drives, which have physical locations. The code words are generated based on the data and a cyclic code generator polynomial. Logical locations correspond to index positions in the cyclic code generator polynomial. A mapping module maps the physical locations of the data and parity drives to the logical locations. The mapping module adds a new data drive to an unused one of the logical locations. A difference generating module generates a difference code word based on the new data drive. The RAID ECC encoder module encodes the difference code word and adds the encoded difference code word to an original code word generated before the new data drive is added.
摘要翻译：一个廉价磁盘冗余阵列（RAID）控制器包括一个RAID纠错码（ECC）编码器模块，它接收用于存储的数据，并产生数据驱动器的代码字和一个或多个具有物理位置的奇偶校验驱动器。基于数据和循环码生成多项式生成码字。逻辑位置对应于循环码生成多项式中的索引位置。映射模块将数据和奇偶校验驱动器的物理位置映射到逻辑位置。映射模块将新的数据驱动器添加到未使用的逻辑位置。差异生成模块基于新的数据驱动器生成差分码字。 RAID ECC编码器模块对差分码字进行编码，并将经编码的差分码字添加到添加新数据驱动器之前生成的原始码字。

36. 发明授权

US08046660B2 System and method for correcting errors in non-volatile memory using product codes 有权
标题翻译：使用产品代码校正非易失性存储器中的错误的系统和方法
公开(公告)号：US08046660B2
公开(公告)日：2011-10-25
申请号：US11820934
申请日：2007-06-21
申请人： Zining Wu , Pantas Sutardja
发明人： Zining Wu , Pantas Sutardja
IPC分类号： H03M13/00
CPC分类号： G11C29/52 , G06F11/1068
摘要： A product code encoder for non-volatile (NV) memory includes a first encoder that encodes data in codewords in a first dimension that is stored in the NV memory. The product code encoder also includes a second encoder that encodes data in codewords in a second dimension that is stored in the NV memory. A product code codeword is based on the codewords in the first dimension and the codewords in the second dimension.
摘要翻译：用于非易失性（NV）存储器的产品代码编码器包括编码存储在NV存储器中的第一维中的码字中的数据的第一编码器。产品代码编码器还包括编码存储在NV存储器中的第二维度中的码字中的数据的第二编码器。产品代码码字基于第一维度中的码字和第二维度中的码字。

37. 发明授权

US07773325B2 Timing recovery for data storage channels with buffered sectors 有权
标题翻译：具有缓冲扇区的数据存储通道的定时恢复
公开(公告)号：US07773325B2
公开(公告)日：2010-08-10
申请号：US11733728
申请日：2007-04-10
申请人： Pantas Sutardja , Ke Han , Zining Wu
发明人： Pantas Sutardja , Ke Han , Zining Wu
IPC分类号： G11B5/09
CPC分类号： G11B20/1403 , G11B20/10009 , G11B20/10222 , G11B20/10527 , G11B2020/1062
摘要： A storage channel, e.g., for a disk drive system, may asynchronously sample and buffer an entire sector, and then process the buffered sector to recover timing information. The storage channel may operate in an open-loop and utilize an exhaustive search to determine timing parameters. Alternatively, the storage channel may operative in a closed-loop, processing the sector once, and feeding back information obtained during decoding to the timing loop.
摘要翻译：诸如用于磁盘驱动器系统的存储通道可以异步地对整个扇区进行采样和缓冲，然后处理缓冲的扇区以恢复定时信息。存储通道可以在开环中操作并利用穷举搜索来确定时序参数。或者，存储通道可以在闭环中操作，一次处理该扇区，并将解码期间获得的信息反馈到定时循环。

38. 发明申请

US20070183073A1 Timing Recovery for Data Storage Channels with Buffered Sectors 有权
标题翻译：具有缓冲部分的数据存储通道的定时恢复
公开(公告)号：US20070183073A1
公开(公告)日：2007-08-09
申请号：US11733728
申请日：2007-04-10
申请人： Pantas Sutardja , Ke Han , Zining Wu
发明人： Pantas Sutardja , Ke Han , Zining Wu
IPC分类号： G11B5/09 , G11B20/10
CPC分类号： G11B20/1403 , G11B20/10009 , G11B20/10222 , G11B20/10527 , G11B2020/1062
摘要： A storage channel, e.g., for a disk drive system, may asynchronously sample and buffer an entire sector, and then process the buffered sector to recover timing information. The storage channel may operate in an open-loop and utilize an exhaustive search to determine timing parameters. Alternatively, the storage channel may operative in a closed-loop, processing the sector once, and feeding back information obtained during decoding to the timing loop.
摘要翻译：诸如用于磁盘驱动器系统的存储通道可以异步地对整个扇区进行采样和缓冲，然后处理缓冲的扇区以恢复定时信息。存储通道可以在开环中操作并利用穷举搜索来确定时序参数。或者，存储通道可以在闭环中操作，一次处理该扇区，并将解码期间获得的信息反馈到定时循环。

39. 发明授权

US07237178B1 Marking unreliable symbols in a hard disk drive read back signal 有权
标题翻译：标记硬盘驱动器中的不可靠符号回读信号
公开(公告)号：US07237178B1
公开(公告)日：2007-06-26
申请号：US10672086
申请日：2003-09-26
申请人： Pantas Sutardja , Zining Wu
发明人： Pantas Sutardja , Zining Wu
IPC分类号： H03M13/00 , G06F11/00
CPC分类号： G11B20/18 , G11B20/1803 , G11B2020/183 , G11B2220/2516
摘要： In a hard disk drive, a channel detector produces a first detected sequence based on a first signal. A decoder includes an error-correction decoder that produces first data based on the first detected sequence when a number of symbols in error in the first detected sequence is less than, or equal to, a predetermined number, and that asserts a failure indication when the number of symbols in error in the first detected sequence is greater than the predetermined number. When the error-correction decoder asserts the failure indication for the first detected sequence, a controller causes the channel detector to produce a second detected sequence based on a second signal, and identifies corresponding symbols of the first and second detected sequences that differ. The decoder produces second data based on the symbols identified by the controller and at least one of the first and second detected sequences.
摘要翻译：在硬盘驱动器中，信道检测器基于第一信号产生第一检测到的序列。解码器包括纠错解码器，当第一检测到的序列中的错误符号数小于或等于预定数量时，基于第一检测到的序列产生第一数据，并且当第第一检测序列中的错误符号数大于预定数。当纠错解码器确定第一检测到的序列的失败指示时，控制器使得信道检测器基于第二信号产生第二检测到的序列，并且识别不同的第一和第二检测到的序列的相应符号。解码器基于由控制器识别的符号和第一和第二检测到的序列中的至少一个产生第二数据。

40. 发明授权

US08539195B2 Non-volatile memory device with non-evenly distributable data access 有权
标题翻译：非易失性存储器件具有不均匀分布的数据访问
公开(公告)号：US08539195B2
公开(公告)日：2013-09-17
申请号：US13545508
申请日：2012-07-10
申请人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
发明人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F3/0688 , G06F3/0619 , G06F3/0661 , G06F11/1068 , G06F12/0246
摘要： A system includes chips and a control module. Each of the chips includes an array of memory cells. Each of the arrays of memory cells includes rows of memory cells. Each of the rows of memory cells is configured to store a predetermined amount of data. The control module is configured to receive data, encode the data to generate blocks of encoded data, store a first portion of one of the blocks of encoded data in a first selected number row of a first chip, and store a remaining portion of the one of the blocks of encoded data in a second selected number row of a second chip. An amount of data in each of the blocks of encoded data is more than the predetermined amount of data. The second selected number row is a same number row or a higher number row than the first selected number row.
摘要翻译：系统包括芯片和控制模块。每个芯片包括一组存储单元。每个存储器单元阵列包括行存储器单元。每行存储单元被配置为存储预定量的数据。控制模块被配置为接收数据，对数据进行编码以生成编码数据块，将编码数据块中的一个块的第一部分存储在第一芯片的第一选定数字行中，并存储第一芯片的剩余部分在第二芯片的第二选定数量行中的编码数据块。每个编码数据块中的数据量大于预定量的数据。第二选择的数字行是与第一选定数字行相同的数字行或更高数字的行。

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