专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20110145485A1 METHOD FOR MANAGING ADDRESS MAPPING TABLE AND A MEMORY DEVICE USING THE METHOD 审中-公开
标题翻译：用于管理地址映射表的方法和使用该方法的存储器件
公开(公告)号：US20110145485A1
公开(公告)日：2011-06-16
申请号：US12946893
申请日：2010-11-16
申请人： Jin-Young Chun , Jaeyong Jeong
发明人： Jin-Young Chun , Jaeyong Jeong
IPC分类号： G06F12/10 , G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201
摘要： An address mapping table includes arrays each being allocated to a logical address and in which a physical address mapping the logical address is stored. In the case where the physical address mapped to the logical address is changed, a value of a difference between a pre-changed physical address and a physical address to be changed is stored in the address mapping table. When the logical address is mapped to the physical address, the mapped physical address is calculated by adding up the logical address and values stored in the arrays allocated to the logical address. The address mapping table is managed to decrease the number of erase counts of a memory device in which the address mapping table is stored.
摘要翻译：地址映射表包括分配给逻辑地址的阵列，并且存储映射逻辑地址的物理地址。在映射到逻辑地址的物理地址被改变的情况下，预先改变的物理地址和要改变的物理地址之间的差值被存储在地址映射表中。当逻辑地址映射到物理地址时，通过将逻辑地址和存储在分配给逻辑地址的阵列中的值相加来计算映射的物理地址。管理地址映射表以减少存储地址映射表的存储器件的擦除次数。

32. 发明申请

US20090276672A1 REPETITIVE TRANSMISSIONS IN MULTI-CARRIER BASED WIRELESS ACCESS TECHNIQUES 有权
标题翻译：基于多载波无线接入技术的重复传输
公开(公告)号：US20090276672A1
公开(公告)日：2009-11-05
申请号：US12296667
申请日：2007-04-06
申请人： Moon-Il Lee , Jin-Young Chun , Jae-Won Chang , Jin-Hyuk Jung
发明人： Moon-Il Lee , Jin-Young Chun , Jae-Won Chang , Jin-Hyuk Jung
IPC分类号： H04L1/18 , G06F11/14
CPC分类号： H04B7/0671 , H04B7/12 , H04L1/0006 , H04L1/0625 , H04L1/08 , H04L1/1816 , H04L1/1819 , H04L27/2602 , H04L27/2607 , H04L27/2626 , H04L27/2634
摘要： Repetitive transmissions in multi-carrier based wireless access techniques may be achieved by providing multiple cyclic delay values for a plurality of carriers, performing a cyclic delay procedure using the multiple cyclic delay values according to the number of repetitive transmission of data symbols to be transmitted to a receiver, and transmitting the cyclic delayed data symbols to the receiver using the plurality of carriers.
摘要翻译：可以通过为多个载波提供多个循环延迟值来实现基于多载波的无线接入技术中的重复传输，根据要发送到的数据符号的重复发送次数，使用多个循环延迟值执行循环延迟过程接收机，并且使用多个载波将循环延迟的数据符号发送到接收机。

33. 发明申请

US20070183216A1 Reprogrammable nonvolatile memory devices and methods 失效
标题翻译：可重复编程的非易失性存储器件和方法
公开(公告)号：US20070183216A1
公开(公告)日：2007-08-09
申请号：US11634058
申请日：2006-12-05
申请人： Jin-Young Chun , Jae-Yong Jeong
发明人： Jin-Young Chun , Jae-Yong Jeong
IPC分类号： G11C16/04 , G11C11/34 , G11C16/06
CPC分类号： G11C16/12 , G11C16/26 , G11C16/3459
摘要： A nonvolatile memory device includes a command decoder configured to generate a read/write flag signal in response to a read/write command and to generate a reprogram flag signal in response to a reprogram command, and a read/write circuit configured to control reading and writing operations in a memory cell array. The device further includes a read/write controller configured to cause the read/write circuit to perform a reading/writing operation in response to the read/write flag signal provided from the command decoder, and a reprogram controller configured to cause the read/write controller to perform a reprogramming operation in response to the reprogram flag signal. Methods of reprogramming a memory device include determining whether the memory device is in a busy state, delaying a reprogramming operation if the memory device is in a busy state, and executing the reprogramming operation when the memory device has turned to a standby state from the busy state.
摘要翻译：非易失性存储器件包括：命令解码器，被配置为响应于读/写命令产生读/写标志信号，并且响应于重编程命令产生再编程标志信号;以及读/写电路，被配置为控制读/ 在存储单元阵列中进行写操作。该装置还包括读/写控制器，其被配置为使得读/写电路响应于从命令解码器提供的读/写标志信号执行读/写操作;以及重新编程控制器，其被配置为使读/ 控制器响应于重新编程标志信号执行重新编程操作。重新编程存储器件的方法包括：确定存储器件是否处于忙状态，如果存储器件处于忙状态，则延迟重新编程操作，并且当存储器件已经从忙时转为待机状态时执行重新编程操作州。

34. 发明授权

US07986565B2 Method of erasing data in flash memory device 失效
标题翻译：擦除闪存设备中数据的方法
公开(公告)号：US07986565B2
公开(公告)日：2011-07-26
申请号：US12458502
申请日：2009-07-14
申请人： Jin-Young Chun , Jae-Yong Jeong
发明人： Jin-Young Chun , Jae-Yong Jeong
IPC分类号： G11C16/04
CPC分类号： G11C16/16 , G11C16/344 , G11C16/3445
摘要： A method of erasing data in a flash memory device, including erasing data in at least one flash memory cell using a first erase voltage; detecting whether the at least one flash memory cell has a threshold voltage less than a first voltage; programming the at least one flash memory cell by varying the threshold voltage of the at least one flash memory cell using a second voltage that is greater than the first voltage if the detecting step detects the threshold voltage is less than the first voltage; maintaining the threshold voltage of the at least one flash memory cell if the detecting step detects the threshold voltage is greater than the first voltage; and verifying the at least one flash memory cell using a first verification voltage.
摘要翻译：一种擦除闪速存储器件中的数据的方法，包括使用第一擦除电压擦除至少一个闪存单元中的数据; 检测所述至少一个闪存单元是否具有小于第一电压的阈值电压; 如果所述检测步骤检测到所述阈值电压小于所述第一电压，则使用大于所述第一电压的第二电压改变所述至少一个闪存单元的阈值电压来对所述至少一个闪存单元进行编程; 如果所述检测步骤检测到所述阈值电压大于所述第一电压，则保持所述至少一个闪存单元的阈值电压; 以及使用第一验证电压验证所述至少一个闪存单元。

35. 发明授权

US07911843B2 Non-volatile memory device and program method thereof 失效
标题翻译：非易失性存储器件及其程序方法
公开(公告)号：US07911843B2
公开(公告)日：2011-03-22
申请号：US12476876
申请日：2009-06-02
申请人： Jin-Young Chun , Jae-Yong Jeon
发明人： Jin-Young Chun , Jae-Yong Jeon
IPC分类号： G11C11/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3454 , G11C2211/5621
摘要： A method of programming a non-volatile memory device employing program loops. Each program loop comprises a programming operation and a subsequent plurality of verifying operations. The method includes preventing the next program loop based on the results of performing the plurality of verifying operations of a current program loop each verifying operation verifying whether the selected memory cell transistors are program-passed. The decision to re-program may be based on a program pass number of the memory cell transistors obtained as a result of the plurality of verifying operations of the current program loop.
摘要翻译：一种编程使用程序循环的非易失性存储器件的方法。每个程序循环包括编程操作和随后的多个验证操作。该方法包括基于执行当前程序循环的多个验证操作的结果来防止下一个程序循环，每个验证操作验证所选存储单元晶体管是否被编程通过。重新编程的决定可以基于作为当前程序循环的多个验证操作的结果而获得的存储器单元晶体管的程序通过次数。

36. 发明授权

US07821837B2 Reprogrammable nonvolatile memory devices and methods 失效
标题翻译：可重复编程的非易失性存储器件和方法
公开(公告)号：US07821837B2
公开(公告)日：2010-10-26
申请号：US12466679
申请日：2009-05-15
申请人： Jin-Young Chun , Jae-Yong Jeong
发明人： Jin-Young Chun , Jae-Yong Jeong
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C16/26 , G11C16/3459
摘要： A nonvolatile memory device includes a command decoder configured to generate a read/write flag signal in response to a read/write command and to generate a reprogram flag signal in response to a reprogram command, and a read/write circuit configured to control reading and writing operations in a memory cell array. The device further includes a read/write controller configured to cause the read/write circuit to perform a reading/writing operation in response to the read/write flag signal provided from the command decoder, and a reprogram controller configured to cause the read/write controller to perform a reprogramming operation in response to the reprogram flag signal. Methods of reprogramming a memory device include determining whether the memory device is in a busy state, delaying a reprogramming operation if the memory device is in a busy state, and executing the reprogramming operation when the memory device has turned to a standby state from the busy state.
摘要翻译：非易失性存储器件包括：命令解码器，被配置为响应于读/写命令产生读/写标志信号，并且响应于重编程命令产生再编程标志信号;以及读/写电路，被配置为控制读/ 在存储单元阵列中进行写操作。该装置还包括读/写控制器，其被配置为使得读/写电路响应于从命令解码器提供的读/写标志信号执行读/写操作;以及重新编程控制器，其被配置为使读/ 控制器响应于重新编程标志信号执行重新编程操作。重新编程存储器件的方法包括：确定存储器件是否处于忙状态，如果存储器件处于忙状态，则延迟重新编程操作，并且当存储器件已经从忙时转为待机状态时执行重新编程操作州。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式