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31. 发明授权

US07125767B2 Capacitor including a dielectric layer having an inhomogeneous crystalline region and method of fabricating the same 有权
标题翻译：电容器包括具有不均匀结晶区域的电介质层及其制造方法
公开(公告)号：US07125767B2
公开(公告)日：2006-10-24
申请号：US11296509
申请日：2005-12-08
申请人： Yong-kuk Jeong , Jung-Hyoung Lee , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Min-woo Song
发明人： Yong-kuk Jeong , Jung-Hyoung Lee , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Min-woo Song
IPC分类号： H01L21/8242 , H01L21/20
CPC分类号： H01L21/02172 , H01G4/10 , H01G4/20 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/31645 , H01L27/0805 , H01L28/56 , H01L28/65
摘要： In a capacitor, and a method of fabricating the same, the capacitor includes a lower electrode, a dielectric layer on the lower electrode, and an upper electrode on the dielectric layer, wherein the dielectric layer includes a lower dielectric region contacting the lower electrode, an upper dielectric region contacting the upper electrode, and at least one middle dielectric region between the lower dielectric region and the upper dielectric region, the at least one middle dielectric region having a less crystalline region than both the lower dielectric region and the upper dielectric region.
摘要翻译：在电容器及其制造方法中，电容器包括下电极，下电极上的电介质层和电介质层上的上电极，其中介电层包括与下电极接触的下电介质区域，与上部电极接触的上部电介质区域，以及位于下部电介质区域和上部电介质区域之间的至少一个中间电介质区域，所述至少一个中间电介质区域具有比下部电介质区域和上部电介质区域更小的结晶区域。

32. 发明申请

US20060094185A1 Capacitor including a dielectric layer having an inhomogeneous crystalline region and method of fabricating the same 有权
公开(公告)号：US20060094185A1
公开(公告)日：2006-05-04
申请号：US11296509
申请日：2005-12-08
申请人： Yong-kuk Jeong , Jung-Hyoung Lee , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Min-woo Song
发明人： Yong-kuk Jeong , Jung-Hyoung Lee , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Min-woo Song
IPC分类号： H01L21/8242
CPC分类号： H01L21/02172 , H01G4/10 , H01G4/20 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/31645 , H01L27/0805 , H01L28/56 , H01L28/65
摘要： In a capacitor, and a method of fabricating the same, the capacitor includes a lower electrode, a dielectric layer on the lower electrode, and an upper electrode on the dielectric layer, wherein the dielectric layer includes a lower dielectric region contacting the lower electrode, an upper dielectric region contacting the upper electrode, and at least one middle dielectric region between the lower dielectric region and the upper dielectric region, the at least one middle dielectric region having a less crystalline region than both the lower dielectric region and the upper dielectric region.

33. 发明申请

US20050087879A1 Logic device having vertically extending metal-insulator-metal capacitor between interconnect layers and method of fabricating the same 有权
标题翻译：在互连层之间具有垂直延伸的金属 - 绝缘体 - 金属电容器的逻辑器件及其制造方法
公开(公告)号：US20050087879A1
公开(公告)日：2005-04-28
申请号：US10969098
申请日：2004-10-20
申请人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
发明人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
IPC分类号： H01L27/10 , H01L21/02 , H01L21/768 , H01L23/48 , H01L27/08
CPC分类号： H01L28/91 , H01L21/76807 , H01L21/76838 , H01L27/0805
摘要： A logic device having a vertically extending MIM capacitor between interconnect layers includes a semiconductor substrate. A lower interconnect layer is located over the semiconductor substrate, and an upper interconnect layer is located over the lower interconnect layer. A U-shaped lower metal plate is interposed between the lower interconnect layer and the upper interconnect layer. The U-shaped lower metal plate directly contacts the lower interconnect layer. The capacitor dielectric layer covers the inner surface of the lower metal plate. Further, the capacitor dielectric layer has an extension portion interposed between the brim of the lower metal plate and the upper interconnect layer. An upper metal plate covers the inner surface of the capacitor dielectric layer. The upper metal plate is in contact with the upper interconnect layer and is confined by the capacitor dielectric layer.
摘要翻译：在互连层之间具有垂直延伸的MIM电容器的逻辑器件包括半导体衬底。下部互连层位于半导体衬底上方，并且上互连层位于下互连层上。 U形下金属板插入在下互连层和上互连层之间。 U形下金属板直接接触下互连层。电容器电介质层覆盖下金属板的内表面。此外，电容器介电层具有插入在下金属板的边缘和上互连层之间的延伸部分。上金属板覆盖电容器介电层的内表面。上金属板与上互连层接触并被电容器电介质层约束。

34. 发明授权

US09583592B2 Methods of manufacturing semiconductor devices 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09583592B2
公开(公告)日：2017-02-28
申请号：US14697266
申请日：2015-04-27
申请人： Pan-Kwi Park , Dong-Suk Shin , Seok-Jun Won , Weon-Hong Kim , Jae-Gon Lee
发明人： Pan-Kwi Park , Dong-Suk Shin , Seok-Jun Won , Weon-Hong Kim , Jae-Gon Lee
IPC分类号： H01L29/66 , H01L21/02 , H01L21/311 , H01L21/3213 , H01L21/8238 , H01L21/8234
CPC分类号： H01L29/66545 , H01L21/02057 , H01L21/0206 , H01L21/0217 , H01L21/02247 , H01L21/02332 , H01L21/31111 , H01L21/32139 , H01L21/823418 , H01L21/823437 , H01L21/823814 , H01L21/823828 , H01L29/6653 , H01L29/6656 , H01L29/66636 , H01L29/7834
摘要： In a method of manufacturing a semiconductor device, a dummy gate structure is formed on a substrate. A first spacer layer is formed on the substrate to cover the dummy gate structure. A nitridation process is performed on the first spacer layer. An upper portion of the substrate adjacent to the dummy gate structure is removed to form a trench. An inner wall of the trench is cleaned. An epitaxial layer is formed to fill the trench. The dummy gate structure is replaced with a gate structure.
摘要翻译：在制造半导体器件的方法中，在基板上形成虚拟栅极结构。在衬底上形成第一间隔层以覆盖虚拟栅极结构。在第一间隔层上进行氮化处理。去除与伪栅极结构相邻的衬底的上部以形成沟槽。清洁沟槽的内壁。形成外延层以填充沟槽。虚拟栅极结构被栅极结构代替。

35. 发明申请

US20120083111A1 Methods of Manufacturing a Semiconductor Device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120083111A1
公开(公告)日：2012-04-05
申请号：US13249505
申请日：2011-09-30
申请人： Ha-Jin Lim , Moon-Han Park , Eun-Gon Kim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
发明人： Ha-Jin Lim , Moon-Han Park , Eun-Gon Kim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
IPC分类号： H01L21/28
CPC分类号： H01L21/28123 , H01L21/28079 , H01L21/28088 , H01L21/28097 , H01L21/32134 , H01L21/32139 , H01L29/517 , H01L29/518
摘要： There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
摘要翻译：提供了制造半导体器件的方法。在该方法中，在基板上形成包括高k电介质材料的栅极绝缘层。在栅绝缘层上形成蚀刻停止层。在蚀刻停止层上形成金属层。在金属层上形成包括非晶硅的硬掩模。使用硬掩模作为蚀刻掩模对金属层进行图案化以形成金属层图案。

36. 发明授权

US07232492B2 Method of forming thin film for improved productivity 有权
标题翻译：形成薄膜以提高生产率的方法
公开(公告)号：US07232492B2
公开(公告)日：2007-06-19
申请号：US11007884
申请日：2004-12-09
申请人： Seok-Jun Won , Weon-Hong Kim , Dae-Jin Kwon
发明人： Seok-Jun Won , Weon-Hong Kim , Dae-Jin Kwon
IPC分类号： B08B3/12 , B08B6/00 , B08B7/00
CPC分类号： C23C16/4404 , C23C16/4405 , H01L21/3141 , H01L21/31637
摘要： There is provided a method of forming a thin film for providing improved fabrication productivity. The method includes introducing a semiconductor substrate into a process chamber. A process thin film is formed on the semiconductor substrate, in which a chamber coating layer is formed on inner walls of the process chamber while the process thin film is formed. The semiconductor substrate is removed from the process chamber. A stress relief layer is formed on the chamber coating layer. After all of the above operations are repeatedly performed at least one time, an in-situ cleaning is performed on the chamber coating layer and the stress relief layer, which are alternately formed in stack on the inner walls of the process chamber.
摘要翻译：提供了形成薄膜以提高制造生产率的方法。该方法包括将半导体衬底引入到处理室中。在半导体衬底上形成工艺薄膜，其中在形成工艺薄膜的同时，在处理室的内壁上形成腔室涂层。将半导体衬底从处理室中取出。在室涂层上形成应力消除层。在上述操作全部反复进行至少一次之后，对处理室内壁交替形成的室涂层和应力消除层进行原位清洗。

37. 发明授权

US07042698B2 MEMS tunable capacitor with a wide tuning range and method of fabricating the same 有权
标题翻译：具有宽调谐范围的MEMS可调电容器及其制造方法
公开(公告)号：US07042698B2
公开(公告)日：2006-05-09
申请号：US11047762
申请日：2005-02-02
申请人： Seok-Jun Won , Kang-soo Chu , Weon-Hong Kim
发明人： Seok-Jun Won , Kang-soo Chu , Weon-Hong Kim
IPC分类号： H01G5/00
CPC分类号： H01G5/0136 , H01G5/14 , H01G5/145 , H01G5/18
摘要： A MEMS tunable capacitor and method of fabricating the same, includes a plurality of fixed charge plates on a substrate, the plurality of fixed charge plates having a same height, being arranged in a shape of comb-teeth and being electrically connected to one another, a capacitor dielectric layer covering the plurality of fixed charge plates, a movable charge plate structure spaced apart from the capacitor dielectric layer, and arranged on the plurality of fixed charge plates, wherein the movable charge plate structure includes a plurality of movable charge plates arranged corresponding the plurality of fixed charge plates, and an actuator connected to the movable charge plate structure allowing the movable charge plate structure to move in a horizontal direction.
摘要翻译： MEMS可调谐电容器及其制造方法包括在基板上的多个固定的充电板，多个具有相同高度的固定充电板被布置成梳齿形并彼此电连接，覆盖所述多个固定充电板的电容器电介质层，与所述电容器介电层间隔开并且布置在所述多个固定的充电板上的可移动的充电板结构，其中所述可移动的充电板结构包括多个相应地布置的可移动的充电板多个固定的充电板和连接到可移动的充电板结构的致动器，其允许可移动的充电板结构在水平方向上移动。

38. 发明授权

US08563411B2 Semiconductor devices having a diffusion barrier layer and methods of manufacturing the same 有权
公开(公告)号：US08563411B2
公开(公告)日：2013-10-22
申请号：US13191948
申请日：2011-07-27
申请人： Ha-Jin Lim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
发明人： Ha-Jin Lim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
IPC分类号： H01L21/3205
CPC分类号： H01L29/78 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L27/10873 , H01L27/10894 , H01L29/4966
摘要： Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.

39. 发明申请

US20110306171A1 METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH DIFFERENTIALLY NITRIDED GATE INSULATORS 审中-公开
标题翻译：用不同绝缘栅绝缘体制作半导体器件的方法
公开(公告)号：US20110306171A1
公开(公告)日：2011-12-15
申请号：US13105652
申请日：2011-05-11
申请人： Ha-Jin Lim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
发明人： Ha-Jin Lim , Jin-Ho Do , Weon-Hong Kim , Moon-Kyun Song , Dae-Kwon Joo
IPC分类号： H01L21/8238 , H01L21/28
CPC分类号： H01L21/823857 , H01L21/28202 , H01L29/518
摘要： An insulation layer is formed on a substrate having an NMOS region and a PMOS region defined therein. A first conductive layer is formed on the insulation layer in the PMOS region, leaving a portion of the insulation layer in the NMOS region exposed. Nitriding is performed to produce a first nitrogen concentration in the insulation layer in the NMOS region and a second nitrogen concentration less than the first nitrogen concentration in the insulation layer in the PMOS region. A second conductive layer is formed on the insulation layer and the first conductive layer and the first and second conductive layers and the insulation layer are patterned to form a first gate structure and a second gate structure in the NMOS region and the PMOS region, respectively.
摘要翻译：在其上限定有NMOS区和PMOS区的基板上形成绝缘层。在PMOS区域中的绝缘层上形成第一导电层，使NMOS区域中的绝缘层的一部分露出。进行氮化，以在NMOS区域中的绝缘层中产生第一氮浓度，并且在PMOS区域中的绝缘层中小于第一氮浓度的第二氮浓度。第二导电层形成在绝缘层上，并且第一导电层以及第一和第二导电层和绝缘层被图案化以分别在NMOS区域和PMOS区域中形成第一栅极结构和第二栅极结构。

40. 发明授权

US07203052B2 Method of fabricating MEMS tunable capacitor with wide tuning range 有权
标题翻译：制造具有宽调谐范围的MEMS可调电容器的方法
公开(公告)号：US07203052B2
公开(公告)日：2007-04-10
申请号：US11408976
申请日：2006-04-24
申请人： Seok-Jun Won , Kang-soo Chu , Weon-Hong Kim
发明人： Seok-Jun Won , Kang-soo Chu , Weon-Hong Kim
IPC分类号： H01G7/00
CPC分类号： H01G5/0136 , H01G5/14 , H01G5/145 , H01G5/18
摘要： A MEMS tunable capacitor and method of fabricating the same, includes a plurality of fixed charge plates on a substrate, the plurality of fixed charge plates having a same height, being arranged in a shape of comb-teeth and being electrically connected to one another, a capacitor dielectric layer covering the plurality of fixed charge plates, a movable charge plate structure spaced apart from the capacitor dielectric layer, and arranged on the plurality of fixed charge plates, wherein the movable charge plate structure includes a plurality of movable charge plates arranged corresponding the plurality of fixed charge plates, and an actuator connected to the movable charge plate structure allowing the movable charge plate structure to move in a horizontal direction.
摘要翻译： MEMS可调谐电容器及其制造方法包括在基板上的多个固定的充电板，多个具有相同高度的固定充电板被布置成梳齿形并彼此电连接，覆盖所述多个固定充电板的电容器电介质层，与所述电容器介电层间隔开并且布置在所述多个固定的充电板上的可移动的充电板结构，其中所述可移动的充电板结构包括多个相应地布置的可移动的充电板多个固定的充电板和连接到可移动的充电板结构的致动器，其允许可移动的充电板结构在水平方向上移动。

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