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31. 发明授权

US5325331A Improved device for sensing information store in a dynamic memory 失效
标题翻译：改进的用于在动态存储器中感测信息存储的设备
公开(公告)号：US5325331A
公开(公告)日：1994-06-28
申请号：US680588
申请日：1991-04-04
申请人： Ward D. Parkinson , Paul S. Zagar
发明人： Ward D. Parkinson , Paul S. Zagar
IPC分类号： G11C11/409 , G11C11/406 , G11C11/4091 , G11C11/4094 , G11C7/00
CPC分类号： G11C11/4091 , G11C11/4094
摘要： To enhance the speed at which dynamic random access memories are refreshed, each sensing amplifier is provided with a clamping transistor. The clamping transistor is connected to a preselected voltage source. The clamping transistor prevents the voltage on the low-going bit line from falling to circuit ground by clamping the voltage on the low-going bit line to the preselected voltage.
摘要翻译：为了提高动态随机存取存储器被刷新的速度，每个感测放大器设置有钳位晶体管。钳位晶体管连接到预选电压源。钳位晶体管通过将低位位线上的电压钳位到预选电压来防止低位位线上的电压下降到电路接地。

32. 发明授权

US5173905A Parity and error correction coding on integrated circuit addresses 失效
标题翻译：集成电路地址上的奇偶校验和纠错编码
公开(公告)号：US5173905A
公开(公告)日：1992-12-22
申请号：US502117
申请日：1990-03-29
申请人： Ward D. Parkinson , Edward J. Heitzeberg
发明人： Ward D. Parkinson , Edward J. Heitzeberg
IPC分类号： G06F11/10 , G06F11/14
CPC分类号： G06F11/141 , G06F11/10
摘要： A more secure method for selecting and addressing individual integrated circuit chips and memory locations, registers or input/output ports within the chips includes supplying the chips with address information including address checking information, checking the address information actually received in the chip by using an address checking circuit in the integrated circuit, and inhibiting use of the address information in the chip when the address checking circuit indicates an erroneous address. By inhibiting the use of erroneous address information, state information stored in the integrated circuit is not lost. The integrated circuit sends a fault signal requesting retransmission of the address information for recovery from the address fault. Preferably the address checking information is an error detecting and correcting code for correcting single-bit errors and detecting double-bit errors. Then the integrated circuit functions properly with one defective address input.
摘要翻译：用于选择和寻址芯片内的各个集成电路芯片和存储器位置，寄存器或输入/输出端口的更安全的方法包括向芯片提供包括地址检查信息的地址信息，通过使用地址检查芯片中实际接收的地址信息检查电路，并且当地址检查电路指示错误地址时，禁止使用芯片中的地址信息。通过禁止使用错误的地址信息，不会丢失存储在集成电路中的状态信息。集成电路从地址故障发送请求重发地址信息以进行恢复的故障信号。优选地址检查信息是用于校正单位错误并检测双位错误的错误检测和校正码。然后集成电路正常工作，并有一个缺陷地址输入。

33. 发明申请

US20120113711A1 Using A Bit Specific Reference Level To Read A Memory 有权
标题翻译：使用位特定参考电平读取存储器
公开(公告)号：US20120113711A1
公开(公告)日：2012-05-10
申请号：US13353531
申请日：2012-01-19
申请人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
发明人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
IPC分类号： G11C11/00 , G11C5/14 , G11C7/06
CPC分类号： G11C7/14 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C2013/0054
摘要： A voltage derived from accessing a selected bit using one read current may be utilized to read a selected bit of an untriggered phase change memory after the read current is changed. As a result, different reference voltages may be used to sense the state of more resistive versus a less resistive selected cells. The resulting read window or margin may be improved in some embodiments,
摘要翻译：在读取电流改变之后，可以利用使用一个读取电流访问所选位的电压来读取未触发的相变存储器的选定位。因此，可以使用不同的参考电压来感测比较阻性的选择的单元更多的电阻的状态。在一些实施例中，可以改善所得到的读取窗口或边缘，

34. 发明授权

US08116159B2 Using a bit specific reference level to read a resistive memory 有权
标题翻译：使用特定的参考电平读取电阻性存储器
公开(公告)号：US08116159B2
公开(公告)日：2012-02-14
申请号：US11093877
申请日：2005-03-30
申请人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
发明人： Tyler Lowrey , Ward D. Parkinson , Ferdinando Bedeschi , Claudio Resta , Roberto Gastaldi , Giulio Casagrande
IPC分类号： G11C7/14
CPC分类号： G11C7/14 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C2013/0054
摘要： A voltage derived from accessing a selected bit using one read current may be utilized to read a selected bit of an untriggered phase change memory after the read current is changed. As a result, different reference voltages may be used to sense the state of more resistive versus a less resistive selected cells. The resulting read window or margin may be improved in some embodiments.
摘要翻译：在读取电流改变之后，可以利用使用一个读取电流访问所选位的电压来读取未触发的相变存储器的选定位。因此，可以使用不同的参考电压来感测比较阻性的选择的单元更多的电阻的状态。在一些实施例中，可以改善所得到的读取窗口或边缘。

35. 发明授权

US08098512B2 Reading phase change memories 有权
标题翻译：阅读相变记忆
公开(公告)号：US08098512B2
公开(公告)日：2012-01-17
申请号：US13072911
申请日：2011-03-28
申请人： Ward D. Parkinson , Giulio Casagrande , Claudio Resta , Roberto Gastaldi , Ferdinando Bedeschi
发明人： Ward D. Parkinson , Giulio Casagrande , Claudio Resta , Roberto Gastaldi , Ferdinando Bedeschi
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C11/5678 , G11C13/0004 , G11C13/003 , G11C2013/0045 , G11C2013/0054 , G11C2013/0066 , G11C2213/75 , G11C2213/76
摘要： A read current high enough to threshold a phase change memory element may be used to read the element without thresholding the memory element. The higher current may improve performance in some cases. The memory element does not threshold because the element is read and the current stopped prior to triggering the memory element.
摘要翻译：可以使用高达阈值相变存储器元件的读取电流来读取元件而不对存储元件进行阈值化。在某些情况下，较高的电流可能会改善性能。由于读取元素并且在触发存储器元件之前停止了当前存储器元件，因此存储器元件不会被阈值。

36. 发明授权

US07590918B2 Using a phase change memory as a high volume memory 有权
标题翻译：使用相变存储器作为高容量存储器
公开(公告)号：US07590918B2
公开(公告)日：2009-09-15
申请号：US10939273
申请日：2004-09-10
申请人： Ward D. Parkinson
发明人： Ward D. Parkinson
IPC分类号： H03M13/00
CPC分类号： G06F11/106 , G11C13/0004 , G11C2213/72 , G11C2213/79
摘要： A phase change memory may be utilized in place of more conventional, higher volume memories such as static random access memory, flash memory, or dynamic random access memory. To account for the fact that the phase change memory is not yet a high volume technology, an error correcting code may be incorporated. The error correcting code may be utilized in ways which do not severely negatively impact read access times, in some embodiments.
摘要翻译：可以使用相变存储器代替更传统的更高容量的存储器，例如静态随机存取存储器，闪速存储器或动态随机存取存储器。为了说明相变存储器还不是高容量技术的事实，可以并入纠错码。在一些实施例中，错误校正码可以以不严重不利地影响读访问时间的方式来使用。

37. 发明授权

US5555429A Multiport RAM based multiprocessor 失效
公开(公告)号：US5555429A
公开(公告)日：1996-09-10
申请号：US437447
申请日：1995-05-08
申请人： Ward D. Parkinson , William K. Waller , Mirmajid Seyyedy
发明人： Ward D. Parkinson , William K. Waller , Mirmajid Seyyedy
IPC分类号： G06F15/78 , G06F15/80 , G06F15/16
CPC分类号： G06F15/8015 , G06F15/7821 , G06F15/7896
摘要： Presented is an integrated circuit chip including a random access memory (RAM) array, serial access memory (SAM), an arithmetic logic unit, a bidirectional shift register, and masking circuitry. The arithmetic logic unit, SAM, shift register, and masking circuitry are all as wide as one side of the RAM array, and are all communicable with each other via data transfer means. This allows wide word processing, user configurable for parallel processing. Bits masked by the masking circuitry are selectable by data in the bidirectional shift register, providing shiftable masking means. Random access and serial access are done through separate ports. The bidirectional shift register is optionally serially accessible. Methods of use are also presented.

38. 发明授权

US5042011A Sense amplifier pulldown device with tailored edge input 失效
标题翻译：感应放大器下拉装置，具有定制的边缘输入
公开(公告)号：US5042011A
公开(公告)日：1991-08-20
申请号：US355299
申请日：1989-05-22
申请人： Stephen L. Casper , Ward D. Parkinson
发明人： Stephen L. Casper , Ward D. Parkinson
IPC分类号： G11C7/06 , G11C11/4091
CPC分类号： G11C11/4091 , G11C7/065
摘要： A tailored edge rate triggers a pulldown device which turns on a sense amplifier in a memory array to sense and amplify a voltage difference between two digit lines, facilitating a memory cell read operation. The tailored edge rate activates the pulldown device slowly at first, then quickly saturates it, to allow transistors in the sense amplifier to activate and quickly sense the digit lines without bouncing same.
摘要翻译：定制的边沿速率触发下拉器件，其导通存储器阵列中的读出放大器以感测和放大两个数字线之间的电压差，便于存储器单元读取操作。首先，定制的边沿速率缓慢启动下拉设备，然后快速饱和，以允许读出放大器中的晶体管激活并快速感测数字线而不会弹跳。

39. 发明授权

US4223238A Integrated circuit substrate charge pump 失效
标题翻译：集成电路基板电荷泵
公开(公告)号：US4223238A
公开(公告)日：1980-09-16
申请号：US934642
申请日：1978-08-17
申请人： Ward D. Parkinson , Walter C. Seelbach
发明人： Ward D. Parkinson , Walter C. Seelbach
IPC分类号： G05F3/20 , H03K1/02 , H03K1/12 , H03K3/26 , H03K3/64
CPC分类号： G05F3/205
摘要： An integrated circuit is disclosed which includes a charge pump adapted for biasing the substrate of a monolithic integrated circuit containing bipolar transistors. An oscillator operating under the control of a control input provides pulsed output signals for driving a diode-capacitor voltage multiplier network which generates a substrate bias voltage. A feedback network including a zener diode senses the substrate voltage, and switching action of the zener diode operates to selectively enable and disable the oscillator for regulating the substrate bias voltage.
摘要翻译：公开了一种集成电路，其包括适于偏置包含双极晶体管的单片集成电路的衬底的电荷泵。在控制输入的控制下工作的振荡器提供脉冲输出信号，用于驱动产生衬底偏置电压的二极管 - 电容器电压倍增器网络。包括齐纳二极管的反馈网络感测衬底电压，并且齐纳二极管的开关动作用于选择性地使能和禁止用于调节衬底偏置电压的振荡器。

40. 发明授权

US08427862B2 Reading a phase change memory 有权
公开(公告)号：US08427862B2
公开(公告)日：2013-04-23
申请号：US13295334
申请日：2011-11-14
申请人： Ward D. Parkinson
发明人： Ward D. Parkinson
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C7/062 , G11C7/067 , G11C13/0004 , G11C13/0033 , G11C13/004 , G11C13/0069 , G11C16/3431 , G11C2013/0047 , G11C2013/0054 , G11C2213/76
摘要： A phase change memory cell may be read by driving a current through the cell higher than its threshold current. A voltage derived from the selected column may be utilized to read a selected bit of a phase change memory. The read window or margin may be improved in some embodiments. A refresh cycle may be included at periodic intervals.

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