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31. 发明授权

US07444540B2 Memory mirroring apparatus and method 有权
标题翻译：内存镜像设备和方法
公开(公告)号：US07444540B2
公开(公告)日：2008-10-28
申请号：US11158187
申请日：2005-06-21
申请人： Mark Shaw
发明人： Mark Shaw
IPC分类号： G06F11/00
CPC分类号： G06F11/1666 , G06F11/10 , G06F11/167 , G06F11/2056
摘要： Various systems and methods are provided for memory mirroring. In one embodiment, a mirror memory is provided having a memory fully buffered controller, the memory fully buffered controller being configured to facilitate access to a plurality of memories in the mirror memory by a central processing unit (CPU). A primary memory link interface configured to couple to a primary memory is provided in the memory fully buffered controller. The memory fully buffered controller further comprises first error logic configured to detect whether a first data error exists in a first data output from the primary memory, and second error logic configured to detect whether a second data error exists in a second data output from the mirror memory. The memory fully buffered controller also comprises selection logic that selects one of the first data output or the second data output to be applied to the CPU.
摘要翻译：提供了各种用于存储器镜像的系统和方法。在一个实施例中，提供具有存储器完全缓冲的控制器的镜像存储器，所述存储器完全缓冲控制器被配置为便于通过中央处理单元（CPU）访问镜像存储器中的多个存储器。配置为耦合到主存储器的主存储器链路接口被提供在存储器完全缓冲的控制器中。所述存储器完全缓冲控制器还包括被配置为检测在从所述主存储器输出的第一数据中是否存在第一数据错误的第一错误逻辑，以及被配置为检测从所述镜的第二数据输出中是否存在第二数据错误的第二错误逻辑记忆。存储器完全缓冲控制器还包括选择逻辑，其选择要应用于CPU的第一数据输出或第二数据输出之一。

32. 发明申请

US20080256379A1 Clock architecture for multi-processor systems 有权
标题翻译：多处理器系统的时钟架构
公开(公告)号：US20080256379A1
公开(公告)日：2008-10-16
申请号：US11786125
申请日：2007-04-11
申请人： Rangaswamy Arumugham , Mark Shaw , Russ W. Herrell , Lisa Pallotti
发明人： Rangaswamy Arumugham , Mark Shaw , Russ W. Herrell , Lisa Pallotti
IPC分类号： G06F1/06
CPC分类号： G06F1/10
摘要： In one embodiment, a computer system, comprises at least a first computing cell and a second computing cell, each computing cell comprising at least one processor, a routing device to couple the first and second computing cells, a global clock signal source coupled to the at least two computing cells to generate a global clock signal, at least one timing manager to generate a timing control signal, wherein the at least two computing cells comprise a local oscillator to generate a local clock signal, and a multiplexer coupled to receive the global clock signal, the local clock signal, and the timing control signal, and to output one of the global clock signal or the local clock signal in response to the control signal.
摘要翻译：在一个实施例中，计算机系统至少包括第一计算单元和第二计算单元，每个计算单元包括至少一个处理器，耦合第一和第二计算单元的路由设备，耦合到第一计算单元的全局时钟信号源至少两个计算单元以产生全局时钟信号，至少一个定时管理器产生定时控制信号，其中所述至少两个计算单元包括本地振荡器以产生本地时钟信号，以及多路复用器，用于接收全局时钟信号时钟信号，本地时钟信号和定时控制信号，并且响应于控制信号输出全局时钟信号或本地时钟信号之一。

33. 发明申请

US20080164543A1 Package, in particular for MEMS devices and method of making same 有权
标题翻译：封装，特别是MEMS器件及其制造方法
公开(公告)号：US20080164543A1
公开(公告)日：2008-07-10
申请号：US12006709
申请日：2008-01-04
申请人： Federico Giovanni Ziglioli , Fulvio Vittorio Fontana , Mark Shaw
发明人： Federico Giovanni Ziglioli , Fulvio Vittorio Fontana , Mark Shaw
IPC分类号： H01L29/84 , H01L23/055 , H01L21/52
CPC分类号： B81B7/0061 , B81B7/007 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/056 , H01L2224/16225 , H01L2224/48091 , H01L2924/00014 , H01L2924/1461 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the passing opening. A protective package incorporates the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device exposed through the passing opening of the substrate.
摘要翻译：封装包括设置有通孔的基板和MEMS器件。 MEMS器件包括有源表面，其中MEMS器件的一部分对流体的化学/物理变化是敏感的。 MEMS器件的有源表面面向衬底并与其间隔开，敏感部分与通过开口对准。保护性封装包括MEMS器件和衬底，至少留下MEMS器件的敏感部分通过衬底的通过开口暴露。

34. 发明申请

US20080141460A1 MATTRESS MONITORING SYSTEM 审中-公开
标题翻译： MATTRESS监测系统
公开(公告)号：US20080141460A1
公开(公告)日：2008-06-19
申请号：US12021724
申请日：2008-01-29
申请人： Mark Shaw
发明人： Mark Shaw
IPC分类号： A61G7/00 , G06F19/00
CPC分类号： A61G7/05776 , A61G2203/12 , G16H40/20 , G16H40/63
摘要： A system for monitoring a mattress controller including a portable monitor having a memory, an input/output node in selective communication with the mattress controller, a processor programmed to maintain in the memory a data structure including a control data associated with the mattress controller, and selectively link with the mattress controller to communicate with the mattress controller to confirm or update the control data.
摘要翻译：一种用于监测床垫控制器的系统，包括具有存储器的便携式监视器，与床垫控制器选择性通信的输入/输出节点，被编程为在存储器中维护包括与床垫控制器相关联的控制数据的数据结构的处理器，以及选择性地与床垫控制器链接以与床垫控制器通信以确认或更新控制数据。

35. 发明申请

US20080077840A1 MEMORY SYSTEM AND METHOD FOR STORING AND CORRECTING DATA 审中-公开
标题翻译：用于存储和校正数据的存储系统和方法
公开(公告)号：US20080077840A1
公开(公告)日：2008-03-27
申请号：US11535776
申请日：2006-09-27
申请人： Mark Shaw , Larry J. Thayer
发明人： Mark Shaw , Larry J. Thayer
IPC分类号： G11C29/00
CPC分类号： G06F11/1048 , G11C29/70
摘要： A data memory system is provided which includes a plurality of first data storage devices, at least two second data storage devices, and a third data storage device. The plurality of first data storage devices is configured to store first data. The second data storage devices are configured to store error correction data. Also included in the system is a control circuit configured to generate the error correction data using the first data, correct errors in the first data using the error correction data, and replace one of the plurality of first data storage devices or one of the at least two second data storage devices with the third data storage device.
摘要翻译：提供一种包括多个第一数据存储装置，至少两个第二数据存储装置和第三数据存储装置的数据存储器系统。多个第一数据存储装置被配置为存储第一数据。第二数据存储设备被配置为存储纠错数据。还包括在系统中的控制电路被配置为使用第一数据生成纠错数据，使用纠错数据校正第一数据中的错误，并且替换多个第一数据存储装置中的一个或者至少具有第三数据存储设备的两秒数据存储设备。

36. 发明授权

US07292150B2 Patient monitoring system 有权
标题翻译：病人监护系统
公开(公告)号：US07292150B2
公开(公告)日：2007-11-06
申请号：US11112466
申请日：2005-04-22
申请人： Mark Shaw
发明人： Mark Shaw
IPC分类号： G08B23/00 , G08B13/12 , A61B5/00
CPC分类号： A61B5/6804 , A61B5/0002 , A61B5/1113 , Y10T24/3448
摘要： A method is described for attaching a monitoring device to a patient comprising providing a fastener having a frame defining an opening adapted to receive a reel in a button hole fashion; inserting the reel behind a portion of the patient's clothing; positioning the frame on the opposite side of the portion of the patient's clothing relative to the reel and inserting the reel into the opening trapping the portion of material between the reel and the frame; and attaching the monitoring device to the fastener by a tether.
摘要翻译：描述了一种用于将监测装置附接到患者的方法，包括提供紧固件，所述紧固件具有限定适于以按钮孔方式接纳卷轴的开口的框架; 将卷轴插入患者衣物的一部分后面; 将框架相对于卷轴定位在患者衣物部分的相对侧上，并将卷轴插入将材料部分收集在卷轴和框架之间; 以及通过绳索将监视装置附接到紧固件。

37. 发明申请

US20070091335A1 Gamut boundary mapping 审中-公开
标题翻译：色域边界映射
公开(公告)号：US20070091335A1
公开(公告)日：2007-04-26
申请号：US11254378
申请日：2005-10-20
申请人： Mark Shaw , Huanzhao Zeng , Di-Yuan Tzeng
发明人： Mark Shaw , Huanzhao Zeng , Di-Yuan Tzeng
IPC分类号： G03F3/08
CPC分类号： H04N1/6058
摘要： Methods, computer readable media, application specific integrated circuits (ASICs) and computing devices including program instructions are provided for gamut boundary mapping. One method embodiment includes defining a region of interest inside a color exchange space by a region boundary, which is formed, at least in part, by a gamut boundary for an output device and an inflated gamut boundary. The method also includes providing a table for converting data from the color exchange space to a physical color space for the output device. In this method, at least a portion of the table is generated by using a first set of nodes sampled inside the gamut boundary and a second set of nodes sampled inside the region of interest and clipped to the inflated gamut boundary.
摘要翻译：提供了用于色域边界映射的方法，计算机可读介质，专用集成电路（ASIC）和包括程序指令的计算设备。一个方法实施例包括通过区域边界在颜色交换空间内定义感兴趣区域，区域边界至少部分地由输出设备的色域边界和充气色域边界形成。该方法还包括提供用于将来自颜色交换空间的数据转换为用于输出设备的物理颜色空间的表格。在该方法中，通过使用在色域边界内采样的第一组节点和在感兴趣区域内采样的第二组节点来生成表的至少一部分，并被限制到充气的色域边界。

38. 发明申请

US20060218348A1 System and method for multiple cache-line size communications 失效
标题翻译：用于多个高速缓存行大小通信的系统和方法
公开(公告)号：US20060218348A1
公开(公告)日：2006-09-28
申请号：US11085883
申请日：2005-03-22
申请人： Mark Shaw , Gary Gostin , Lisa Pallotti
发明人： Mark Shaw , Gary Gostin , Lisa Pallotti
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F13/4022 , G06F12/0886 , G06F2212/601
摘要： A system and method for facilitating communications between a plurality of devices that communicate using different cache-line sizes are disclosed. Briefly described, in architecture, one exemplary embodiment of a compatible cache-line communication system employs a plurality of first ports, each first port configured to receive communications from a first type of device that uses a first cache-line size; and a plurality of second ports, each second port configured to receive communications from a second type of device that uses a second cache-line size, such that communications between the first type of devices are enabled over a plurality of first routes, such that communications between the second type of devices are enabled over a plurality of second routes, and such that communications between the first type of devices and the second type of devices are disabled.
摘要翻译：公开了一种用于促进使用不同高速缓存行大小进行通信的多个设备之间的通信的系统和方法。简要描述，在架构中，兼容高速缓存行通信系统的一个示例性实施例采用多个第一端口，每个第一端口被配置为从使用第一高速缓存行大小的第一类型的设备接收通信; 以及多个第二端口，每个第二端口被配置为从使用第二高速缓存行大小的第二类型的设备接收通信，使得第一类型的设备之间的通信在多个第一路由上被启用，使得通信在第二类型的设备之间通过多个第二路由启用，并且使得第一类型的设备和第二类型的设备之间的通信被禁用。

39. 发明申请

US20060149873A1 Bus isolation apparatus and method 审中-公开
标题翻译：总线隔离装置及方法
公开(公告)号：US20060149873A1
公开(公告)日：2006-07-06
申请号：US11028926
申请日：2005-01-04
申请人： Brad Underwood , Kevin Egan , Mark Shaw
发明人： Brad Underwood , Kevin Egan , Mark Shaw
IPC分类号： G06F13/00
CPC分类号： G06F13/4027
摘要： A system includes a bus isolation component having plural ports and enable inputs to enable respective ports, and bus devices connected to respective ports. Each bus device has logic to provide an enable signal to a respective enable input of the bus isolation component. The port of the bus isolation component connected to a respective bus device is disabled until the logic in the respective bus device activates the enable signal to the respective enable input of the bus isolation component.
摘要翻译：系统包括具有多个端口的总线隔离组件和使能输入以实现相应端口以及连接到相应端口的总线设备。每个总线装置具有向总线隔离部件的相应使能输入提供使能信号的逻辑。连接到相应总线设备的总线隔离组件的端口被禁用，直到相应总线设备中的逻辑激活到总线隔离组件的相应使能输入的使能信号。

40. 发明申请

US20050225784A1 Method of defining a device color profile for a color output device 有权
标题翻译：定义颜色输出设备的设备颜色配置文件的方法
公开(公告)号：US20050225784A1
公开(公告)日：2005-10-13
申请号：US10820954
申请日：2004-04-07
申请人： Steve Jacob , Mark Shaw
发明人： Steve Jacob , Mark Shaw
IPC分类号： H04N1/56 , H04N1/60
CPC分类号： H04N1/6033 , H04N1/6097
摘要： A method of defining a device color profile is described. The method may include (a) storing a first set of color descriptions, wherein each color description describes a color of a different printed test patch in a first target and includes: (i) a set of color component values defined in an overlapping color space, and (ii) at least one color component cross term; (b) obtaining a second set of color descriptions, wherein each color description in the second set describes a color of a different printed test patch in a second target and includes: (i) a set of color component values defined in the overlapping color space, and (ii) at least one color component cross term; and (c) using the stored first set of color descriptions and the second set of color descriptions to define a device color profile.
摘要翻译：描述了一种定义设备颜色配置文件的方法。该方法可以包括（a）存储第一组颜色描述，其中每个颜色描述描述第一目标中的不同印刷测试贴片的颜色，并且包括：（i）在重叠颜色空间中定义的一组颜色分量值，和（ii）至少一种颜色分量交叉项; （b）获得第二组颜色描述，其中第二组中的每个颜色描述描述第二目标中不同印刷测试片的颜色，并且包括：（i）在重叠颜色空间中定义的一组颜色分量值，和（ii）至少一种颜色分量交叉项; 和（c）使用存储的第一组颜色描述和第二组颜色描述来定义设备颜色配置文件。

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