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31. 发明申请

US20090319504A1 Method and Apparatus for Providing Enhanced Search Results to a User of a Communication Device 审中-公开
标题翻译：用于向通信设备的用户提供增强搜索结果的方法和装置
公开(公告)号：US20090319504A1
公开(公告)日：2009-12-24
申请号：US12141359
申请日：2008-06-18
申请人： William P. Alberth, JR. , Steven F. Gillig
发明人： William P. Alberth, JR. , Steven F. Gillig
IPC分类号： G06F7/10 , G06F17/30
CPC分类号： G06F16/24575
摘要： A method and apparatus of a wireless communication system for providing enhanced search results to a user. The method includes monitoring data communication on a user device, determining at least one contextual datum from at least a portion of the monitored data based on a predetermined rule; and generating a search result by applying the determined contextual datum to a search application.
摘要翻译：一种用于向用户提供增强搜索结果的无线通信系统的方法和装置。该方法包括监视用户设备上的数据通信，基于预定规则从所监视的数据的至少一部分确定至少一个上下文数据; 以及通过将确定的上下文数据应用于搜索应用来生成搜索结果。

32. 发明申请

US20080154826A1 MANAGING OPERATION OF A COGNATIVE RADIO BY AN AUTHORITY 有权
标题翻译：管理无效认证的操作
公开(公告)号：US20080154826A1
公开(公告)日：2008-06-26
申请号：US11614424
申请日：2006-12-21
申请人： Charles A. Backof , Steven D. Bromley , John D. Bruner , Lawrence M. Ecklund , Steven F. Gillig , John K. Grosspietsch , Whay Chiou Lee , Scott E. Preece
发明人： Charles A. Backof , Steven D. Bromley , John D. Bruner , Lawrence M. Ecklund , Steven F. Gillig , John K. Grosspietsch , Whay Chiou Lee , Scott E. Preece
IPC分类号： G06N5/02
CPC分类号： H04L41/12 , H04L41/0893 , H04W28/18
摘要： In certain embodiments of a cognitive radio, a method of establishing operational policies, involves determining that a new policy decision should be made; requesting a policy decision from an authority having more computing power than the cognitive radio; receiving the policy decision from the authority; and implementing the policy decision in the cognitive radio. Other embodiments may incorporate more, fewer or other elements.
摘要翻译：在认知无线电的某些实施例中，建立操作策略的方法涉及确定应当作出新的策略决策; 从具有比认知无线电更多的计算能力的机构请求政策决定; 接受当局的政策决定; 并在认知无线电中实施政策决定。其他实施例可以并入更多，更少或其他元件。

33. 发明申请

US20080039105A1 METHOD AND APPARATUS FOR DETERMINING APPROPRIATE CHANNELS FOR COMMUNICATION 有权
标题翻译：用于确定通信的适当通道的方法和装置
公开(公告)号：US20080039105A1
公开(公告)日：2008-02-14
申请号：US11536240
申请日：2006-09-28
申请人： Gregory J. Buchwald , Steven F. Gillig , S. David Silk , Lawrence M. Ecklund , Stephen L. Kuffner
发明人： Gregory J. Buchwald , Steven F. Gillig , S. David Silk , Lawrence M. Ecklund , Stephen L. Kuffner
IPC分类号： H04Q7/20
CPC分类号： H04W72/082 , H04W72/0406 , Y02D70/142 , Y02D70/144
摘要： During operation of a secondary communication system, cells (106) are formed by a plurality of localized nodes (104) to alert other nodes within the cell of frequencies which must be protected or otherwise avoided. All nodes within the cell monitor a differing subset of all frequencies available, and share information with respect to acceptable and protected frequencies with each other via low-power, short-range communication. Each node then forms a list of available channels for communication, and chooses a single node to report this information back to controller.
摘要翻译：在次要通信系统的操作期间，小区（106）由多个本地化节点（104）形成，以警告必须被保护或以其他方式避免的频率小区内的其他节点。小区内的所有节点都监视所有可用频率的不同子集，并通过低功率，短距离通信彼此共享关于可接受和受保护频率的信息。然后，每个节点形成用于通信的可用信道的列表，并且选择单个节点将该信息报告回控制器。

34. 发明授权

US5777521A Parallel accumulator fractional-n frequency synthesizer 失效
$Parallel accumulator fractional-n frequency synthesizer$
标题翻译：并行累加器分数n频率合成器
公开(公告)号：US5777521A
公开(公告)日：1998-07-07
申请号：US910000
申请日：1997-08-12
申请人： Steven F. Gillig , Michael L. Bushman
发明人： Steven F. Gillig , Michael L. Bushman
IPC分类号： H03L7/197
CPC分类号： H03L7/1976
摘要： A frequency synthesizer (10) including a synthesizer loop (12) with a fractional-N divider (14), and including a divider control circuit (18) and a combining circuit (22). The divider control circuit (18) provides a variable divide value (20) to the divider (14). The carry values of two accumulators (24, 26) having differing accumulator lengths are applied in parallel to the combining circuit (22). Each of the accumulators (24, 26) provides a portion of a desired fractional divide value (20). The combining circuit (22) also adds an integer divide value (36) to the fractional divide value (16). By coupling the accumulators (24, 26) in parallel, a high frequency resolution with minimal spurious frequencies is achieved, using a simple, low cost circuit.
摘要翻译：一种频率合成器（10），包括具有分数N分频器（14）的合成器环路（12），并且包括分频器控制电路（18）和组合电路（22）。分频器控制电路（18）向分频器（14）提供可变分频值（20）。具有不同累加器长度的两个累加器（24,26）的进位值并联施加到组合电路（22）。每个累加器（24,26）提供期望的分数除数值（20）的一部分。组合电路（22）还向分数除法值（16）加上整数除数值（36）。通过并联耦合累加器（24,26），使用简单的低成本电路实现具有最小寄生频率的高频分辨率。

35. 发明授权

US5392000A Apparatus and method for frequency compensating an operational amplifier 失效
标题翻译：频率补偿运算放大器的装置和方法
公开(公告)号：US5392000A
公开(公告)日：1995-02-21
申请号：US149683
申请日：1993-11-09
申请人： Steven F. Gillig
发明人： Steven F. Gillig
IPC分类号： H03F3/45 , H03F1/08 , H03F1/42 , H03F1/34
CPC分类号： H03F1/083
摘要： A transimpedance circuit (201), and method therefor, frequency compensates an operational amplifier. The transimpedance circuit (201) has an input terminal (205) coupled to receive an amplified signal (205) and an ouput terminal (206) operative to produce a buffered amplified signal. The input terminal (205) of the transimpedance circuit (201) presents a resistive input impedance to the amplified signal at a frequency substantially near an open loop unity gain frequency of the operational amplifier (200). The amplified signal is buffered from a complex impedance of an input terminal (206) of an output driver (103). The present invention advantageously provides wide bandwidth and stable operation with loads having low complex impedance.
摘要翻译：跨阻抗电路（201）及其方法对运算放大器进行频率补偿。跨阻电路（201）具有耦合以接收放大信号（205）的输入端（205）和可操作地产生缓冲放大信号的输出端（206）。跨导电路（201）的输入端（205）以基本上接近运算放大器（200）的开环单位增益频率的频率向放大信号呈现电阻输入阻抗。放大的信号从输出驱动器（103）的输入端（206）的复阻抗缓冲。本发明有利地提供具有低复数阻抗的负载的宽带宽和稳定的操作。

36. 发明授权

US5375258A Circuit for generating signals in phase quadrature and associated method therefor 失效
标题翻译：用于产生相位正交信号的电路及其相关方法
公开(公告)号：US5375258A
公开(公告)日：1994-12-20
申请号：US986206
申请日：1992-12-07
申请人： Steven F. Gillig
发明人： Steven F. Gillig
IPC分类号： H03B27/00 , H03D7/16 , H04B1/40 , H04B1/52 , H04B1/58
CPC分类号： H03D7/165 , H03B2200/0064 , H03B27/00 , H04B1/408
摘要： A quadrant generator for generating a pair of pulse trains maintained in perfect phase quadrant with one another. The quadrature generator includes a feedback control loop for altering the duty cycle of an oscillating signal applied to a master-slave flip-flop pair configured to generate a pair of pulse trains maintained in a relative phase relationship. The feedback control loop controls the duty cycle of the oscillating signal applied to the master-slave flip-flop pair which, in turn, is determinative of the phase relationship between the pulse train pair generated by the master-slave flip-flop pair. When the pulse trains generated by the flip-flop pair are beyond phase quadrature, a control signal generated by the feedback control loop alters the duty cycle of the oscillating signal applied to the flip-flop pair to alter the phase relationship between the pulse trains of the pulse train pair.
摘要翻译：一个象限发生器，用于产生彼此保持完美相位象限的一对脉冲串。正交发生器包括用于改变施加到主从触发器对的振荡信号的占空比的反馈控制环路，所述主从触发器对被配置为生成以相对相位关系维持的一对脉冲串。反馈控制环路控制施加到主从触发器对的振荡信号的占空比，其又决定由主从触发器对产生的脉冲串对之间的相位关系。当触发器对产生的脉冲串超出相位正交时，由反馈控制环路产生的控制信号改变施加到触发器对的振荡信号的占空比，以改变脉冲串的脉冲串之间的相位关系脉冲列对。

37. 发明授权

US5142696A Current mirror having increased output swing 失效
标题翻译：电流镜具有增加的输出摆幅
公开(公告)号：US5142696A
公开(公告)日：1992-08-25
申请号：US686213
申请日：1991-04-16
申请人： Jeannie H. Kosiec , Steven F. Gillig
发明人： Jeannie H. Kosiec , Steven F. Gillig
IPC分类号： G05F3/26
CPC分类号： G05F3/267 , G05F3/262
摘要： A current mirror having improved turn-on and turn-off characteristics capable of operation an expanded voltage range. A cascode circuit comprising a portion of the current mirror is of a high characteristic impedance to increase thereby the voltages over which the current mirror may generate a constant current output. A switching circuit comprised of tandemly-positioned transistors having differing transistor characteristics decreases the transistor turn-on and turn-off times to enhance the characteristics of the current mirror.
摘要翻译：具有能够操作扩展电压范围的具有改进的导通和关断特性的电流镜。包括电流镜的一部分的共源共栅电路具有高特性阻抗，从而增加电流镜可以产生恒定电流输出的电压。由串联位置的具有不同晶体管特性的晶体管组成的开关电路减小了晶体管导通和关断时间，以增强电流镜的特性。

38. 发明授权

US4885553A Continuously adaptive phase locked loop synthesizer 失效
标题翻译：连续自适应锁相环合成器
公开(公告)号：US4885553A
公开(公告)日：1989-12-05
申请号：US278052
申请日：1988-11-30
申请人： Alexander W. Hietala , Steven F. Gillig
发明人： Alexander W. Hietala , Steven F. Gillig
IPC分类号： H03L7/18 , H03L7/089 , H03L7/10 , H03L7/107 , H03L7/183
CPC分类号： H03L7/183 , H03L7/0891
摘要： A continuously adaptive phase locked loop synthesizer is disclosed in which error correction pulses from a phase detector are separated into narrow pulse width and wide pulse width pulses. The wide pulse width pulses are coupled to the loop filter to enable a rapid charge of the loop filter to provide a VCO control voltage on a control line connected to the output of the loop filter. The narrow pulse width pulses are filtered by a narrow bandwidth filter before being applied to the loop filter thus enabling a slow charge of the loop filter. The narrow bandwidth filter is decoupled from the control line but referenced to the control line voltage.
摘要翻译：公开了一种连续自适应锁相环合成器，其中来自相位检测器的纠错脉冲被分成窄脉冲宽度和宽脉冲宽度脉冲。宽脉冲宽度脉冲耦合到环路滤波器，以使得环路滤波器能够快速充电，以在连接到环路滤波器的输出的控制线上提供VCO控制电压。窄脉冲宽度脉冲在施加到环路滤波器之前被窄带宽滤波器滤波，从而实现环路滤波器的慢速充电。窄带宽滤波器与控制线分离，但参考控制线电压。

39. 发明授权

US4455534A Multi-state control circuitry 失效
标题翻译：多状态控制电路
公开(公告)号：US4455534A
公开(公告)日：1984-06-19
申请号：US316619
申请日：1981-10-30
申请人： Steven F. Gillig
发明人： Steven F. Gillig
IPC分类号： H03F3/72 , H03G1/00 , H03G3/34 , H03F1/14
CPC分类号： H03G3/34 , H03F3/72 , H03G1/0088
摘要： Multi-state control circuitry is described that can selectively couple an input signal to the positive and negative inputs of an operational amplifier depending on the voltage of a control signal. The input signal is coupled to the operational amplifier by a switch, which is enabled or disabled by the output of a voltage detector. The voltage detector enables the switch when the voltage of the control signal is less than a threshold voltage, and disables the switch when the voltage of the control signal is greater than the threshold voltage. The amplification of the operational amplifier is switched between +1 and -1 by selectively coupling a DC voltage to the positive input of the operation amplifier, depending on the current of the control signal. The DC voltage is coupled to the positive input of the operational amplifier by a second switch, which is enabled or disabled by a current detector. The current detector enables the second switch when the current of the control signal is less than a threshold current, and disables the second switch when the current of the control signal is greater than the threshold current.
摘要翻译：描述了多状态控制电路，其可以根据控制信号的电压将输入信号选择性地耦合到运算放大器的正和负输入。输入信号通过开关耦合到运算放大器，开关由电压检测器的输出使能或禁止。当控制信号的电压小于阈值电压时，电压检测器使能开关，并且当控制信号的电压大于阈值电压时禁止开关。根据控制信号的电流，通过选择性地将DC电压耦合到运算放大器的正输入，运算放大器的放大在+1和-1之间切换。 DC电压通过第二开关耦合到运算放大器的正输入端，该第二开关由电流检测器使能或禁止。当控制信号的电流小于阈值电流时，电流检测器使能第二开关，并且当控制信号的电流大于阈值电流时，电流检测器禁用第二开关。

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