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    • 34. 发明授权
    • Hard disk controller which coordinates transmission of buffered data with a host
    • 与主机协调传输缓冲数据的硬盘控制器
    • US08127089B1
    • 2012-02-28
    • US12030173
    • 2008-02-12
    • Huy NguyenWilliam WongKha Nguyen
    • Huy NguyenWilliam WongKha Nguyen
    • G06F12/00
    • G06F5/065G06F3/061G06F3/0659G06F3/0674
    • The transmission of buffered data is coordinated between a storage medium and a host in response to a request from the host. One or more blocks of data are transferred from the storage medium to a buffer memory. One or more frames of data are transmitted from the buffer memory to the host, wherein the number of blocks ending in the frame is recorded in a blocks/frame register, and possibly also in a block count accumulator register. Buffer release pulses for releasing buffer space in memory are sent to the buffer memory, based on the number of blocks in the blocks/frame register, or the number of blocks accumulated in the block count accumulator register when a signal is received from the host. A pointer which points to the last block of data successfully transferred is updated in accordance with the buffer release pulses.
    • 响应于来自主机的请求,缓冲数据的传输在存储介质和主机之间协调。 一个或多个数据块从存储介质传送到缓冲存储器。 一个或多个数据帧从缓冲存储器发送到主机,其中以帧结束的块的数量被记录在块/帧寄存器中,并且还可能被记录在块计数累加器寄存器中。 基于块/帧寄存器中的块数或从主机接收到信号时累积在块计数累加器寄存器中的块的数量,将用于释放存储器中的缓冲器空间的缓冲器释放脉冲发送到缓冲存储器。 根据缓冲器释放脉冲更新指向成功传送的最后数据块的指针。
    • 36. 发明申请
    • Data transmission and rendering techniques implemented over a client-server system
    • 通过客户端 - 服务器系统实现的数据传输和渲染技术
    • US20110047210A1
    • 2011-02-24
    • US12925669
    • 2010-10-27
    • Narasimha Rao PailaAjit Ramachandra MayyaHuy NguyenShannon Norrell
    • Narasimha Rao PailaAjit Ramachandra MayyaHuy NguyenShannon Norrell
    • G06F15/16G06F3/048
    • H04L67/42G06F9/45512G06F17/2247G06Q30/0609G06Q30/0611H04L67/02H04L67/34
    • A technique is disclosed for generating formatted information for display on a computing device. The computing device may be configured to include at least one interface for communicating with a server computing device. A request is sent from the computing device to the server system. According to one embodiment, the request may correspond to an HTTP request for information relating to a specific HTML page or web page. A response is then received from the server system. According to one embodiment, the response includes response information comprising embedded instructions and data. The embedded instructions may include instructions for using the data to generate formatted markup information for display on the computing device. The embedded instructions are then executed on the data to thereby generate formatted markup information for display on the computing device. According to a specific embodiment, the formatted markup information corresponds to HTML data to be rendered for display on the computing device.
    • 公开了一种用于生成用于在计算设备上显示的格式化信息的技术。 计算设备可以被配置为包括用于与服务器计算设备通信的至少一个接口。 请求从计算设备发送到服务器系统。 根据一个实施例,该请求可以对应于与特定HTML页面或网页有关的信息的HTTP请求。 然后从服务器系统接收到响应。 根据一个实施例,响应包括包括嵌入式指令和数据的响应信息。 嵌入式指令可以包括用于使用数据生成用于在计算设备上显示的格式化标记信息的指令。 然后对数据执行嵌入的指令,从而生成用于在计算设备上显示的格式化的标记信息。 根据具体实施例,格式化的标记信息对应于要呈现以用于在计算设备上显示的HTML数据。
    • 38. 发明授权
    • Converter having PWM ramp adjustable in discontinuous mode operation
    • 具有PWM斜坡的转换器可在不连续模式操作中调节
    • US07777469B2
    • 2010-08-17
    • US12165992
    • 2008-07-01
    • Huy Nguyen
    • Huy Nguyen
    • G05F1/652G05F1/656
    • H02M3/158H02M3/156
    • A ramp adjustment circuit for a voltage converter including a gate driver for controlling series connected high- and low-side switches connected across DC voltage and coupled at an output node connected to a load through an inductor such that the converter operates in a continuous conduction mode (CCM) or a discontinuous conduction mode (DCM). The circuit includes a first current generating circuit for providing a first current signal for generating a first ramp signal; a second current generating circuit for providing a second reduced current signal for generating a second ramp signal having a reduced slope when the first current generating circuit is disabled and the second current generating circuit is enabled; and a circuit for enabling the first current generating circuit and disabling the second current generating circuit when the converter is in CCM and enabling the second current generating circuit and disabling the first current generating circuit when the converter is in DCM thereby providing the first current signal when the converter is in CCM to provide the first ramp signal and providing the second reduced current signal when the converter is in DCM to provide the second reduced slope ramp signal.
    • 一种用于电压转换器的斜坡调节电路,包括用于控制连接在直流电压上的串联连接的高侧和低侧开关的栅极驱动器,并且通过电感器耦合到连接到负载的输出节点,使得转换器工作在连续导通模式 (CCM)或不连续导通模式(DCM)。 该电路包括:第一电流产生电路,用于提供用于产生第一斜坡信号的第一电流信号; 第二电流产生电路,用于当第一电流产生电路被禁用并且第二电流产生电路被使能时,提供用于产生具有减小的斜率的第二降压信号; 以及电路,用于使能第一电流产生电路并且当转换器处于CCM时禁用第二电流产生电路,并且当转换器在DCM中时使能第二电流产生电路并禁用第一电流产生电路,从而当第一电流产生电路提供第一电流信号时, 转换器处于CCM中以提供第一斜坡信号,并且当转换器在DCM中时提供第二减小电流信号以提供第二降低斜率斜坡信号。
    • 39. 发明授权
    • Enclosure system for a portable electronic device
    • 便携式电子设备的外壳系统
    • US07688581B1
    • 2010-03-30
    • US10925771
    • 2004-08-24
    • Lawrence LamHuy Nguyen
    • Lawrence LamHuy Nguyen
    • H05K5/00
    • G06F1/1626G06F2200/1633
    • A mechanism for protecting a portable electronic device, e.g., a handheld computer system. In one embodiment, the present invention is comprised of an encasing structure having an opening and configured to receive and have disposed therewithin the handheld computer system. The present invention is further comprised of a lifting device coupled to the encasing structure. The lifting device is adapted to raise the handheld computer system above the confines of the encasing structure and further adapted to lower the handheld computer system to a disposition therewithin the encasing structure. The encasing structure can be used to protect input/output ports or slots, I/Os externally disposed on side surfaces of the handheld computer system when the handheld computer system is disposed within the encasing structure, and the lifting device enables raising the handheld computer system above the confines of the encasing structure to provide access to the I/Os. In one embodiment, a push-push hinge can be utilized as the lifting device.
    • 一种用于保护便携式电子设备(例如手持式计算机系统)的机构。 在一个实施例中,本发明包括具有开口并被配置为容纳并且设置在手持计算机系统中的封装结构。 本发明还包括联接到包装结构的提升装置。 提升装置适于将手持计算机系统升高到包围结构的限制之上,并且还适于将手持式计算机系统降低到其中的包围结构中的配置。 当手持式计算机系统设置在封装结构内时,封装结构可用于保护输入/输出端口或插槽,外部设置在手持计算机系统的侧表面上的I / O,并且提升装置能够提升手持式计算机系统 高于封装结构的限制,以提供对I / O的访问。 在一个实施例中,可以使用推 - 推铰链作为提升装置。
    • 40. 发明授权
    • Wave shaping output driver to adjust slew rate and/or pre-emphasis of an output signal
    • 波形整形输出驱动器来调整输出信号的转换速率和/或预加重
    • US07576573B2
    • 2009-08-18
    • US11745917
    • 2007-05-08
    • Huy Nguyen
    • Huy Nguyen
    • H03K3/017
    • H04L25/0286H03K2005/00286H04L25/026H04L25/03834
    • Integrated circuit, system, method and machine readable media embodiments adjust a slew rate and/or a transmit pre-emphasis of an output signal at selected phases during a bit time. A timing circuit provides a plurality of delayed data signals in response to a clock signal. A plurality of adjustable impedance circuits, including a plurality of select circuits, output a plurality of selected delayed data signals to form the output signal having an adjusted slew rate. Delay elements in the timing circuit are also biased from a current of a lock loop circuit to further adjust slew rate of the output signal. Transmit pre-emphasis of the output signal is adjusted by selecting a polarity of a selected delayed data signal in each of the plurality of adjustable impedance circuits. Each adjustable impedance circuit also includes a predriver and driver for adjusting impedance in response to a signal indicating an impedance value. In an embodiment, an integrated circuit is able to operate in multiple modes of operation depending upon the type of output signal, frequency range of the output signal, physical packaging and/or system configuration.
    • 集成电路,系统,方法和机器可读介质实施例在比特时间期间在所选择的相位调整输出信号的转换速率和/或发送预加重。 定时电路响应于时钟信号提供多个延迟的数据信号。 包括多个选择电路的多个可调阻抗电路输出多个所选择的延迟数据信号以形成具有调整压摆率的输出信号。 定时电路中的延迟元件也偏离锁定环电路的电流,以进一步调整输出信号的转换速率。 通过选择多个可调阻抗电路中的每一个中选择的延迟数据信号的极性来调整输出信号的发送预加重。 每个可调阻抗电路还包括预驱动器和驱动器,用于响应于指示阻抗值的信号来调节阻抗。 在一个实施例中,集成电路能够根据输出信号的类型,输出信号的频率范围,物理封装和/或系统配置在多种操作模式下操作。