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31. 发明授权

US08258410B2 Construction of reliable stacked via in electronic substrates—vertical stiffness control method 有权
标题翻译：在电子基板中构建可靠的堆叠通孔 - 垂直刚度控制方法
公开(公告)号：US08258410B2
公开(公告)日：2012-09-04
申请号：US12020534
申请日：2008-01-26
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H05K1/11 , H05K1/09
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes a compliant center zone; and spring-like stiffness-reducing connectors for connecting the compliant center zone of the platted through hole landing.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括支撑多个堆叠的通孔的平板通孔平台。平板通孔着陆包括顺应中心区域; 以及用于连接板状通孔底板的柔性中心区域的弹簧状刚度减小连接器。

32. 发明申请

US20090189289A1 EMBEDDED CONSTRAINER DISCS FOR RELIABLE STACKED VIAS IN ELECTRONIC SUBSTRATES 审中-公开
标题翻译：用于电子基板中的可靠堆叠VIAS的嵌入式约束盘
公开(公告)号：US20090189289A1
公开(公告)日：2009-07-30
申请号：US12020561
申请日：2008-01-27
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H01L23/52 , H01L23/535
CPC分类号： H01L23/49827 , H01L23/49822 , H01L2224/05001 , H01L2224/05008 , H01L2224/05572 , H01L2224/16 , H01L2224/16235 , H01L2924/10253 , H01L2924/15311
摘要： A substrate via structure for stacked vias includes: a plurality of stacked vias, wherein each via is disposed on a landing; and at least one constrainer disc surrounding at least one via, for constraining in-plane deformation of the substrate via structure. The constrainer disc is embedded such that the constrainer disc is disposed between two layers of resin. The constrainer discs may be made of copper. The constrainer disc may be circular or square-shaped. Preferably there is a dielectric gap between the constrainer disc and the via.
摘要翻译：用于堆叠通孔的衬底通孔结构包括：多个堆叠的通孔，其中每个通孔设置在层站上; 以及围绕至少一个通孔的至少一个约束盘，用于限制基板经由结构的平面内变形。约束盘被嵌入，使得约束盘设置在两层树脂之间。约束盘可以由铜制成。约束盘可以是圆形或正方形。优选地，在约束盘和通孔之间存在电介质间隙。

33. 发明授权

US09099458B2 Construction of reliable stacked via in electronic substrates—vertical stiffness control method 有权
标题翻译：在电子基板中构建可靠的堆叠通孔 - 垂直刚度控制方法
公开(公告)号：US09099458B2
公开(公告)日：2015-08-04
申请号：US13539480
申请日：2012-07-01
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H05K1/11 , H05K1/09 , H01L23/498 , H05K3/46 , H05K1/02
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes an etched pattern.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括支撑多个堆叠的通孔的平板通孔平台。镀层通孔着色包括蚀刻图案。

34. 发明授权

US08866026B2 Construction of reliable stacked via in electronic substrates—vertical stiffness control method 有权
标题翻译：在电子基板中构建可靠的堆叠通孔 - 垂直刚度控制方法
公开(公告)号：US08866026B2
公开(公告)日：2014-10-21
申请号：US13569826
申请日：2012-08-08
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H05K1/11 , H05K1/09 , H05K3/46 , H01L23/498 , H05K1/02
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing with a thickness of substantially 3 μm. The platted through hole landing includes an etched pattern and a copper top surface.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括厚度基本为3μm的板状通孔着落。镀层通孔着色包括蚀刻图案和铜顶表面。

35. 发明申请

US20090189290A1 CLUSTERED STACKED VIAS FOR RELIABLE ELECTRONIC SUBSTRATES 有权
标题翻译：用于可靠的电子基板的集成的堆叠VIAS
公开(公告)号：US20090189290A1
公开(公告)日：2009-07-30
申请号：US12020565
申请日：2008-01-27
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H01L23/48 , H01L21/00
CPC分类号： H01L23/49827 , H01L23/498 , H01L23/49838 , H01L2224/05001 , H01L2224/05008 , H01L2224/05572 , H01L2224/16 , H01L2224/16235 , H01L2924/00014 , H01L2924/01078 , H01L2924/10253 , H01L2924/15151 , H01L2924/15311 , H05K1/0222 , H05K1/115 , H05K3/4602 , H05K2201/096 , H05K2201/09609 , Y10T29/49155 , Y10T29/49165 , Y10T29/4919 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599 , H01L2224/05099
摘要： A substrate via structure for stacked vias in a substrate/chip assembly includes: a center via stack and a plurality of stacked vias clustered around the center via stack. In this structure, the center via and the surrounding vias are made of copper. Some of the surrounding vias may be non-functional vias and these may be of a different height than the functional vias.
摘要翻译：用于衬底/芯片组件中的堆叠通孔的衬底通孔结构包括：中心通孔堆叠和多个堆叠的通孔，围绕中心通过堆叠聚集。在这种结构中，中心通孔和周围的通孔由铜制成。一些周围的通孔可以是非功能通孔，并且它们可以具有与功能通孔不同的高度。

36. 发明申请

US20120299195A1 CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD 有权
标题翻译：电子基板可靠堆叠构造 - 纵向硬度控制方法
公开(公告)号：US20120299195A1
公开(公告)日：2012-11-29
申请号：US13569826
申请日：2012-08-08
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing with a thickness of substantially 3 μm. The platted through hole landing includes an etched pattern and a copper top surface.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括厚度基本为3μm的板状通孔着落。镀层通孔着色包括蚀刻图案和铜顶表面。

37. 发明申请

US20120267158A1 CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD 有权
标题翻译：电子基板可靠堆叠构造 - 纵向硬度控制方法
公开(公告)号：US20120267158A1
公开(公告)日：2012-10-25
申请号：US13539480
申请日：2012-07-01
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H05K1/11 , H05K3/00
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes an etched pattern.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括支撑多个堆叠的通孔的平板通孔平台。镀层通孔着色包括蚀刻图案。

38. 发明申请

US20090188705A1 Construction of Reliable Stacked Via in Electronic Substrates - Vertical Stiffness Control Method 有权
标题翻译：电子基板中可靠堆叠通孔的构造 - 垂直刚度控制方法
公开(公告)号：US20090188705A1
公开(公告)日：2009-07-30
申请号：US12020534
申请日：2008-01-26
申请人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
发明人： Karan Kacker , Douglas O. Powell , David L. Questad , David J. Russell , Sri M. Sri-Jayantha
IPC分类号： H05K1/09
CPC分类号： H01L23/49827 , H01L23/49838 , H01L2224/05001 , H01L2224/05548 , H01L2224/05572 , H01L2224/16 , H01L2924/00014 , H01L2924/15311 , H05K1/0271 , H05K1/116 , H05K3/4602 , H05K2201/0347 , H05K2201/09454 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/0969 , Y10T29/49155 , H01L2224/05599 , H01L2224/05099
摘要： A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes a compliant center zone; and spring-like stiffness-reducing connectors for connecting the compliant center zone of the platted through hole landing.
摘要翻译：用于减小垂直刚度的堆叠通孔结构包括：多个堆叠的通孔，每个通孔设置在盘状结构上。盘状结构包括支撑多个堆叠的通孔的平板通孔平台。平板通孔着陆包括顺应中心区域; 以及用于连接板状通孔底板的柔性中心区域的弹簧状刚度减小连接器。

39. 发明申请

US20120309187A1 Conformal Coining of Solder Joints in Electronic Packages 审中-公开
标题翻译：焊接接头在电子封装中的保形压印
公开(公告)号：US20120309187A1
公开(公告)日：2012-12-06
申请号：US13194902
申请日：2011-07-29
申请人： Sri M. Sri-Jayantha , Vijayeshwar D. Khanna
发明人： Sri M. Sri-Jayantha , Vijayeshwar D. Khanna
IPC分类号： H01L21/60
CPC分类号： H01L24/11 , H01L21/4853 , H01L23/145 , H01L23/49816 , H01L23/562 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/1184 , H01L2224/11849 , H01L2224/131 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/10253 , H01L2924/3511 , H01L2924/014 , H01L2924/00
摘要： Thermal deformation of a substrate and the substrate's warp at room temperature are used to determine the expected profile of the substrate at reflow. A contact surface profile of a coining pressure plate is selected based on the expected substrate profile. A solder surface is shaped on the substrate or a die to be joined to the substrate by the coining pressure plate, thereby facilitating the chip-joining process.
摘要翻译：使用基板的热变形和基板在室温下的翘曲来确定基板在回流时的预期分布。基于预期的基底轮廓来选择压印压板的接触表面轮廓。焊料表面通过压印压力板在基板上或模具上成形，从而便于芯片接合工艺。

40. 发明申请

US20080180914A1 INTEGRATED HEAT SPREADER AND EXCHANGER 失效
标题翻译：集成热交换器和交换机
公开(公告)号：US20080180914A1
公开(公告)日：2008-07-31
申请号：US11668097
申请日：2007-01-29
申请人： Vijayeshwar D. Khanna , Alok K. Lohia , Gerard McVicker , Sri M. Sri-Jayantha
发明人： Vijayeshwar D. Khanna , Alok K. Lohia , Gerard McVicker , Sri M. Sri-Jayantha
IPC分类号： H05K7/20
CPC分类号： H01L23/473 , H01L2924/0002 , Y10T29/4935 , H01L2924/00
摘要： Disclosed is an integrated active heat spreader and exchanger. The heat spreader cum exchanger includes a housing with a conductive heat spreader therein. A spreader plate of the heat spreader is in thermal contact with a microprocessor chip to be cooled and a plurality of spreader fins extending from the spreader plate. A membrane connects the heat spreader and the housing, sealing an interface between the heat spreader and the housing. A top plate, including a plurality of top plate fins, is disposed in the housing. A pump is located between the top plate fins and the spreader fins and urges fluid across the spreader fins and conducts heat from the spreader fins. The top plate fins conduct heat from the fluid and into a heat sink in thermal contact with the top plate. A heat sink plate conducts heat into heat sink fins where the heat is dissipated.
摘要翻译：公开了一种集成的主动散热器和换热器。散热器暨交换器包括其中具有导电散热器的壳体。散热器的散布板与要冷却的微处理器芯片热接触，并且从扩散板延伸出多个散热片。隔膜连接散热器和外壳，密封散热器和外壳之间的接口。包括多个顶板翅片的顶板设置在壳体内。泵位于顶板翅片和扩散器翅片之间，并且促使流体跨越扩散器翅片并且从扩散器翅片传导热量。顶板翅片从流体传导热量并进入与顶板热接触的散热器。散热片将散热片散热到散热片散热片。

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