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31. 发明申请

US20100313084A1 SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：半导体存储设备
公开(公告)号：US20100313084A1
公开(公告)日：2010-12-09
申请号：US12529282
申请日：2008-09-22
申请人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
发明人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
IPC分类号： G06F11/07 , G06F11/00
CPC分类号： G06F11/1412 , G06F11/1068 , G06F11/1402 , G06F12/02 , G11C16/0483 , G11C16/3418 , G11C16/3431
摘要： As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.
摘要翻译：作为可以有效地执行刷新操作的半导体存储装置，提供了一种半导体存储装置，其包括以块为单位存储数据的非易失性半导体存储器，该块是数据擦除单元，以及监视数据的错误计数的控制单元存储在从所述块中选择的监视块和所述监视块中的刷新数据中，其中所述错误计数等于或大于阈值。

32. 发明申请

US20100037012A1 Semiconductor Storage Device, Method of Controlling the Same, Controller and Information Processing Apparatus 失效
标题翻译：半导体存储装置及其控制方法，控制器及信息处理装置
公开(公告)号：US20100037012A1
公开(公告)日：2010-02-11
申请号：US12552461
申请日：2009-09-02
申请人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/02
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second, third and fourth memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the third memory area, a fourth processing for moving an area of the third unit from the fourth memory area to the second memory area, a fifth processing for copying data to an area of the third unit and allocating the area to the second memory area, and a sixth processing for copying data to an empty area of the third unit in the second memory area.
摘要翻译：半导体存储装置包括配置在非易失性半导体存储器中的易失性半导体存储器，第二，第三和第四存储区域中的第一存储区域和执行以下处理的控制器。控制器执行第一处理，用于将第一单元存储在第一存储区域中的多个数据，第二处理，用于由第一管理单元存储在第四存储区域中的数据;第三处理，用于由第二管理单元存储数据在第三存储区域中，用于将第三单元的区域从第四存储区域移动到第二存储区域的第四处理，用于将数据复制到第三单元的区域并将区域分配给第二存储区域的第五处理以及用于将数据复制到第二存储区域中的第三单元的空白区域的第六处理。

33. 发明授权

US08782331B2 Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks 有权
标题翻译：具有易失性和非易失性存储器的半导体存储设备，用于向存储器分配块并释放分配的块
公开(公告)号：US08782331B2
公开(公告)日：2014-07-15
申请号：US13571034
申请日：2012-08-09
申请人： Hirokuni Yano , Shinichi Kanno , Hida Toshikatsu , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni Yano , Shinichi Kanno , Hida Toshikatsu , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/02 , G06F12/08
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
摘要翻译：半导体存储装置包括配置在易失性半导体存储器中的第一存储区域，配置在非易失性半导体存储器中的第二和第三存储区域，以及执行以下处理的控制器。控制器执行第一处理，用于通过第一存储区中的第一单元存储多个数据;第二处理，用于存储由第二存储区中的第一管理单元从第一存储区输出的数据;以及第三处理，通过第二管理单元将从第一存储区域输出的数据存储在第三存储区域中。

34. 发明授权

US08611154B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08611154B2
公开(公告)日：2013-12-17
申请号：US12866668
申请日：2008-09-22
申请人： Shigehiro Asano , Shinichi Kanno , Junji Yano
发明人： Shigehiro Asano , Shinichi Kanno , Junji Yano
IPC分类号： G11C11/34
CPC分类号： H01L23/5228 , G06F9/4401 , G11C5/005 , G11C5/04 , G11C5/066 , G11C16/0408 , H01L23/60 , H01L24/48 , H01L25/0657 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01046 , H01L2924/01055 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm of the m semiconductor chips CP1 to CPm.
摘要翻译：在单个半导体封装PK1上安装半导体芯片CP1至CPm，并且半导体封装PK1具有由m个半导体芯片CP1至CPm的m个焊盘电极PD1至PDm共享的外部端子T. 静电保护电路CD仅安装在m个半导体芯片CP1至CPm的一个CPm上。

35. 发明授权

US08516182B2 Controller and memory system for managing data 失效
标题翻译：用于管理数据的控制器和存储器系统
公开(公告)号：US08516182B2
公开(公告)日：2013-08-20
申请号：US12554272
申请日：2009-09-04
申请人： Kenichiro Yoshii , Shinichi Kanno , Shigehiro Asano
发明人： Kenichiro Yoshii , Shinichi Kanno , Shigehiro Asano
IPC分类号： G06F12/10
CPC分类号： G06F12/0246 , G06F2212/7207 , G06F2212/7209
摘要： A controller includes a storage for a translation table showing logical and physical addresses in a flash memory in correspondence with one another; another storage storing FAT information indicating the state of data stored in each of pages contained in each of blocks and FAT information identifiers each identifying a block to which pages each storing therein the data in the state indicated by the FAT information belong, while keeping them in correspondence with one another; yet another storage for a block management table showing block identifiers, use-state judging information indicating whether the corresponding block is used/unused, and the FAT information identifiers corresponding to all the blocks indicated as being used by the use-state judging information, while keeping them in correspondence with one another; and a controller controlling unit managing data stored in the flash memory by using the translation table, the FAT information, and the block management table.
摘要翻译：控制器包括用于转换表的存储器，其中显示闪存中的逻辑和物理地址彼此对应; 指示存储在每个块中的每个页面中存储的数据的状态的FAT信息和每个识别由FAT信息指示的状态中存储有数据的页面所属的块的FAT信息标识符，同时保持它们相互对应; 另一个用于表示块标识符的块管理表的存储器，指示是否使用相应块的使用状态判断信息以及与使用状态判断信息所使用的所有块对应的FAT信息标识符，而保持彼此对应; 以及控制器控制单元，通过使用转换表，FAT信息和块管理表来管理存储在闪速存储器中的数据。

36. 发明授权

US08065470B2 Semiconductor storage device with volatile and nonvolatile memories 有权
标题翻译：具有易失性和非易失性存储器的半导体存储设备
公开(公告)号：US08065470B2
公开(公告)日：2011-11-22
申请号：US12552330
申请日：2009-09-02
申请人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/00
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
摘要翻译：半导体存储装置包括配置在易失性半导体存储器中的第一存储区域，配置在非易失性半导体存储器中的第二和第三存储区域，以及执行以下处理的控制器。控制器执行第一处理，用于通过第一存储区中的第一单元存储多个数据;第二处理，用于存储由第二存储区中的第一管理单元从第一存储区输出的数据;以及第三处理，通过第二管理单元将从第一存储区域输出的数据存储在第三存储区域中。

37. 发明申请

US20110185107A1 MEMORY SYSTEM 有权
标题翻译：记忆系统
公开(公告)号：US20110185107A1
公开(公告)日：2011-07-28
申请号：US12529227
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
IPC分类号： G06F12/00
CPC分类号： G06F11/1451 , G06F11/1471 , G06F12/0246 , G06F12/06 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of the data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit has a management information storage area for storing management information storage information including management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of management information in a latest state in the management information storage area and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit.
摘要翻译：存储系统包括易失性第一存储单元，非易失性第二存储单元和控制器。控制器执行数据传送，将存储在第二存储单元中的数据的存储位置的管理信息存储到第一存储单元中，并且在更新管理信息的同时执行数据管理。第二存储单元具有用于存储管理信息存储信息的管理信息存储区域，该管理信息存储信息包括最新状态的管理信息和管理信息的存储位置。存储位置信息在存储器系统的启动操作期间由控制器读取，并且包括指示管理信息存储区域中处于最新状态的管理信息的存储位置的第二指针和指示第二存储器的存储位置的第一指针指针。第一指针存储在第二存储单元中的固定区域中，并且第二指针存储在除了第二存储单元中的固定区域之外的区域中。

38. 发明申请

US20110016266A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110016266A1
公开(公告)日：2011-01-20
申请号：US12866668
申请日：2008-09-22
申请人： Shigehiro Asano , Shinichi Kanno , Junji Yano
发明人： Shigehiro Asano , Shinichi Kanno , Junji Yano
IPC分类号： H01L23/552 , G06F12/02
CPC分类号： H01L23/5228 , G06F9/4401 , G11C5/005 , G11C5/04 , G11C5/066 , G11C16/0408 , H01L23/60 , H01L24/48 , H01L25/0657 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01046 , H01L2924/01055 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm of the m semiconductor chips CP1 to CPm.
摘要翻译：在单个半导体封装PK1上安装半导体芯片CP1至CPm，并且半导体封装PK1具有由m个半导体芯片CP1至CPm的m个焊盘电极PD1至PDm共享的外部端子T. 静电保护电路CD仅安装在m个半导体芯片CP1至CPm的一个CPm上。

39. 发明授权

US08990480B2 Semiconductor memory device and computer program product 有权
标题翻译：半导体存储器和计算机程序产品
公开(公告)号：US08990480B2
公开(公告)日：2015-03-24
申请号：US13586219
申请日：2012-08-15
申请人： Shinichi Kanno , Kazuhiro Fukutomi
发明人： Shinichi Kanno , Kazuhiro Fukutomi
IPC分类号： G06F12/00 , G11C16/10 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： According an embodiment, a semiconductor memory device includes a semiconductor memory chip to store plural pieces of data that are written and read in units of a page and are erased in units of a block including plural pages; a discarding unit to discard, after the data is written in the semiconductor memory chip with a logic address being designated, at least a portion of valid data among the plural pieces of data; a compaction unit to write the valid data excluding the discarded data in a second block among the valid data stored in a first block and erase the first block; and a controller to output, in response to a request for reading the discarded data, a response indicating that the data is unable to be read. When all the valid data included in a block are discarded, the discarding unit erases the block.
摘要翻译：根据实施例，半导体存储器件包括半导体存储器芯片，用于存储以页为单位写入和读取的多个数据，并且以包括多个页的块为单位被擦除; 在所述数据被写入所述半导体存储器芯片中，在所述多个数据中的至少一部分有效数据被指定的情况下，丢弃所述丢弃单元; 压缩单元，将存储在第一块中的有效数据中的排除丢弃数据的有效数据写入第二块中，并擦除第一块; 以及控制器，响应于读取丢弃的数据的请求，输出指示数据不能被读取的响应。当包含在块中的所有有效数据被丢弃时，丢弃单元擦除该块。

40. 发明授权

US08612721B2 Semiconductor memory controlling device 有权
标题翻译：半导体存储器控制装置
公开(公告)号：US08612721B2
公开(公告)日：2013-12-17
申请号：US13037970
申请日：2011-03-01
申请人： Shigehiro Asano , Shinichi Kanno , Kenichiro Yoshii
发明人： Shigehiro Asano , Shinichi Kanno , Kenichiro Yoshii
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/1009 , G06F2212/7201 , G06F2212/7205
摘要： According to one embodiment, upon request from an information processor, a semiconductor storage controller writes pieces of data in predetermined units into storage locations in which no data has been written in erased areas within a semiconductor chip's storage area. A third table and a second table which is a subset thereof include physical addresses each indicating a storage location of each of pieces of the data within the semiconductor chip. The first table includes either information specifying a second table entry or information specifying a third table entry. The semiconductor storage controller records the first and the second tables into a volatile memory or records the first table into a volatile memory and the third table into a nonvolatile memory.
摘要翻译：根据一个实施例，根据信息处理器的要求，半导体存储控制器以预定单位将多条数据写入在半导体芯片的存储区域内的擦除区域中没有数据写入的存储位置。作为其子集的第三表和第二表包括各自表示半导体芯片内的每个数据的存储位置的物理地址。第一表包括指定第二表条目的信息或指定第三表条目的信息。半导体存储控制器将第一和第二表记录到易失性存储器中，或将第一表记录到易失性存储器中，将第三表记录到非易失性存储器中。

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