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31. 发明申请

US20120106731A1 SPEEDING UP GALOIS COUNTER MODE (GCM) COMPUTATIONS 有权
标题翻译：加快GALOIS计数器模式（GCM）计算
公开(公告)号：US20120106731A1
公开(公告)日：2012-05-03
申请号：US13196718
申请日：2011-08-02
申请人： Shay Gueron , Michael E. Kounavis
发明人： Shay Gueron , Michael E. Kounavis
IPC分类号： H04L9/28
CPC分类号： G06F7/724 , H04L9/0631 , H04L9/0643 , H04L9/3242 , H04L2209/043
摘要： Methods and apparatus to speed up Galois Counter Mode (GCM) computations are described. In one embodiment, a carry-less multiplication instruction may be used to perform operations corresponding to verification of an encrypted message in accordance with GCM. Other embodiments are also described.
摘要翻译：描述加速伽罗瓦计数器模式（GCM）计算的方法和装置。在一个实施例中，可以使用无进位乘法指令来执行与根据GCM的加密消息的验证相对应的操作。还描述了其它实施例。

32. 发明申请

US20110158403A1 ON-THE-FLY KEY GENERATION FOR ENCRYPTION AND DECRYPTION 有权
标题翻译：用于加密和分解的关键生成器
公开(公告)号：US20110158403A1
公开(公告)日：2011-06-30
申请号：US12647459
申请日：2009-12-26
申请人： Sanu K. Mathew , Farhana Sheikh , Ram K. Krishnamurthy , Michael E. Kounavis , Shay Gueron
发明人： Sanu K. Mathew , Farhana Sheikh , Ram K. Krishnamurthy , Michael E. Kounavis , Shay Gueron
IPC分类号： H04L9/00
CPC分类号： H04L9/0631 , H04L9/3073 , H04L2209/24
摘要： Methods and apparatus to provide on-the-fly key computation for Galois Field (also referred to Finite Field) encryption and/or decryption are described. In one embodiment, logic generates a cipher key, in a second cycle, based on a previous cipher key, generated in a first cycle that immediately precedes the second cycle. Other embodiments are also described.
摘要翻译：描述了为Galois Field（也称为有限场）加密和/或解密提供实时密钥计算的方法和装置。在一个实施例中，逻辑在第二周期中基于在紧接在第二周期之前的第一周期中生成的先前密码密钥来生成密码密钥。还描述了其它实施例。

33. 发明申请

US20090220071A1 COMBINING INSTRUCTIONS INCLUDING AN INSTRUCTION THAT PERFORMS A SEQUENCE OF TRANSFORMATIONS TO ISOLATE ONE TRANSFORMATION 有权
标题翻译：组合指令，包括执行转换序列以隔离一次转换的指令
公开(公告)号：US20090220071A1
公开(公告)日：2009-09-03
申请号：US12040214
申请日：2008-02-29
申请人： Shay Gueron , Zeev Sperber
发明人： Shay Gueron , Zeev Sperber
IPC分类号： H04L9/28
CPC分类号： H04L9/0681 , G06F9/30007 , G06F21/75 , G06F2221/2107 , G09C1/00 , H04L9/0631 , H04L2209/125 , H04L2209/24
摘要： The Advanced Encryption Standard (AES) is a symmetric block cipher that can encrypt and decrypt information. Encryption (cipher) performs a series of transformations (Shift Rows, Substitute Bytes, Mix Columns) using the secret key (cipher key) to transforms intelligible data referred to as “plaintext” into an unintelligible form referred to as “cipher text”. The transformations (Inverse Shift Rows, Inverse Substitute Bytes, Inverse Mix Columns) in the inverse cipher (decryption) are the inverse of the transformations in the cipher. Encryption and decryption is performed efficiently through the use of instructions that perform the series of transformations. Combinations of these instructions allow the isolation of the transformations (Shift Rows, Substitute Bytes, Mix Columns, Inverse Shift Rows, Inverse Substitute Bytes, Inverse Mix Columns) to be obtained.
摘要翻译：高级加密标准（AES）是可以加密和解密信息的对称块密码。加密（密码）使用秘密密钥（密码密钥）执行一系列转换（Shift Rows，Substitute Bytes，Mix Columns），将被称为“明文”的可理解数据转换成称为“密文”的无法理解的形式。反密码（解密）中的变换（逆位排，逆替换字节，反混合列）是密码中的变换的逆。通过使用执行一系列转换的指令来有效地执行加密和解密。这些指令的组合允许要获得的转换的隔离（Shift Rows，Substitution Bytes，Mix Columns，Inverse Shift Rows，Inverse Substitute Bytes，Inverse Mix Columns）。

34. 发明申请

US20090172304A1 Obscuring Memory Access Patterns in Conjunction with Deadlock Detection or Avoidance 有权
标题翻译：阻止内存访问模式与死锁检测或避免相关联
公开(公告)号：US20090172304A1
公开(公告)日：2009-07-02
申请号：US11966794
申请日：2007-12-28
申请人： Shay Gueron , Gad Sheaffer , Shlomo Raikin
发明人： Shay Gueron , Gad Sheaffer , Shlomo Raikin
IPC分类号： G06F12/00
CPC分类号： G06F12/0808 , G06F12/0802 , G06F21/556 , G06F2201/885 , G06F2212/1052 , H04L9/003
摘要： Methods, apparatus and systems for memory access obscuration are provided. A first embodiment provides memory access obscuration in conjunction with deadlock avoidance. Such embodiment utilizes processor features including an instruction to enable monitoring of specified cache lines and an instruction that sets a status bit responsive to any foreign access (e.g., write or eviction due to a read) to the specified lines. A second embodiment provides memory access obscuration in conjunction with deadlock detection. Such embodiment utilizes the monitoring feature, as well as handler registration. A user-level handler may be asynchronously invoked responsive to a foreign write to any of the specified lines. Invocation of the handler more frequently than expected indicates that a deadlock may have been encountered. In such case, a deadlock policy may be enforced. Other embodiments are also described and claimed.
摘要翻译：提供了存储器访问遮蔽的方法，装置和系统。第一实施例提供结合死锁避免的存储器访问遮蔽。这种实施例利用处理器特征，包括能够监视指定的高速缓存行的指令，以及响应于指定行的任何外部访问（例如，由于读取的写入或驱逐）而设置状态位的指令。第二实施例提供结合死锁检测的存储器访问遮蔽。这种实施例利用监视特征以及处理程序注册。响应于对任何指定行的外部写入，可以异步调用用户级处理程序。调用处理程序比预期更频繁表示可能遇到死锁。在这种情况下，可能会执行死锁策略。还描述和要求保护其他实施例。

35. 发明申请

US20090052659A1 METHOD AND APPARATUS FOR GENERATING AN ADVANCED ENCRYPTION STANDARD (AES) KEY SCHEDULE 有权
标题翻译：用于生成高级加密标准（AES）主要附表的方法和装置
公开(公告)号：US20090052659A1
公开(公告)日：2009-02-26
申请号：US11841556
申请日：2007-08-20
申请人： Shay Gueron , Martin G. Dixon , Srinivas Chennupaty , Mayank Bomb , Brent Boswell
发明人： Shay Gueron , Martin G. Dixon , Srinivas Chennupaty , Mayank Bomb , Brent Boswell
IPC分类号： H04L9/06
CPC分类号： H04L9/28 , G06F9/30007 , H04L9/0631 , H04L2209/125 , H04L2209/24
摘要： An Advanced Encryption Standard (AES) key generation assist instruction is provided. The AES key generation assist instruction assists in generating round keys used to perform AES encryption and decryption operations. The AES key generation instruction operates independent of the size of the cipher key and performs key generation operations in parallel on four 32-bit words thereby increasing the speed at which the round keys are generated. This instruction is easy to use in software. Hardware implementation of this instruction removes potential threats of software (cache access based) side channel attacks on this part of the AES algorithm.
摘要翻译：提供了高级加密标准（AES）密钥生成辅助指令。 AES密钥生成辅助指令有助于生成用于执行AES加密和解密操作的循环密钥。 AES密钥生成指令独立于密码密钥的大小，并行执行四个32位字的密钥生成操作，从而增加生成循环密钥的速度。该指令在软件中易于使用。该指令的硬件实现可以消除这部分AES算法对软件（基于缓存访问的）侧面信道攻击的潜在威胁。

36. 发明申请

US20090019342A1 Determining a Message Residue 有权
标题翻译：确定消息残差
公开(公告)号：US20090019342A1
公开(公告)日：2009-01-15
申请号：US11777538
申请日：2007-07-13
申请人： Shay Gueron , Vinodh Gopal , Wajdi K. Feghali , Gilbert M. Wolrich
发明人： Shay Gueron , Vinodh Gopal , Wajdi K. Feghali , Gilbert M. Wolrich
IPC分类号： H03M13/15
CPC分类号： H03M13/091
摘要： A technique of determining a message residue includes accessing a message and simultaneously determining a set of modular remainders with respect to a polynomial for different respective segments of the message. The technique also includes determining a modular remainder with respect to the polynomial for the message based on the set of modular remainders and a set of constants determined prior to accessing the message. The modular remainder with respect to the polynomial for the message is stored in a memory.
摘要翻译：确定消息残差的技术包括访问消息并且同时确定关于消息的不同相应段的多项式的一组模块余数。该技术还包括基于模块余数的集合和在访问消息之前确定的一组常数来确定关于消息的多项式的模块余数。相对于消息的多项式的模数余数存储在存储器中。

37. 发明申请

US20080159526A1 Architecture and instruction set for implementing advanced encryption standard (AES) 有权
标题翻译：实现高级加密标准（AES）的体系结构和指令集
公开(公告)号：US20080159526A1
公开(公告)日：2008-07-03
申请号：US11648434
申请日：2006-12-28
申请人： Shay Gueron , Wajdi K. Feghali , Vinodh Gopal
发明人： Shay Gueron , Wajdi K. Feghali , Vinodh Gopal
IPC分类号： H04L9/28
CPC分类号： H04L9/0631 , G06F9/30007 , G06F21/602 , H04L9/14 , H04L2209/24
摘要： A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.
摘要翻译：提供了一种用于通用处理器的灵活的aes指令，其使用n次循环执行aes加密或解密，其中n包括标准的一组轮{10,12,14}。提供了一个参数，以允许选择一轮的类型，即是否是“最后一轮”。除了标准aes之外，灵活的aes指令允许指定具有20发的AES类密码或“一轮”通过。

38. 发明申请

US20080080707A1 RSA signature authentication with reduced computational burden 审中-公开
标题翻译： RSA签名认证减少计算负担
公开(公告)号：US20080080707A1
公开(公告)日：2008-04-03
申请号：US11540213
申请日：2006-09-29
申请人： Shay Gueron
发明人： Shay Gueron
IPC分类号： H04L9/30
CPC分类号： H04L9/302 , H04L9/3249 , H04L2209/20
摘要： Methods and apparatuses enable quick authentication of a Rivest, Shamir, and Adleman (RSA) compliant signature by performing non-modular arithmetic operations on one or more pre-computed constants in place of at least one modular arithmetic operation. In one embodiment, the signature is authenticated by computing SE (mod N) by performing k non-modular arithmetic squaring operations, k+1 non-modular arithmetic subtraction operations, k+2 non-modular arithmetic multiplication operations, and no modular arithmetic, where S is the RSA compliant signature, E is the exponent of a public key, N is the modulus of the public key, and k is a positive integer where E=2k+1.
摘要翻译：方法和装置可以通过对一个或多个预先计算的常数执行非模数运算代替至少一个模算法运算来快速认证符合Rivest，Shamir和Adleman（RSA）的签名。在一个实施例中，通过执行k个非模数算术平方运算，k + 1个非模运算减法运算，k + 2个非模运算，通过计算S（E N）乘法运算，没有模数运算，其中S是符合RSA的签名，E是公钥的指数，N是公钥的模数，k是正整数，其中E = 2K < SUP> +1。

39. 发明申请

US20080019512A1 Accelerating diffie-hellman key-exchange protocol with zero-biased exponent windowing 有权
标题翻译：用零偏置指数窗口加速diffie-hellman密钥交换协议
公开(公告)号：US20080019512A1
公开(公告)日：2008-01-24
申请号：US11480153
申请日：2006-06-29
申请人： Shay Gueron , Vinodh Gopal
发明人： Shay Gueron , Vinodh Gopal
IPC分类号： H04L9/00
CPC分类号： H04L9/088 , H04L9/0841
摘要： A method for improving performance in exponentiation algorithms for encryption programs such as the Diffie-Hellman key-exchange protocol. The program determines if a standard exponentiation algorithm or an algorithm optimized for reduced memory are optimal for a given circumstance. The optimized algorithms may use zero-biased exponents to minimize the number of precomputed vectors needed and the number of multiplication operations required.
摘要翻译：一种用于提高加密程序（如Diffie-Hellman密钥交换协议）的求幂算法中的性能的方法。该程序确定对于给定的情况，标准求幂算法还是针对减少的存储器优化的算法是最优的。优化的算法可以使用零偏置指数来最小化所需的预计算向量的数量和所需的乘法运算的数量。

40. 发明申请

US20080002825A1 Method and a system for a quick verification rabin signature scheme 失效
标题翻译：用于快速验证rabin签名方案的方法和系统
公开(公告)号：US20080002825A1
公开(公告)日：2008-01-03
申请号：US11479100
申请日：2006-06-30
申请人： Shay Gueron , Vinodh Gopal
发明人： Shay Gueron , Vinodh Gopal
IPC分类号： H04L9/30
CPC分类号： H04L9/302 , H04L9/3249
摘要： A method and a system to perform a Quick Verification of a Rabin Signature (QVRS) is provided. In one embodiment, the signing party generates a Rabin signature S of an original message M using a public key N in the Rabin signature generating formula M=S2 mod N. In one embodiment, the signing party also generates a value q according to the formula q=floor(S2/N). In one embodiment, the signing party sends the original message M, the signature S, the public key N and the value q to the verifying party. In one embodiment, the verifying party verifies the integrity of the message M using the signature S, the public key N and the value q and the test equation M=S2−qN.
摘要翻译：提供了一种执行拉宾签名快速验证（QVRS）的方法和系统。在一个实施例中，签名方使用Rabin签名生成公式M = S＆lt; 2＆gt; mod N中的公共密钥N来生成原始消息M的拉宾签名S.在一个实施例中，签约方也根据公式q = floor（S ^{2 / N）生成值q。在一个实施例中，签名方向验证方发送原始消息M，签名S，公钥N和值q。在一个实施例中，验证方使用签名S，公开密钥N和值q以及测试方程M = S 2 -Q N验证消息M的完整性。}

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