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31. 发明授权

US08018761B2 Resistance variable element, resistance variable memory apparatus, and resistance variable apparatus 有权
标题翻译：电阻可变元件，电阻可变存储装置和电阻变量装置
公开(公告)号：US08018761B2
公开(公告)日：2011-09-13
申请号：US12519476
申请日：2007-12-20
申请人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
发明人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
IPC分类号： G11C11/00
CPC分类号： H01L45/1625 , G11C13/00 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/147
摘要： A resistance variable element (10), a resistance variable memory apparatus, and a resistance variable apparatus, comprise a first electrode (2), a second electrode (4), and a resistance variable layer (3) which is disposed between the first electrode (2) and the second electrode (4) and is electrically connected to the first electrode (2) and to the second electrode (4), wherein the resistance variable layer (3) contains a material having a spinel structure which is expressed as a chemical formula of (NixFe1-x) Fe2O4, X being not smaller than 0.35 and not larger than 0.9, wherein the resistance variable element has a characteristic in which an electric resistance between the first electrode (2) and the second electrode (4) decreases by application of a first voltage pulse having a first voltage between the first electrode (2) and the second electrode (4) and increases by application of a second voltage pulse having a second voltage which is different in polarity from the first voltage between the first electrode (2) and the second electrode (4).
摘要翻译：电阻可变元件（10），电阻可变存储装置和电阻变化装置包括第一电极（2），第二电极（4）和电阻变化层（3）（2）和第二电极（4），并且电连接到第一电极（2）和第二电极（4），其中电阻变化层（3）包含具有尖晶石结构的材料，其表示为（NixFe1-x）Fe2O4的化学式，X不小于0.35且不大于0.9，其中电阻可变元件具有其中第一电极（2）和第二电极（4）之间的电阻降低的特性通过施加在第一电极（2）和第二电极（4）之间具有第一电压的第一电压脉冲，并且通过施加具有与第一电压极性不同的第二电压的第二电压脉冲来增加在第一电极（2）和第二电极（4）之间。

32. 发明授权

US07965539B2 Nonvolatile memory element, nonvolatile semiconductor memory apparatus, and reading method and writing method therefor 有权
标题翻译：非易失性存储元件，非易失性半导体存储器件及其读取方法和写入方法
公开(公告)号：US07965539B2
公开(公告)日：2011-06-21
申请号：US12516703
申请日：2008-09-25
申请人： Koichi Osano , Shunsaku Muraoka , Satoru Fujii , Kazuhiko Shimakawa
发明人： Koichi Osano , Shunsaku Muraoka , Satoru Fujii , Kazuhiko Shimakawa
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C7/1006 , G11C13/0007 , G11C2013/0076 , G11C2213/32 , G11C2213/34 , G11C2213/79
摘要： A nonvolatile memory element (101) of the present invention includes a resistance variable layer (112) which intervenes between a first electrode (111) and a second electrode (113) and is configured to include at least an oxide of a metal element of VI group, V group or VI group, and when an electric pulse of a specific voltage is applied between the first voltage (111) and the second voltage (113), the resistance variable layer is turned to have a first high-resistance state or a second high-resistance state in which its resistance value is a high-resistance value RH, or a low-resistance state in which its resistance value is a low-resistance value RL.
摘要翻译：本发明的非易失性存储元件（101）包括介于第一电极（111）和第二电极（113）之间的电阻变化层（112），并且被配置为至少包含VI的金属元素的氧化物组，V组或VI组，并且当在第一电压（111）和第二电压（113）之间施加特定电压的电脉冲时，电阻变化层转为具有第一高电阻状态或其电阻值为高电阻值RH的第二高电阻状态或其电阻值为低电阻值RL的低电阻状态。

33. 发明申请

US20100271859A1 NONVOLATILE MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS, AND READING METHOD AND WRITING METHOD THEREFOR 有权
标题翻译：非易失性存储器元件，非易失性半导体存储器件及其读取方法及其写入方法
公开(公告)号：US20100271859A1
公开(公告)日：2010-10-28
申请号：US12516703
申请日：2008-09-25
申请人： Koichi Osano , Shunsaku Muraoka , Satoru Fujii , Kazuhiko Shimakawa
发明人： Koichi Osano , Shunsaku Muraoka , Satoru Fujii , Kazuhiko Shimakawa
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： H01L27/101 , G11C7/1006 , G11C13/0007 , G11C2013/0076 , G11C2213/32 , G11C2213/34 , G11C2213/79
摘要： A nonvolatile memory element (101) of the present invention comprises a resistance variable layer (112) which intervenes between a first electrode (111) and a second electrode (113) and is configured to include at least an oxide of a metal element of VI group, V group or VI group, and when an electric pulse of a specific voltage is applied between the first voltage (111) and the second voltage (113), the resistance variable layer is turned to have a first high-resistance state or a second high-resistance state in which its resistance value is a high-resistance value RH, or a low-resistance state in which its resistance value is a low-resistance value RL.
摘要翻译：本发明的非易失性存储元件（101）包括介于第一电极（111）和第二电极（113）之间的电阻变化层（112），并且被配置为至少包含VI的金属元素的氧化物组，V组或VI组，并且当在第一电压（111）和第二电压（113）之间施加特定电压的电脉冲时，电阻变化层转为具有第一高电阻状态或其电阻值为高电阻值RH的第二高电阻状态或其电阻值为低电阻值RL的低电阻状态。

34. 发明申请

US20100232204A1 RESISTANCE VARIABLE ELEMENT, NONVOLATILE SWITCHING ELEMENT, AND RESISTANCE VARIABLE MEMORY APPARATUS 有权
标题翻译：电阻可变元件，非易失性开关元件和电阻可变存储器
公开(公告)号：US20100232204A1
公开(公告)日：2010-09-16
申请号：US12304075
申请日：2008-03-27
申请人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
发明人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
IPC分类号： G11C11/00 , H01C7/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2013/0092 , G11C2213/32 , G11C2213/72 , H01L27/101 , H01L27/2409 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A resistance variable element comprises a first electrode (2), a second electrode (4), and a resistance variable layer (3) which is disposed between the first electrode and the second electrode, and electrically connected to the first electrode and the second electrode, wherein the resistance variable layer comprises material including TaOX (1.6≦X≦2.2), an electric resistance between the first electrode and the second electrode is lowered by application of a first voltage pulse having a first voltage between the first electrode and the second electrode, and the electric resistance between the first electrode and the second electrode is increased by application of a second voltage pulse having a second voltage of the same polarity as the first voltage, between the first electrode and the second electrode.
摘要翻译：电阻可变元件包括设置在第一电极和第二电极之间的第一电极（2），第二电极（4）和电阻变化层（3），并且电连接到第一电极和第二电极，其中所述电阻变化层包括包括TaOX（1.6＆amp; Xln; 2.2）的材料，通过在所述第一电极和所述第二电极之间施加具有第一电压的第一电压脉冲来降低所述第一电极和所述第二电极之间的电阻电极，并且通过在第一电极和第二电极之间施加具有与第一电压相同极性的第二电压的第二电压脉冲来增加第一电极和第二电极之间的电阻。

35. 发明申请

US20090224224A1 NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, NONVOLATILE SEMICONDUCTOR APPARATUS, AND METHOD OF MANUFACTURING NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储元件，非易失性存储器件，非易失性半导体器件及其制造非易失性存储器元件的方法
公开(公告)号：US20090224224A1
公开(公告)日：2009-09-10
申请号：US12307032
申请日：2007-10-24
申请人： Satoru Fujii , Takeshi Takagi , Shunsaku Muraoka , Koichi Osano , Kazuhiko Shimakawa
发明人： Satoru Fujii , Takeshi Takagi , Shunsaku Muraoka , Koichi Osano , Kazuhiko Shimakawa
IPC分类号： H01L47/00 , H01L21/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , G11C2213/79 , H01L27/2418 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element of the present invention comprises a first electrode (103), a second electrode (105), and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (104), a resistance value of the resistance variable layer varying reversibly according to an electric signal applied between the electrodes (103),(105), and the resistance variable layer (104) comprises at least a tantalum oxide, and is configured to satisfy 0
摘要翻译：本发明的非易失性存储元件包括第一电极（103），第二电极（105）和设置在第一电极（103）和第二电极（104）之间的电阻变化层（104），电阻值根据施加在电极（103），（105）和电阻变化层（104）之间的电信号可逆地改变的电阻变化层至少包括氧化钽，并且被配置为满足0

36. 发明授权

US07463506B2 Memory device, memory circuit and semiconductor integrated circuit having variable resistance 有权
标题翻译：存储器件，存储器电路和具有可变电阻的半导体集成电路
公开(公告)号：US07463506B2
公开(公告)日：2008-12-09
申请号：US10584617
申请日：2004-10-22
申请人： Shunsaku Muraoka , Koichi Osano , Ken Takahashi , Masafumi Shimotashiro
发明人： Shunsaku Muraoka , Koichi Osano , Ken Takahashi , Masafumi Shimotashiro
IPC分类号： G11C11/00
CPC分类号： H01L27/2436 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0083 , G11C2213/31 , G11C2213/75 , G11C2213/78 , G11C2213/79 , H01L27/2463 , H01L27/2472 , H01L45/04 , H01L45/1233 , H01L45/147
摘要： A first variable resistor (5) is connected between a first terminal (7) and a third terminal (9) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the first terminal (7) and the third terminal (9). A second variable resistor (6) is connected between the third terminal (9) and a second terminal (8) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the third terminal (9) and the second terminal (8). Given pulse voltages are applied between the first terminal (7) and the third terminal (9) and between the third terminal (9) and the second terminal (8) to reversibly change the resistance values of the first and second variable resistors (5, 6), thereby recording one bit or multiple bits of information.
摘要翻译：第一可变电阻器（5）连接在第一端子（7）和第三端子（9）之间，并且根据施加在第一端子（7）和第三端子（7）之间的脉冲电压的极性来增大/减小其电阻值终端（9）。第二可变电阻器（6）连接在第三端子（9）和第二端子（8）之间，并根据在第三端子（9）和第二端子（8）之间施加的脉冲电压的极性来增大/减小其电阻值端子（8）。给定脉冲电压施加在第一端子（7）和第三端子（9）之间以及第三端子（9）和第二端子（8）之间，以可逆地改变第一和第二可变电阻器（5）的电阻值， 6），从而记录一位或多位信息。

37. 发明授权

US06735047B1 Magnetic head and magnetic recording/reproducing apparatus 失效
标题翻译：磁头和磁记录/再现装置
公开(公告)号：US06735047B1
公开(公告)日：2004-05-11
申请号：US10110517
申请日：2002-04-11
申请人： Kenji Hasegawa , Shunsaku Muraoka , Akinaga Natsui , Koichi Osano , Ken Takahashi
发明人： Kenji Hasegawa , Shunsaku Muraoka , Akinaga Natsui , Koichi Osano , Ken Takahashi
IPC分类号： G11B5147
CPC分类号： G11B5/537 , G11B5/0086 , G11B5/105 , G11B5/133 , G11B5/147 , G11B5/1475 , G11B5/255 , G11B5/53 , G11B15/61 , G11B15/62
摘要： A magnetic head that is less prone to wear and has a long still duration and a magnetic recording/reproducing apparatus including a high-speed rotary drum unit using the same are provided. Thus, in a magnetic head including two magnetic core halves 4 and 8, each including at least one magnetic film 2, 6 made of a soft magnetic metallic material and a pair of substrates 1, 3 and 5, 7 sandwiching the magnetic film, arranged so that end faces thereof oppose each other with a magnetic gap 9 being formed therebetween to form a magnetic path by the magnetic film in each of the magnetic core halves, at least a part of a sliding surface of each substrate with respect to a magnetic tape is made of a non-magnetic single crystal ferrite material and a crystal face orientation of the non-magnetic single crystal ferrite material at the sliding surface is set to be approximately {110} while a direction of the non-magnetic single crystal ferrite material is approximately in parallel with a sliding direction of the magnetic head with respect to the magnetic tape.
摘要翻译：提供一种不容易磨损并且具有长持续时间的磁头和包括使用其的高速旋转鼓单元的磁记录/再现装置。因此，在包括两个磁性体半部分4和8的磁头中，每个包括至少一个由软磁性金属材料制成的磁膜2,6和夹着磁性膜的一对基板1,3,5,7布置使得其端面彼此相对，其间形成有磁隙9，以通过每个磁芯半部中的磁性膜形成磁路，每个基板的滑动表面的至少一部分相对于磁带由非磁性单晶铁氧体材料制成，并且非磁性单晶铁氧体材料在滑动面处的晶面取向被设定为约{110}，而非磁性单晶的<110>方向铁氧体材料大致与磁头相对于磁带的滑动方向平行。

38. 发明授权

US08217489B2 Nonvolatile memory element having a tantalum oxide variable resistance layer 有权
标题翻译：具有氧化钽可变电阻层的非易失性存储元件
公开(公告)号：US08217489B2
公开(公告)日：2012-07-10
申请号：US13246483
申请日：2011-09-27
申请人： Koichi Osano , Satoru Fujii , Shunsaku Muraoka
发明人： Koichi Osano , Satoru Fujii , Shunsaku Muraoka
IPC分类号： H01L29/00
CPC分类号： G11C13/003 , G11C13/0007 , G11C2213/32 , G11C2213/74 , G11C2213/76 , G11C2213/79 , H01L27/101 , H01L27/2409 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625 , Y10S257/904 , Y10S257/924
摘要： A nonvolatile memory apparatus includes a first electrode, a second electrode, a variable resistance layer, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes. The variable resistance layer includes at least a tantalum oxide, and is configured to satisfy 0
摘要翻译：非易失性存储装置包括第一电极，第二电极，可变电阻层，基于施加在电极之间的电信号在多个电阻状态之间可逆地变化的可变电阻层的电阻值。可变电阻层至少包括氧化钽，并且当氧化钽由TaOx表示时，其被构造为满足0

39. 发明授权

US08018760B2 Resistance variable element and resistance variable memory apparatus 有权
标题翻译：电阻可变元件和电阻变量存储装置
公开(公告)号：US08018760B2
公开(公告)日：2011-09-13
申请号：US12518400
申请日：2007-12-20
申请人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
发明人： Shunsaku Muraoka , Koichi Osano , Satoru Fujii
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/72 , H01L27/2409 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： A resistance variable element of the present invention and a resistance variable memory apparatus using the resistance variable element are a resistance variable element (10) including a first electrode, a second electrode, and a resistance variable layer (3) provided between the first electrode (2) and the second electrode (4) to be electrically connected to the first electrode (2) and the second electrode (4), wherein the resistance variable layer (3) contains a material having a spinel structure represented by a chemical formula of (ZnxFe1-x)Fe2O4, and the resistance variable element (10) has a feature that an electrical resistance between the first electrode (2) and the second electrode (4) increases by applying a first voltage pulse to between the first electrode (2) and the second electrode (4), and the electrical resistance between the first electrode (2) and the second electrode (4) decreases by applying a second voltage pulse whose polarity is the same as the first voltage pulse to between the first electrode (2) and the second electrode (4), and a resistance variable memory apparatus using the resistance variable element (10).
摘要翻译：本发明的电阻可变元件和使用该电阻可变元件的电阻变化存储装置是包括第一电极，第二电极和电阻变化层（3）的电阻变化元件（10） 2）和与第一电极（2）和第二电极（4）电连接的第二电极（4），其中电阻变化层（3）包含具有由以下化学式表示的尖晶石结构的材料：（ Zn x Fe 1-x）Fe 2 O 4，并且电阻可变元件（10）具有通过在第一电极（2）和第二电极（2）之间施加第一电压脉冲来增加第一电极（2）和第二电极和第二电极（4），并且第一电极（2）和第二电极（4）之间的电阻通过施加极性与第一电压脉冲相同的第二电压脉冲而减小（2）和第二电极（4）之间，以及使用该电阻变化元件（10）的电阻变化存储装置。

40. 发明申请

US20100182821A1 MEMORY DEVICE, MEMORY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING VARIABLE RESISTANCE 审中-公开
标题翻译：存储器件，存储器电路和具有可变电阻的半导体集成电路
公开(公告)号：US20100182821A1
公开(公告)日：2010-07-22
申请号：US12749296
申请日：2010-03-29
申请人： Shunsaku MURAOKA , Koichi Osano , Ken Takahashi , Masafumi Shimotashiro
发明人： Shunsaku MURAOKA , Koichi Osano , Ken Takahashi , Masafumi Shimotashiro
IPC分类号： G11C11/00 , G11C7/00 , G11C8/00
CPC分类号： H01L27/2436 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0083 , G11C2213/31 , G11C2213/75 , G11C2213/78 , G11C2213/79 , H01L27/2463 , H01L27/2472 , H01L45/04 , H01L45/1233 , H01L45/147
摘要： A first variable resistor (5) is connected between a first terminal (7) and a third terminal (9) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the first terminal (7) and the third terminal (9). A second variable resistor (6) is connected between the third terminal (9) and a second terminal (8) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the third terminal (9) and the second terminal (8). Given pulse voltages are applied between the first terminal (7) and the third terminal (9) and between the third terminal (9) and the second terminal (8) to reversibly change the resistance values of the first and second variable resistors (5, 6), thereby recording one bit or multiple bits of information.
摘要翻译：第一可变电阻器（5）连接在第一端子（7）和第三端子（9）之间，并且根据施加在第一端子（7）和第三端子（7）之间的脉冲电压的极性来增大/减小其电阻值终端（9）。第二可变电阻器（6）连接在第三端子（9）和第二端子（8）之间，并且根据施加在第三端子（9）和第二端子（8）之间的脉冲电压的极性来增大/减小其电阻值端子（8）。给定脉冲电压施加在第一端子（7）和第三端子（9）之间以及第三端子（9）和第二端子（8）之间，以可逆地改变第一和第二可变电阻器（5， 6），从而记录一位或多位信息。

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