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31. 发明授权

US08216925B2 Transistor structure having a trench drain 有权
标题翻译：具有沟槽漏极的晶体管结构
公开(公告)号：US08216925B2
公开(公告)日：2012-07-10
申请号：US12917163
申请日：2010-11-01
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L29/94
CPC分类号： H01L29/0882 , H01L21/26586 , H01L29/0653 , H01L29/0661 , H01L29/0878 , H01L29/402 , H01L29/41766 , H01L29/42376 , H01L29/66727 , H01L29/7802 , H01L29/7811
摘要： A semiconductor device is formed having a trench adjacent to a current carrying region of the device. The trench is formed having a depth greater than the depth of a tub region of the device. Increasing the trench depth moves a region of higher field strength from the tub region to a region along the trench. The region along the trench does not have a junction and may withstand the higher field strength.
摘要翻译：半导体器件形成为具有与器件的载流区相邻的沟槽。形成沟槽的深度大于装置的桶区域的深度。增加沟槽深度将较高场强的区域从桶区移动到沿着沟槽的区域。沿着沟槽的区域不具有接合点并且可以承受更高的场强。

32. 发明授权

US08076724B2 Transistor structure having an active region and a dielectric platform region 有权
标题翻译：具有有源区和电介质平台区的晶体管结构
公开(公告)号：US08076724B2
公开(公告)日：2011-12-13
申请号：US12248820
申请日：2008-10-09
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L29/66 , H01L29/78
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/41766 , H01L29/42376 , H01L29/66727
摘要： A semiconductor device is formed having lower gate-to-drain capacitance. The semiconductor device having an active region (1300) and a dielectric platform region (1310). A trench (80) is formed adjacent to a drain (20) of the semiconductor device to a first depth. The etch process for forming trench (80) etches the dielectric platform region (1310) to a first depth. A second trench (210) is etched in trench (80) to further isolate areas in the active region (1300). The etch process for forming the second trench (210) etches the dielectric platform region (1310) to form a support structure for the dielectric platform in the substrate. The dielectric platform, the trench (80), and the second trench (210) is capped and sealed. The dielectric platform is made approximately planar to the major surface of the substrate by forming the support structure from the first depth to the second depth.
摘要翻译：形成具有较低栅 - 漏电容的半导体器件。具有有源区（1300）和电介质平台区（1310）的半导体器件。与半导体器件的漏极（20）相邻形成第一深度的沟槽（80）。用于形成沟槽（80）的蚀刻工艺将电介质平台区域（1310）蚀刻到第一深度。在沟槽（80）中蚀刻第二沟槽（210）以进一步隔离有源区域（1300）中的区域。用于形成第二沟槽（210）的蚀刻工艺蚀刻介电平台区域（1310）以形成用于衬底中的电介质平台的支撑结构。绝缘平台，沟槽（80）和第二沟槽（210）被封盖并密封。通过从第一深度到第二深度形成支撑结构，使电介质平台与基板的主表面大致平面。

33. 发明授权

US08008719B2 Transistor structure having dual shield layers 有权
标题翻译：具有双屏蔽层的晶体管结构
公开(公告)号：US08008719B2
公开(公告)日：2011-08-30
申请号：US12248811
申请日：2008-10-09
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L21/26586 , H01L21/2815 , H01L29/0653 , H01L29/0878 , H01L29/1095 , H01L29/407 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/7811
摘要： A semiconductor device is formed having lower gate to drain capacitance. A trench (80) is formed adjacent to a drain (20) of the semiconductor device. Trench (80) has a sidewall surface (100) and a surface (90). A doped region (110) is implanted through the sidewall surface (100) of trench (80). A dielectric layer (150) overlies the sidewall surface (100) of trench (80). A shield layer (170) overlies the dielectric layer (150). The shield layer (170) is between a portion of drain (20) and a portion of the gate and gate interconnect of the semiconductor device thereby reducing gate to drain capacitance. The shield layer (170) overlies a minority portion of the surface (90) of trench (80). A second shield layer (270) further reduces gate to drain capacitance.
摘要翻译：形成具有较低栅极至漏极电容的半导体器件。邻近半导体器件的漏极（20）形成沟槽（80）。沟槽（80）具有侧壁表面（100）和表面（90）。通过沟槽（80）的侧壁表面（100）注入掺杂区域（110）。电介质层（150）覆盖在沟槽（80）的侧壁表面（100）上。屏蔽层（170）覆盖在电介质层（150）上。屏蔽层（170）位于漏极（20）的一部分和半导体器件的栅极和栅极互连的一部分之间，从而减小栅极至漏极电容。屏蔽层（170）覆盖沟槽（80）的表面（90）的少数部分。第二屏蔽层（270）进一步减小栅极至漏极电容。

34. 发明申请

US20110016762A1 RIFLE HANDGUARD SYSTEM WITH INTEGRATED BARREL NUT 审中-公开
标题翻译：带有整体式棒状螺母的RIFLE手柄系统
公开(公告)号：US20110016762A1
公开(公告)日：2011-01-27
申请号：US12870838
申请日：2010-08-29
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： F41A21/48
CPC分类号： F41A21/487 , F41C23/16
摘要： A handguard system for use on a rifle having a barrel and a receiver, the hand guard system includes a barrel nut having an inner surface with a threaded portion adapted to threadably engage the receiver for securing the barrel to the receiver and an outer surface, and a tubular handguard having an end. The tubular handguard is receivable about the barrel and is received about the barrel nut, engaging the outer surface thereof.
摘要翻译：一种用于具有镜筒和接收器的步枪的护手系统，所述护手系统包括桶形螺母，所述桶形螺母具有内表面，所述内表面具有螺纹部分，所述螺纹部分适于螺纹接合所述接收器，以将所述镜筒固定到所述接收器和外表面，以及具有末端的管状护手。管状护手可以围绕桶接收并且被容纳在与其外表面接合的桶形螺母周围。

35. 发明申请

US20100103578A1 ELECTRICAL STRESS PROTECTION APPARATUS AND METHOD OF MANUFACTURE 审中-公开
标题翻译：电力应力保护装置及其制造方法
公开(公告)号：US20100103578A1
公开(公告)日：2010-04-29
申请号：US12652839
申请日：2010-01-06
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H02H3/00
CPC分类号： H01L27/0262
摘要： In various embodiments, circuits and semiconductor devices and structures and methods to manufacture these structures and devices are disclosed. In one embodiment, a bidirectional polarity, voltage transient protection device is disclosed. The voltage transient protection device may include a bipolar PNP transistor having a turn-on voltage of VBE1, a bipolar NPN transistor having a turn-on voltage of VBE2, and a field effect transistor (FET) having a threshold voltage of VTH, wherein a turn-on voltage VTO of the voltage transient protection device is approximately equal to the sum of VBE1, VBE2, and VTH, that is, VTO≅VBE1+VBE2+VTH. Other embodiments are described and claimed.
摘要翻译：在各种实施例中，公开了用于制造这些结构和装置的电路和半导体器件及其结构和方法。在一个实施例中，公开了双向极性电压瞬变保护装置。电压瞬变保护装置可以包括具有VBE1的导通电压的双极性PNP晶体管，具有VBE2导通电压的双极性NPN晶体管和具有阈值电压VTH的场效应晶体管（FET），其中a 电压瞬变保护装置的导通电压VTO近似等于VBE1，VBE2和VTH的总和，即VTO≅VBE1+ VBE2 + VTH。描述和要求保护其他实施例。

36. 发明授权

US07598588B2 Semiconductor structure and method of manufacture 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US07598588B2
公开(公告)日：2009-10-06
申请号：US11925457
申请日：2007-10-26
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L23/66
CPC分类号： H01L21/76232 , H01L21/76229 , H01L21/764 , H01L23/66 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/371 , H01L2224/37599 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/49175 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures, wherein the plurality of rectilinear structures comprise silicon dioxide and extend from a surface of a semiconductor material to a distance of at least about three microns or greater below the surface of the semiconductor material and wherein a first rectilinear structure of the plurality of rectilinear structures is perpendicular to, or substantially perpendicular to, a second rectilinear structure of the plurality of rectilinear structures. Other embodiments are described and claimed.
摘要翻译：在各种实施例中，公开了制造这些结构的半导体结构和方法。在一个实施例中，半导体器件包括多个直线结构，其中多个直线结构包括二氧化硅并且从半导体材料的表面延伸到半导体材料的表面以下至少约三微米或更大的距离并且其中所述多个直线结构的第一直线结构垂直于所述多个直线结构的第二直线结构或基本垂直于所述多个直线结构的第二直线结构。描述和要求保护其他实施例。

37. 发明申请

US20090108392A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20090108392A1
公开(公告)日：2009-04-30
申请号：US11925457
申请日：2007-10-26
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L23/66
CPC分类号： H01L21/76232 , H01L21/76229 , H01L21/764 , H01L23/66 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/371 , H01L2224/37599 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/49175 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures, wherein the plurality of rectilinear structures comprise silicon dioxide and extend from a surface of a semiconductor material to a distance of at least about three microns or greater below the surface of the semiconductor material and wherein a first rectilinear structure of the plurality of rectilinear structures is perpendicular to, or substantially perpendicular to, a second rectilinear structure of the plurality of rectilinear structures. Other embodiments are described and claimed.
摘要翻译：在各种实施例中，公开了制造这些结构的半导体结构和方法。在一个实施例中，半导体器件包括多个直线结构，其中多个直线结构包括二氧化硅并且从半导体材料的表面延伸到半导体材料的表面以下至少约三微米或更大的距离并且其中所述多个直线结构的第一直线结构垂直于所述多个直线结构的第二直线结构或基本垂直于所述多个直线结构的第二直线结构。描述和要求保护其他实施例。

38. 发明授权

US06617252B2 Monolithic low dielectric constant platform for passive components and method 有权
公开(公告)号：US06617252B2
公开(公告)日：2003-09-09
申请号：US09933314
申请日：2001-08-20
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L21302
CPC分类号： H01L21/764 , H01L23/5227 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a low dielectric constant insulator in a monolithic substrate and the dielectric formed by the method. The method includes formation and patterning of a mask on a silicon substrate followed by anisotropic etching of the silicon to provide a dense array of deep holes. Isotropic etching may be used to form a cavity beneath the dense array of holes and coupling to bottoms of the holes. Sides of the holes are then thermally oxidized. A conventional dielectric is then formed, sealing tops of the holes. The conventional dielectric is optionally densified. Conventional chemical-mechanical polishing then planarizes the dielectric and further conventional processing may be carried out on the wafer to form active circuitry together with passive components such as high Q inductors.

39. 发明授权

US06512283B2 Monolithic low dielectric constant platform for passive components and method 失效
公开(公告)号：US06512283B2
公开(公告)日：2003-01-28
申请号：US09965991
申请日：2001-09-28
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： H01L2900
CPC分类号： H01L21/764 , H01L23/5227 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a low dielectric constant insulator in a monolithic substrate and the dielectric formed by the method. The method includes formation and patterning of a mask on a silicon substrate followed by anisotropic etching of the silicon to provide a dense array of deep holes. Isotropic etching may be used to form a cavity beneath the dense array of holes and coupling to bottoms of the holes. Sides of the holes are then thermally oxidized. A conventional dielectric is then formed, sealing tops of the holes. The conventional dielectric is optionally densified. Conventional chemical-mechanical polishing then planarizes the dielectric and further conventional processing may be carried out on the wafer to form active circuitry together with passive components such as high Q inductors.

40. 发明授权

US06308609B1 Suppressor 有权
标题翻译：抑制器
公开(公告)号：US06308609B1
公开(公告)日：2001-10-30
申请号：US09207498
申请日：1998-12-08
申请人： Robert Bruce Davies
发明人： Robert Bruce Davies
IPC分类号： F41A2130
CPC分类号： F41A21/30
摘要： A method and an apparatus for suppressing muzzle blast and/or muzzle crack in a weapon. An apparatus for reducing muzzle blast upon discharge of one or more projectiles from a gun includes an outer shell and a first end cap adapted to be secured to a muzzle of a weapon and including provisions for detachably coupling to a first end of the outer shell. The apparatus further includes a second end cap adapted to be secured to a distal end of the outer shell and a plurality of baffles disposed between the first end cap and the second end cap. The plurality of baffles each comprise a bore section having an inner diameter no smaller than a bore of the muzzle and a baffle section coupled to the bore section, the baffle section extending from the bore section to the outer shell.
摘要翻译：一种用于抑制武器中的枪口爆裂和/或枪口裂纹的方法和装置。一种用于在从枪射出一个或多个射弹时减少枪口爆炸的装置包括外壳和适于固定在武器枪口上的第一端帽，并且包括用于可拆卸地联接到外壳的第一端的装置。该装置还包括适于固定到外壳的远端的第二端盖和设置在第一端盖和第二端盖之间的多个挡板。所述多个挡板各自包括具有不小于所述枪口孔径的内径的孔部分和连接到所述孔部分的挡板部分，所述挡板部分从所述孔部分延伸到所述外壳。

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