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31. 发明授权

US06934444B2 Beam shaping and practical methods of reducing loss associated with mating external sources and optics to thin silicon waveguides 有权
标题翻译：光束成形和减少与外部光源配合的损耗和光纤到薄硅波导的实际方法
公开(公告)号：US06934444B2
公开(公告)日：2005-08-23
申请号：US10720372
申请日：2003-11-24
申请人： Margaret Ghiron , Prakash Gothoskar , Robert Keith Montgomery , Vipulkumar Patel , Soham Pathak , Kalpendu Shastri , Katherine A. Yanushefski
发明人： Margaret Ghiron , Prakash Gothoskar , Robert Keith Montgomery , Vipulkumar Patel , Soham Pathak , Kalpendu Shastri , Katherine A. Yanushefski
IPC分类号： G02B6/34 , G02B6/42
CPC分类号： G02B6/425 , G02B6/34 , G02B6/4226
摘要： A practical realization for achieving and maintaining high-efficiency transfer of light from input and output free-space optics to a high-index waveguide of sub-micron thickness is described. The required optical elements and methods of fabricating, aligning, and assembling these elements are discussed. Maintaining high coupling efficiency reliably over realistic ranges of device operating parameters is discussed in the context of the preferred embodiments.
摘要翻译：描述了实现和保持从输入和输出自由空间光学器件到亚微米厚度的高折射率波导的高效率传输的实际实现。讨论了所需的光学元件和制造，对准和组装这些元件的方法。在优选实施例的上下文中讨论在设备操作参数的实际范围内可靠地维持高耦合效率。

32. 发明授权

US06917730B2 Arrangements for reducing wavelength sensitivity in prism-coupled SOI-based optical systems 有权
标题翻译：用于降低棱镜耦合的SOI基光学系统中的波长灵敏度的布置
公开(公告)号：US06917730B2
公开(公告)日：2005-07-12
申请号：US10833642
申请日：2004-04-28
申请人： Margaret Ghiron , Prakash Gothoskar , Robert Keith Montgomery , Vipulkumar Patel , Soham Pathak , Kalpendu Shastri , Katherine A. Yanushefski
发明人： Margaret Ghiron , Prakash Gothoskar , Robert Keith Montgomery , Vipulkumar Patel , Soham Pathak , Kalpendu Shastri , Katherine A. Yanushefski
IPC分类号： G02B6/12 , G02B6/34 , G02B6/42 , G02B26/08
CPC分类号： G02B6/12 , G02B6/34 , G02B6/4206 , G02B26/0833
摘要： An optical coupling system for use with multiple wavelength optical signals provides improved coupling efficiency between a free-space optical beam and a relatively thin, surface layer of an SOI structure (“SOI layer”), allowing for sufficient coupling efficiency (greater than 50%) over a predetermined wavelength range. An evanescent coupling layer, disposed between a coupling prism and an SOI layer, is particularly configured to improve the coupling efficiency. In one embodiment, the thickness of the evanescent layer is reduced below an optimum value for a single wavelength, the reduced thickness improving coupling efficiency over a predetermined wavelength range around a defined center wavelength. Alternatively, a tapered thickness evanescent coupling layer may be used to improve coupling efficiency (or a combination of reduced thickness and tapered configuration). Optical beam steering can be combined with a modified evanescent coupling layer to control the input beam launch angle and further improve coupling efficiency.
摘要翻译：用于多波长光信号的光耦合系统提供了自由空间光束与SOI结构（“SOI层”）相对薄的表面层之间的耦合效率的提高，从而允许足够的耦合效率（大于50％）在预定波长范围内。设置在耦合棱镜和SOI层之间的渐逝耦合层特别地被配置成提高耦合效率。在一个实施例中，消逝层的厚度降低到单个波长的最佳值以下，减小的厚度提高了围绕规定的中心波长的预定波长范围的耦合效率。或者，可以使用锥形的厚度渐逝耦合层来提高耦合效率（或减小厚度和锥形配置的组合）。光束转向可以与修改的渐逝耦合层组合，以控制输入光束的发射角度，进一步提高耦合效率。

33. 发明授权

US07706644B2 Offset launch mode from nanotaper waveguide into multimode fiber 有权
标题翻译：从纳米孔波导到多模光纤的偏移发射模式
公开(公告)号：US07706644B2
公开(公告)日：2010-04-27
申请号：US12218367
申请日：2008-07-15
申请人： Mark Webster , Prakash Gothoskar , Vipulkumar Patel , David Piede
发明人： Mark Webster , Prakash Gothoskar , Vipulkumar Patel , David Piede
IPC分类号： G02B6/26
CPC分类号： G02B6/30 , G02B6/3598 , G02B6/3636 , G02B6/3652 , G02B6/3692 , G02B6/4249
摘要： One or more nanotaper coupling waveguides formed within an optical substrate allows for straightforward, reproducible offset launch conditions to be achieved between an incoming signal and the core region of a multimode fiber (which may be disposed along an alignment fixture formed in the optical substrate), fiber array or other multimode waveguiding structure. Offset launching of a single mode signal into a multimode fiber couples the signal into favorable spatial modes which reduce the presence of differential mode dispersion along the fiber. This approach to providing single mode signal coupling into legacy multimode fiber is considered to be an improvement over the prior art which required the use of an interface element between a single mode fiber and multimode fiber, limiting the number of propagating signals and applications for the legacy multimode fiber. An optical switch may be used to select the specific nanotaper(s) for coupling into the multimode fiber.
摘要翻译：形成在光学衬底内的一个或多个纳米锥耦合波导允许在多模光纤（其可以沿着形成在光学衬底中的对准夹具设置）的入射信号和芯区域之间实现简单，可再现的偏移发射条件，光纤阵列或其他多模波导结构。偏移将单模信号发射到多模光纤中将信号耦合到有利的空间模式，这降低了沿着光纤的差分色散的存在。将单模信号耦合提供给传统多模光纤的这种方法被认为是对需要使用单模光纤和多模光纤之间的接口元件的现有技术的改进，限制了传播信号的数量和遗留的应用多模光纤可以使用光学开关来选择用于耦合到多模光纤的特定纳米锥。

34. 发明申请

US20050194990A1 Wafer-level opto-electronic testing apparatus and method 有权
标题翻译：晶圆级光电测试仪器及方法
公开(公告)号：US20050194990A1
公开(公告)日：2005-09-08
申请号：US11075430
申请日：2005-03-08
申请人： Prakash Gothoskar , Margaret Ghiron , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , David Piede , Katherine Yanushefski
发明人： Prakash Gothoskar , Margaret Ghiron , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , David Piede , Katherine Yanushefski
IPC分类号： G01R31/26
CPC分类号： G02B6/30 , G02B6/34 , G02B2006/12107
摘要： A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.
摘要翻译：用于在绝缘体上硅（SOI）晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。光束转向光学元件可以形成在测试元件上，并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件（例如，棱镜耦合器，光栅）之间的耦合。此后，光学测试信号被引导到形成在SOI结构的顶层中的光波导中。光电测试元件还包括多个电测试引脚，其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。光学测试信号结果可以转换为SOI结构内的电气表示，并因此作为电信号返回到测试元件。

35. 发明申请

US20050189591A1 Active manipulation of light in a silicon-on-insulator (SOI) structure 有权
标题翻译：主动操纵绝缘体上硅（SOI）结构中的光
公开(公告)号：US20050189591A1
公开(公告)日：2005-09-01
申请号：US11069852
申请日：2005-02-28
申请人： Prakash Gothoskar , Margaret Ghiron , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski
发明人： Prakash Gothoskar , Margaret Ghiron , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski
IPC分类号： G02B6/12 , H01L27/15
CPC分类号： G02B6/12004 , G02F1/025 , G02F1/292 , G02F2001/294
摘要： An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.) so as to form an active, tunable element.
摘要翻译：用于主动地控制SOI基光学结构内的光的操纵的布置利用形成在SOI层内的掺杂区域和硅绝缘体 - 硅电容（SISCAP）结构的多晶硅层。这些区域相反地掺杂以形成有源器件，其中在相对掺杂区域之间施加电压电位用于改变受影响区域中的折射率并改变传播通过该区域的光信号的特性。可以有利地形成掺杂区域以呈现任何期望的“成形”（例如，透镜，棱镜，布拉格光栅等），以便根据这些器件的已知特性来操纵传播光束。本发明的一个或多个有源器件可以包括在形成SISCAP的SOI基光学元件（例如，诸如Mach-Zehnder干涉仪，环形谐振器，光学开关等）中，以形成活跃的，可调元素。

36. 发明申请

US20050135727A1 EMI-EMC shield for silicon-based optical transceiver 审中-公开
标题翻译：用于硅基光收发器的EMI-EMC屏蔽
公开(公告)号：US20050135727A1
公开(公告)日：2005-06-23
申请号：US11013722
申请日：2004-12-16
申请人： David Piede , Margaret Ghiron , Prakash Gothoskar , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski
发明人： David Piede , Margaret Ghiron , Prakash Gothoskar , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski
IPC分类号： G02B6/42 , G02B6/12
CPC分类号： G02B6/4277 , G02B6/42 , G02B6/4246 , H01L2224/48091 , H01L2224/49175 , H01L2924/00014
摘要： An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.
摘要翻译：基于SOI的光电结构包括在单个SOI层内与其相关联的光学部件一起设置的各种电子部件，形成单片布置。通过在与SOI层相接的外部棱镜耦合器的表面上形成金属化的外层来提供EMI / EMC屏蔽，金属化层包括透明的孔，以允许光信号耦合到SOI层中。棱镜耦合器的相对表面也可以用金属材料涂覆以提供额外的屏蔽。此外，金属屏蔽板可以形成在SOI结构本身上，覆盖EMI敏感电子器件的位置。所有这些金属层最终被耦合到外部接地平面以隔离结构并提供必要的屏蔽。

37. 发明申请

US20050123232A1 Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure 失效
标题翻译：薄硅隔离器（SOI）结构中的平面波导光隔离器
公开(公告)号：US20050123232A1
公开(公告)日：2005-06-09
申请号：US11005286
申请日：2004-12-06
申请人： David Piede , Margaret Ghiron , Prakash Gothoskar , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski , Harvey Wagner
发明人： David Piede , Margaret Ghiron , Prakash Gothoskar , Robert Montgomery , Vipulkumar Patel , Kalpendu Shastri , Soham Pathak , Katherine Yanushefski , Harvey Wagner
IPC分类号： G02B20060101 , G02B6/122 , G02B6/125 , G02B6/26 , G02B6/42
CPC分类号： G02B6/1228 , G02B6/125 , G02B6/4207
摘要： A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved—advantageously within a monolithic arrangement.
摘要翻译：在SOI结构的硅表面层内形成平面光隔离器。正向信号被施加到隔离器的输入波导部分，然后通过非互易波导耦合区域传播到输出波导部分中。后向信号经由输出波导部分进入，然后耦合到不可逆波导结构中，其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。在一个实施例中，非互易结构包括N路定向耦合器（具有一个输出波导，一个输入波导和N-1个隔离波导）。在另一个实施例中，不可逆结构包括波导扩展区域，其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分，使得反射信号的大部分将相对于输入波导部分不匹配。通过级联多个这种平面的基于SOI的结构，可以实现增加的隔离 - 有利地在单片布置中。

38. 发明申请

US20110222812A1 Dopant Profile Control For High Speed Silicon-Based Optical Modulators 有权
标题翻译：高速硅基光调制器的掺杂分布控制
公开(公告)号：US20110222812A1
公开(公告)日：2011-09-15
申请号：US13029342
申请日：2011-02-17
申请人： Mark Webster , Vipulkumar Patel , Prakash Gothoskar , David Piede
发明人： Mark Webster , Vipulkumar Patel , Prakash Gothoskar , David Piede
IPC分类号： G02F1/01
CPC分类号： G02B6/12 , G02B6/26 , G02B26/00 , G02F1/025
摘要： A high speed silicon-based optical modulator with control of the dopant profiles in the body and gate regions of the device reduces the series resistance of the structure without incurring substantial optical power loss. That is, the use of increased dopant values in areas beyond the active region will allow for the series resistance to be reduced (and thus increase the modulating speed of the device) without incurring too large a penalty in signal loss. The dopant profiles within the gate and body regions are tailored to exhibit an intermediate value between the high dopant concentration in the contact areas and the low dopant concentration in the carrier integration window area.
摘要翻译：具有控制器件的主体和栅极区域中的掺杂剂分布的高速硅基光学调制器降低了结构的串联电阻而不会引起实质的光功率损耗。也就是说，在有源区域之外的区域中使用增加的掺杂剂值将允许降低串联电阻（从而增加器件的调制速度），而不会在信号损失中造成太大的惩罚。调整栅极和体区内的掺杂剂分布，以显示接触区域中的高掺杂剂浓度与载流子集成窗口区域中的低掺杂剂浓度之间的中间值。

39. 发明申请

US20090103850A1 Silicon-based optical modulator for analog applications 有权
标题翻译：用于模拟应用的硅基光调制器
公开(公告)号：US20090103850A1
公开(公告)日：2009-04-23
申请号：US12287366
申请日：2008-10-08
申请人： Kaipendu Shastri , Prakash Gothoskar , Vipulkumar Patel , David Piede , Mark Webster
发明人： Kaipendu Shastri , Prakash Gothoskar , Vipulkumar Patel , David Piede , Mark Webster
IPC分类号： G02F1/035
CPC分类号： G02F1/0121 , G02F1/2255 , G02F1/2257 , G02F2001/0152
摘要： A silicon-insulator-silicon capacitive (SISCAP) optical modulator is configured to provide analog operation for applications which previously required the use of relatively large, power-consuming and expensive lithium niobate devices. An MZI-based SISCAP modulator (preferably a balanced arrangement with a SISCAP device on each arm) is responsive to an incoming high frequency electrical signal and is biased in a region where the capacitance of the device is essentially constant and the transform function of the MZI is linear.
摘要翻译：硅 - 绝缘体 - 硅电容（SISCAP）光调制器被配置为为先前需要使用相对较大，耗电和昂贵的铌酸锂器件的应用提供模拟操作。基于MZI的SISCAP调制器（优选地，在每个臂上具有SISCAP器件的平衡布置）响应于输入的高频电信号，并且被偏置在器件的电容基本上恒定的区域中，并且MZI的变换函数是线性的

40. 发明申请

US20070000862A1 Low loss SOI/CMOS compatible silicon waveguide and method of making the same 有权
标题翻译：低损耗SOI / CMOS兼容硅波导及其制造方法
公开(公告)号：US20070000862A1
公开(公告)日：2007-01-04
申请号：US11516217
申请日：2006-09-06
申请人： Vipulkumar Patel , Prakash Gothoskar , Robert Montgomery , Margaret Ghiron
发明人： Vipulkumar Patel , Prakash Gothoskar , Robert Montgomery , Margaret Ghiron
IPC分类号： B29D11/00 , C23F1/00 , B44C1/22
CPC分类号： G02F1/025
摘要： A method and structure for reducing optical signal loss in a silicon waveguide formed within a silicon-on-insulator (SOI) structure uses CMOS processing techniques to round the edges/corners of the silicon material along the extent of the waveguiding region. One exemplary set of processes utilizes an additional, sacrificial silicon layer that is subsequently etched to form silicon sidewall fillets along the optical waveguide, the fillets thus “rounding” the edges of the waveguide. Alternatively, the sacrificial silicon layer can be oxidized to consume a portion of the underlying silicon waveguide layer, also rounding the edges. Instead of using a sacrificial silicon layer, an oxidation-resistant layer may be patterned over a blanket silicon layer, the pattern defined to protect the optical waveguiding region. A thermal oxidation process is then used to convert the exposed portion of the silicon layer into silicon dioxide, forming a bird's beak structure at the edges of the silicon layer, thus defining the “rounded” edges of the silicon waveguiding structure.
摘要翻译：用于减少在绝缘体上硅（SOI）结构中形成的硅波导中的光信号损耗的方法和结构使用CMOS处理技术来沿着波导区域的范围舍入硅材料的边缘/角。一个示例性的工艺集合利用附加的牺牲硅层，其随后被蚀刻以沿着光波导形成硅侧壁圆角，因此圆角“波浪”了波导的边缘。或者，牺牲硅层可以被氧化以消耗下面的硅波导层的一部分，也是边缘的四周。代替使用牺牲硅层，可以在覆盖硅层上图案化抗氧化层，所述图案被限定为保护光波导区域。然后使用热氧化工艺将硅层的暴露部分转化成二氧化硅，在硅层的边缘处形成鸟的喙结构，从而限定硅波导结构的“圆形”边缘。

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