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31. 发明授权

US06172701B2 Light emitting element array chip, light emitting element array drive IC and print head 失效
标题翻译：发光元件阵列芯片，发光元件阵列驱动IC和打印头
公开(公告)号：US06172701B2
公开(公告)日：2001-01-09
申请号：US09106088
申请日：1998-06-29
申请人： Kazuo Tokura , Yukio Nakamura , Mitsuhiko Ogihara , Masumi Taninaka
发明人： Kazuo Tokura , Yukio Nakamura , Mitsuhiko Ogihara , Masumi Taninaka
IPC分类号： B41J247
CPC分类号： G06K15/1247 , B41J2/45
摘要： To achieve a reduction in the size of the print head and a reduction in the cost, LED array chips 1 achieved by matrix-connecting M×N LED elements 2 with M pad electrodes to be scanned 4 and N pad electrodes to be driven 3 and LED array drive ICs 10 are mounted at a mounting substrate 41. The pad electrodes to be driven 3 are connected with drive pad electrodes 16 and the pad electrodes to be scanned 4 are connected with scan pad electrodes 17 through wires 42a and 42b respectively. The pad electrodes to be driven 3 and the pad electrodes to be scanned 4 are provided in a single row along one side or edge of the lengthwise side of the chip. The LED array drive ICs 10 are provided with a scan control unit that sequentially validates the M pad electrodes to be scanned 4 one at a time based upon a scan signal and a data control unit that supplies drive currents to the N pad electrodes to be driven 3 in conformance to individual sets of data to cause N LED elements 2 connected with a valid pad electrode to be scanned 4 to emit light, each time the valid pad electrode to be scanned 4 is switched.
摘要翻译：为了实现打印头的尺寸的减小和成本的降低，通过矩阵连接MxN LED元件2与要扫描的M个焊盘电极4和要驱动的N个焊盘电极3和LED阵列实现的LED阵列芯片1 驱动IC 10安装在安装基板41上。待驱动的焊盘电极3与驱动焊盘电极16连接，并且待扫描的焊盘电极4分别通过导线42a和42b连接到扫描焊盘电极17。待驱动的焊盘电极3和待扫描的焊盘电极4沿着芯片的纵向侧的一侧或边缘设置成单行。 LED阵列驱动IC10设置有扫描控制单元，其基于扫描信号和数据控制单元一次一个地依次验证要扫描的M个焊盘电极，该驱动电流向N个焊盘电极提供驱动电流 3，以使得与有效焊盘电极连接的N个LED元件2被扫描4发光，每次要扫描的有效焊盘电极4被切换。

32. 发明授权

US5955748A End face light emitting type light emitting diode 失效
标题翻译：端面发光型发光二极管
公开(公告)号：US5955748A
公开(公告)日：1999-09-21
申请号：US942302
申请日：1997-10-01
申请人： Yukio Nakamura , Mitsuhiko Ogihara , Masumi Taninaka , Takao Kusano , Masumi Koizumi , Hiroyuki Fujiwara , Makoto Ishimaru , Masaharu Nobori , Tsutomu Nomoto
发明人： Yukio Nakamura , Mitsuhiko Ogihara , Masumi Taninaka , Takao Kusano , Masumi Koizumi , Hiroyuki Fujiwara , Makoto Ishimaru , Masaharu Nobori , Tsutomu Nomoto
IPC分类号： B41J2/44 , B41J2/45 , B41J2/455 , H01L21/301 , H01L33/00 , H01L33/08 , H01L33/20 , H01L33/30 , H01L33/36 , H01L33/44
CPC分类号： B41J2/45 , H01L33/0008 , H01L33/20 , H01L33/44 , H01L2224/48137 , H01L33/0095
摘要： An end facet light emitting type LED has a slanted light emitting side wall relative to a substrate surface. A method for manufacturing end facet light emitting type light emitting devices prevents the pn-junction regions of the devices from being damaged while a semiconductor wafer is diced to separate light emitting devices from one another. A recess is formed on the semiconductor wafer having a depth which is deeper than the pn-junction. A portion to be cut during dicing of the wafer is vertically and horizontally separated from the pn-junction regions, so that if cracks occur when the wafer is diced, the cracks do not affect the light emitting characteristics of the devices.
摘要翻译：端面发光型LED相对于基板表面具有倾斜的发光侧壁。一种用于制造端面发光型发光器件的方法防止了在将半导体晶片切割以将发光器件彼此分离的同时，器件的pn结区域被损坏。在半导体晶片上形成有比pn结深的深度的凹部。在切割晶片期间待切割的部分与pn结区域垂直和水平分离，使得如果在切割晶片时发生裂纹，则裂纹不会影响器件的发光特性。

33. 发明授权

US5700714A Diffusion mask and fabrication method for forming pn-junction elements in a compound semiconductor substrate 失效
标题翻译：用于在化合物半导体衬底中形成pn结元件的扩散掩模和制造方法
公开(公告)号：US5700714A
公开(公告)日：1997-12-23
申请号：US588890
申请日：1996-01-19
申请人： Mitsuhiko Ogihara , Yukio Nakamura , Masumi Koizumi , Masumi Taninaka
发明人： Mitsuhiko Ogihara , Yukio Nakamura , Masumi Koizumi , Masumi Taninaka
IPC分类号： H01L21/18 , H01L21/22 , H01L21/225 , H01L33/12 , H01L33/32 , H01L21/38
CPC分类号： H01L33/0008 , H01L21/2258
摘要： A pn-junction element is formed in a compound semiconductor substrate by depositing an aluminum-nitride film on the surface of the substrate, patterning the aluminum-nitride film to form a diffusion mask, depositing a diffusion source film on the diffusion mask, diffusing an impurity from the diffusion source film into the substrate, and removing the diffusion source film with buffered hydrofluoric acid. Electrode lines can then be formed directly on the aluminum-nitride diffusion mask, which is not etched by buffered hydrofluoric acid.
摘要翻译：在化合物半导体衬底中通过在衬底的表面上沉积氮化铝膜来形成pn结元件，对氮化铝膜进行图案化以形成扩散掩模，在扩散掩模上沉积扩散源膜，扩散从扩散源膜到基板中的杂质，并用缓冲氢氟酸除去扩散源膜。然后可以直接在不被缓冲氢氟酸腐蚀的氮化铝扩散掩模上形成电极线。

34. 发明授权

US06621105B2 Array of light-emitting elements with multilayer wiring 有权
公开(公告)号：US06621105B2
公开(公告)日：2003-09-16
申请号：US10123354
申请日：2002-04-16
申请人： Masumi Taninaka , Mitsuhiko Ogihara
发明人： Masumi Taninaka , Mitsuhiko Ogihara
IPC分类号： H01L3300
CPC分类号： G09G3/14 , B41J2/45 , H01L27/153
摘要： An array of light-emitting elements is divided into cells, the cells are divided into electrically isolated blocks, and a multilayer wiring scheme is employed in which each block has two wire-bonding pads. A first wire leads from the first wire-bonding pad to one of the light-emitting elements in the block. A second wire leads from the second wire-bonding pad to an electrode disposed adjacent to the light-emitting elements in the block, preferably leading to a point near the middle of this electrode. The relative positions of the first and second bonding pads are varied so that the first wire can reach light-emitting elements in different positions in different blocks without crossing the second wire in any block.

35. 发明授权

US08866165B2 Light emitting apparatus 有权
标题翻译：发光装置
公开(公告)号：US08866165B2
公开(公告)日：2014-10-21
申请号：US12923641
申请日：2010-09-30
申请人： Mitsuhiko Ogihara
发明人： Mitsuhiko Ogihara
IPC分类号： H01L29/205 , H01L33/20 , H01L33/38 , H01L33/08 , H01L33/00 , H01L33/42 , H01L25/075 , H01L33/44
CPC分类号： H01L33/08 , H01L25/0753 , H01L33/0079 , H01L33/20 , H01L33/38 , H01L33/42 , H01L33/44 , H01L2224/48091 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： A light emitting apparatus includes a plurality of single crystal semiconductor thin films that emit light. The single crystal semiconductor thin films are secured in intimate contact to the surface of a substrate or a bonding layer formed on the substrate. A first conductive electrode is formed on the single crystal semiconductor thin film and is connected to a first conductive side metal layer. The first conductive side metal layer is closer to the surface of the substrate than a top surface of the single crystal semiconductor thin film. A second conductive electrode is formed on the single crystal semiconductor thin film. A second conductive side metal layer is connected to the second conductive electrode. The second conductive side metal layer is closer to the surface of the substrate than the top surface of the single crystal semiconductor thin film.
摘要翻译：发光装置包括发光的多个单晶半导体薄膜。单晶半导体薄膜牢固地固定在基板的表面或形成在基板上的接合层。第一导电电极形成在单晶半导体薄膜上并连接到第一导电侧金属层。第一导电侧金属层比单晶半导体薄膜的顶面更靠近基板的表面。在单晶半导体薄膜上形成第二导电电极。第二导电侧金属层连接到第二导电电极。第二导电侧金属层比单晶半导体薄膜的顶面更靠近基板的表面。

36. 发明授权

US08664668B2 Combined semiconductor apparatus with semiconductor thin film 有权
标题翻译：具有半导体薄膜的半导体装置
公开(公告)号：US08664668B2
公开(公告)日：2014-03-04
申请号：US12654486
申请日：2009-12-22
申请人： Mitsuhiko Ogihara , Hiroyuki Fujiwara , Masaaki Sakuta , Ichimatsu Abiko
发明人： Mitsuhiko Ogihara , Hiroyuki Fujiwara , Masaaki Sakuta , Ichimatsu Abiko
IPC分类号： H01L27/15
CPC分类号： H01L25/167 , B41J2/45 , H01L27/153 , H01L33/62 , H01L2924/0002 , H01L2924/00
摘要： A combined semiconductor apparatus includes a semiconductor substrate having an integrated circuit, a planarized region formed in a surface of the semiconductor substrate, and a semiconductor thin film including at least one semiconductor device and bonded on the planarized region. A surface of the semiconductor thin film, in which the semiconductor device is formed, is disposed on a side of the planarized region. The apparatus may further include a planarized film disposed between the planarized region and the semiconductor thin film.
摘要翻译：组合半导体装置包括具有集成电路的半导体衬底，形成在半导体衬底的表面中的平坦化区域，以及包含至少一个半导体器件并结合在平坦化区域上的半导体薄膜。其中形成有半导体器件的半导体薄膜的表面设置在平坦化区域的一侧。该装置还可以包括设置在平坦化区域和半导体薄膜之间的平坦化膜。

37. 发明授权

US08524366B2 Graphene wafer, method for manufacturing the graphene wafer, method for releasing a graphene layer, and method for manufacturing a graphene device 有权
标题翻译：石墨烯晶片，石墨烯晶片的制造方法，石墨烯层的脱模方法以及石墨烯装置的制造方法
公开(公告)号：US08524366B2
公开(公告)日：2013-09-03
申请号：US12801720
申请日：2010-06-22
申请人： Mitsuhiko Ogihara , Tomohiko Sagimori , Masaaki Sakuta , Akihiro Hashimoto , Satoru Tanaka
发明人： Mitsuhiko Ogihara , Tomohiko Sagimori , Masaaki Sakuta , Akihiro Hashimoto , Satoru Tanaka
IPC分类号： B32B9/00
CPC分类号： H01L21/2007 , H01L21/02378 , H01L21/02527 , H01L21/02664
摘要： A method is used for releasing a graphene layer from a substrate. A graphene layer is first formed on a surface of a first substrate. A metal layer is then formed on a surface of the graphene layer. A pulling force is then applied to the metal layer to detach the graphene layer from the first substrate. The released graphene layer is bonded by intermolecular force onto a surface of a second substrate separate from the first substrate or onto a surface of a bonding layer formed on the surface of the second substrate. The metal layer is then removed, by for example, etching.
摘要翻译：一种用于从基底释放石墨烯层的方法。首先在第一基板的表面上形成石墨烯层。然后在石墨烯层的表面上形成金属层。然后将拉力施加到金属层以将石墨烯层与第一基板分离。释放的石墨烯层通过分子间力粘合到与第一基板分离的第二基板的表面上或者形成在第二基板的表面上的接合层的表面上。然后通过例如蚀刻去除金属层。

38. 发明授权

US08395159B2 Semiconductor apparatus with thin semiconductor film 有权
标题翻译：具有薄半导体膜的半导体器件
公开(公告)号：US08395159B2
公开(公告)日：2013-03-12
申请号：US12591475
申请日：2009-11-20
申请人： Mitsuhiko Ogihara , Hiroyuki Fujiwara , Masaaki Sakuta , Ichimatsu Abiko
发明人： Mitsuhiko Ogihara , Hiroyuki Fujiwara , Masaaki Sakuta , Ichimatsu Abiko
IPC分类号： H01L29/04 , H01L29/22
CPC分类号： G03G15/043 , B41J2/45 , H01L27/153 , H01L33/62 , H01L2224/48137
摘要： A semiconductor apparatus includes a substrate having at least one terminal, a thin semiconductor film including at least one semiconductor device, the thin semiconductor film being disposed and bonded on the substrate; and an individual interconnecting line formed as a thin conductive film extending from the semiconductor device in the thin semiconductor film to the terminal in the substrate, electrically connecting the semiconductor device to the terminal. Compared with conventional semiconductor apparatus, the invented apparatus is smaller and has a reduced material cost.
摘要翻译：半导体装置包括具有至少一个端子的基板，包括至少一个半导体器件的薄半导体膜，所述薄半导体膜设置并接合在所述基板上; 以及形成为从薄半导体膜中的半导体器件延伸到衬底中的端子的薄导电膜的单独互连线，将半导体器件电连接到端子。与传统的半导体装置相比，本发明的装置更小，材料成本降低。

39. 发明授权

US08304792B2 Semiconductor light emitting apparatus and optical print head 有权
标题翻译：半导体发光装置和光学打印头
公开(公告)号：US08304792B2
公开(公告)日：2012-11-06
申请号：US12347144
申请日：2008-12-31
申请人： Yusuke Nakai , Hironori Furuta , Mitsuhiko Ogihara , Hiroyuki Fujiwara
发明人： Yusuke Nakai , Hironori Furuta , Mitsuhiko Ogihara , Hiroyuki Fujiwara
IPC分类号： H01L33/02
CPC分类号： H01L33/0041 , H01L33/38 , H01S5/06203
摘要： A semiconductor light emitting apparatus is supplied capable of providing a high performance that can optimize simultaneously both an electrical characteristic and a light emitting characteristic. The semiconductor apparatus comprises an anode layer; a cathode layer that has a conductive type different from that of the anode layer; a gate layer that controls an electrical conduction between the anode layer and the cathode layer; an active layer that is set between the anode layer and the cathode layer and emits light through recombination of electron and positive hole; a first cladding layer that is set on one surface of the active layer and has an energy band gap larger than that of the active layer; and a second cladding layer that is set on other surface of the active layer, has an energy band gap larger than that of the active layer and has a conductive type different from that of the first cladding layer, wherein a thickness of the gate layer is or below a mean free path of carriers implanted into the gate layer.
摘要翻译：提供能够提供同时优化电特性和发光特性的高性能的半导体发光装置。半导体装置包括阳极层; 阴极层，其具有与阳极层不同的导电类型; 栅极层，其控制所述阳极层和所述阴极层之间的导电; 设置在阳极层和阴极层之间并通过电子和空穴的复合发光的有源层; 第一包层，其设置在所述有源层的一个表面上，并且具有比所述有源层的能带隙大的能带隙; 以及设置在有源层的其他表面上的第二包层具有比有源层的能带隙大的能带隙，并且具有与第一包层不同的导电类型，其中栅极层的厚度为或低于植入栅极层的载流子的平均自由程。

40. 发明授权

US08216366B2 Method for manufacturing a cubic silicon carbide single crystal thin film and semiconductor device based on the cubic silicon carbide single crystal thin film 有权
标题翻译：立方碳化硅单晶薄膜的制造方法和立方碳化硅单晶薄膜的半导体装置
公开(公告)号：US08216366B2
公开(公告)日：2012-07-10
申请号：US12662637
申请日：2010-04-27
申请人： Mitsuhiko Ogihara , Masaaki Sakuta
发明人： Mitsuhiko Ogihara , Masaaki Sakuta
IPC分类号： C30B23/00 , C30B25/00
CPC分类号： H01L21/0237 , H01L21/02395 , H01L21/02463 , H01L21/02472 , H01L21/02502 , H01L21/02529 , H01L21/7602 , H01L29/1608 , H01L29/2003
摘要： A cubic silicon carbide single crystal thin film is manufactured by a method. A sacrificial layer is formed on a surface of a substrate. A cubic semiconductor layer is formed on the sacrificial layer, the cubic semiconductor layer having at least a surface of cubic crystal structure. A cubic silicon carbide single crystal layer is formed on the cubic semiconductor layer. The sacrificial layer is etched away to release a multilayer structure of the cubic semiconductor layer and the 3C—SiC layer from the substrate. A cubic silicon carbide single crystal thin film of a multilayer structure includes an AlxGa1-xAs (0.6>x≧0) layer and a cubic silicon carbide single crystal layer. A metal layer is formed on a substrate. The multilayer structure is bonded to the metal layer with the AlxGa1-xAs (0.6>x≧0) in direct contact with the metal layer.
摘要翻译：通过一种方法制造立方碳化硅单晶薄膜。牺牲层形成在基板的表面上。在牺牲层上形成立方晶系半导体层，立方晶半导体层至少具有立方晶系结构的表面。在立方体半导体层上形成立方碳化硅单晶层。蚀刻牺牲层以从衬底释放立方体半导体层和3C-SiC层的多层结构。多层结构的立方碳化硅单晶薄膜包括Al x Ga 1-x As（0.6>x≥0）层和立方碳化硅单晶层。在基板上形成金属层。多层结构与金属层直接接触的Al x Ga 1-x As（0.6>x≥0）结合到金属层上。

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