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31. 发明申请

US20070249120A1 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20070249120A1
公开(公告)日：2007-10-25
申请号：US11785694
申请日：2007-04-19
申请人： Hirokazu Ishida , Masayuki Tanaka
发明人： Hirokazu Ishida , Masayuki Tanaka
IPC分类号： H01L21/336 , H01L29/94
CPC分类号： H01L27/115 , H01L27/11521
摘要： A nonvolatile semiconductor memory device includes a first dielectric layer formed on the major surface of a semiconductor substrate, a floating gate electrode layer formed on the first dielectric layer, a second dielectric layer obtained by sequentially forming, on the floating gate electrode layer, a lower dielectric film mainly containing silicon and nitrogen, an intermediate dielectric film, and an upper dielectric film mainly containing silicon and nitrogen, a control gate electrode layer formed on the second dielectric layer, and a buried dielectric layer formed by covering the two side surfaces in the gate width direction of the stacked structure including the above-mentioned layers. The nonvolatile semiconductor memory device further includes a silicon oxide film formed near the buried dielectric layer in the interface between the floating gate electrode layer and lower dielectric film.
摘要翻译：非易失性半导体存储器件包括形成在半导体衬底的主表面上的第一电介质层，形成在第一电介质层上的浮栅电极层，通过在浮栅电极层上依次形成下层主要含有硅和氮的电介质膜，中间电介质膜和主要含有硅和氮的上电介质膜，形成在第二介电层上的控制栅极电极层和通过覆盖第二电介质层中的两个侧表面而形成的掩埋电介质层包括上述层的层叠结构的栅极宽度方向。非易失性半导体存储器件还包括在浮置栅极电极层和下部电介质膜之间的界面中形成在掩埋电介质层附近的氧化硅膜。

32. 发明申请

US20070235799A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20070235799A1
公开(公告)日：2007-10-11
申请号：US11763070
申请日：2007-06-14
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

33. 发明授权

US07247916B2 Nonvolatile semiconductor memory and manufacturing method for the same 有权
标题翻译：非易失性半导体存储器及其制造方法相同
公开(公告)号：US07247916B2
公开(公告)日：2007-07-24
申请号：US11267334
申请日：2005-11-07
申请人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
发明人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L27/11524 , H01L29/42324 , H01L29/7883
摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.
摘要翻译：存储单元矩阵包括（a）沿着列方向延伸的多个器件隔离膜，（b）沿着行和列方向布置的第一导电层，相邻的第一导电层组通过设置的隔离膜相互隔离（c）分别布置在相应的第一导电层的顶部上的下部电极间电介质，（d）布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质， - 电极介质，和（e）布置在上部电极间电介质上的沿着行方向延伸的第二导电层。

34. 发明授权

US07005714B2 Nonvolatile semiconductor memory and manufacturing method for the same 有权
公开(公告)号：US07005714B2
公开(公告)日：2006-02-28
申请号：US10724103
申请日：2003-12-01
申请人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
发明人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L27/11524 , H01L29/42324 , H01L29/7883
摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

35. 发明申请

US20050260081A1 Vacuum pumping system and method for monitoring of the same 审中-公开
标题翻译：真空泵系统及其监控方法
公开(公告)号：US20050260081A1
公开(公告)日：2005-11-24
申请号：US11190941
申请日：2005-07-28
申请人： Masayuki Tanaka , Takashi Nakao , Yukihiro Ushiku
发明人： Masayuki Tanaka , Takashi Nakao , Yukihiro Ushiku
IPC分类号： F04B49/10 , C23C16/44 , F04B37/16 , H01L21/02 , F04B49/00 , F04B1/00
CPC分类号： C23C16/4412
摘要： A vacuum pumping system includes: an evacuation conduit, having a sequence of monitoring zones serially assigned in an exhaust direction; sensors respectively provided to the monitoring zones and independently detecting the conditions of the monitoring zones; heaters respectively provided to the monitoring zones and being paired with the sensors; and a control unit receiving data signals from the sensors, comparing the data signals with a threshold value, and when the data signals from a specific sensor exceed the threshold value, selectively supplying heating power to a heater of the monitoring zone where the specific sensor is provided.
摘要翻译：真空泵系统包括：排气管，具有在排气方向上串联排列的一系列监测区; 传感器分别提供给监控区并独立检测监控区的状况; 加热器分别设置在监控区域并与传感器配对; 以及控制单元，其从所述传感器接收数据信号，将所述数据信号与阈值进行比较，并且当来自特定传感器的数据信号超过所述阈值时，选择性地向所述监测区域的加热器供应加热功率，提供。

36. 发明申请

US20050014354A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050014354A1
公开(公告)日：2005-01-20
申请号：US10916500
申请日：2004-08-12
申请人： Yoshio Ozawa , Masayuki Tanaka , Kiyotaka Miyano , Shigehiko Saida
发明人： Yoshio Ozawa , Masayuki Tanaka , Kiyotaka Miyano , Shigehiko Saida
IPC分类号： H01L29/78 , H01L29/49 , H01L21/338 , H01L21/3205 , H01L21/4763
CPC分类号： H01L29/4983 , H01L29/41783 , H01L29/6656
摘要： A semiconductor device includes a semiconductor device comprising a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulation film formed on the semiconductor substrate, a gate electrode formed on the gate insulation film between the source/drain regions, and a gate sidewall spacer formed on side surfaces of the gate electrode, wherein the gate sidewall spacer is composed of silicon oxide containing 0.1-30 atomic % of chlorine.
摘要翻译：半导体器件包括半导体器件，其包括半导体衬底，形成在半导体衬底中的源极/漏极区域，形成在半导体衬底上的栅极绝缘膜，形成在源极/漏极区域之间的栅极绝缘膜上的栅电极和形成在栅电极的侧表面上的栅极侧壁间隔物，其中栅极侧壁间隔物由含有0.1-30原子％氯的氧化硅组成。

37. 发明申请

US20050002231A1 Nonvolatile semiconductor memory and manufacturing method for the same 有权
标题翻译：非易失性半导体存储器及其制造方法相同
公开(公告)号：US20050002231A1
公开(公告)日：2005-01-06
申请号：US10724103
申请日：2003-12-01
申请人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
发明人： Yoshio Ozawa , Masayuki Tanaka , Fumitaka Arai
IPC分类号： G11C11/34 , H01L21/28 , H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L27/11524 , H01L29/42324 , H01L29/7883
摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.
摘要翻译：存储单元矩阵包括（a）沿着列方向延伸的多个器件隔离膜，（b）沿着行和列方向布置的第一导电层，相邻的第一导电层组通过设置的隔离膜相互隔离（c）分别布置在相应的第一导电层的顶部上的下部电极间电介质，（d）布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质， - 电极介质，和（e）布置在上部电极间电介质上的沿着行方向延伸的第二导电层。

38. 发明授权

US06810663B2 Fluid pressure circuit control system 失效
标题翻译：流体压力回路控制系统
公开(公告)号：US06810663B2
公开(公告)日：2004-11-02
申请号：US10344087
申请日：2003-02-07
申请人： Hideo Konishi , Seiichi Akiyama , Masayuki Tanaka
发明人： Hideo Konishi , Seiichi Akiyama , Masayuki Tanaka
IPC分类号： E02F922
CPC分类号： E02F9/2285 , E02F3/965 , E02F9/2228 , E02F9/2242 , E02F9/2292 , F15B11/162 , F15B11/167 , F15B11/17 , F15B2211/3057 , F15B2211/3059 , F15B2211/3116 , F15B2211/6316 , F15B2211/6355 , F15B2211/7142 , F15B2211/781
摘要： Hydraulic oil supplied from pumps (12),(13) to an attachment actuator (60) is controlled by attachment control valves (27),(28). Hydraulic oil supplied from pumps (12),(13) to other actuators (52),(54),(56),(58) is controlled by other control valves (21) through (26). Control conditions for operating the attachment actuator (60) alone and control conditions for operating the attachment actuator (60) simultaneously with any of the other actuators (52),(54),(56),(58) are discriminated by the pilot pressure sensors (32),(34),(36),(38). Control characteristics of the attachment control valves (27),(28) are controlled by a controller (43) based on the discriminated control conditions.

39. 发明授权

US06774462B2 Semiconductor device comprising dual silicon nitride layers with varying nitrogen ratio 有权
标题翻译：包括具有不同氮比的双重氮化硅层的半导体器件
公开(公告)号：US06774462B2
公开(公告)日：2004-08-10
申请号：US10278882
申请日：2002-10-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Shigehiko Saida , Akira Goda , Mitsuhiro Noguchi , Yuichiro Mitani , Yoshitaka Tsunashima
发明人： Masayuki Tanaka , Yoshio Ozawa , Shigehiko Saida , Akira Goda , Mitsuhiro Noguchi , Yuichiro Mitani , Yoshitaka Tsunashima
IPC分类号： H01L2358
CPC分类号： H01L21/022 , H01L21/0217 , H01L21/28176 , H01L21/28202 , H01L21/28247 , H01L21/28282 , H01L21/28518 , H01L21/3185 , H01L21/76838 , H01L21/76897 , H01L29/513 , H01L29/518 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/792
摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a gate electrode, a first insulating film formed between the semiconductor substrate and the gate electrode, and a second insulating film formed along a top surface or a side surface of the gate electrode and including a lower silicon nitride film containing nitrogen, silicon and hydrogen and an upper silicon nitride film formed on the lower silicon nitride film and containing nitrogen, silicon and hydrogen, and wherein a composition ratio N/Si of nitrogen (N) to silicon (Si) in the lower silicon nitride film is higher than that in the upper silicon nitride film.
摘要翻译：公开了一种半导体器件，包括半导体衬底，栅电极，形成在半导体衬底和栅电极之间的第一绝缘膜，以及沿着栅电极的顶表面或侧表面形成的第二绝缘膜，包含氮，硅和氢的氮化硅膜和形成在下部氮化硅膜上并含有氮，硅和氢的上部氮化硅膜，并且其中氮（N）与硅（Si）的组成比N / Si在下氮化硅膜比上述氮化硅膜高。

40. 发明授权

US06754172B1 Non-interruptive protection switching device and network system using the same 失效
标题翻译：非中断保护开关器件和网络系统使用相同
公开(公告)号：US06754172B1
公开(公告)日：2004-06-22
申请号：US09723116
申请日：2000-11-27
申请人： Masayuki Tanaka , Masaki Kubo , Satoshi Nemoto , Shuji Sakakura , Shigeo Handa , Yuji Kamura
发明人： Masayuki Tanaka , Masaki Kubo , Satoshi Nemoto , Shuji Sakakura , Shigeo Handa , Yuji Kamura
IPC分类号： H04J306
CPC分类号： H04J3/0623 , H04J3/085 , H04J2203/0042 , H04J2203/006 , H04J2203/0096
摘要： A non-interruptive protection switching device which performs protection switching in a more efficient and robust way. The device has a working-channel signal storage unit to store data signals received through a working channel. Multiframe synchronization timings are detected by a working-channel multiframe synchronization controller, which provides a working-channel multiframe sync detection pulse signal when the main signals are in a normal condition and stops it when the channel is disrupted. A working-channel write controller controls every write access to the working-channel signal storage unit, generating a write pulse signal therefor. The working-channel write controller also produces working-channel write phase data by identifying a phase difference of the detected multiframe synchronization timing with respect to a reference phase signal. The generation of this write pulse signal is based on the multiframe sync detection pulse signal when the working-channel multiframe sync detection pulse signal is available, or on a free-running timebase when it is stopped. The stored data in the working- and protection-channel signal storage units are read out simultaneously, under the control of a read controller which produces read pulses from the write phase data.
摘要翻译：一种非中断保护切换装置，以更有效和鲁棒的方式进行保护倒换。该设备具有工作信道信号存储单元，用于存储通过工作信道接收的数据信号。多帧同步定时由工作信道复帧同步控制器检测，当主信号处于正常状态时，该帧同步控制器提供工作信道复帧同步检测脉冲信号，并在通道中断时停止。工作通道写入控制器控制对工作通道信号存储单元的每个写入访问，产生写入脉冲信号。工作通道写入控制器还通过相对于参考相位信号识别检测到的多帧同步定时的相位差来产生工作通道写入相位数据。当工作信道复帧同步检测脉冲信号可用时，或者在停止时的自由运行时基上，该写入脉冲信号的产生基于多帧同步检测脉冲信号。工作和保护通道信号存储单元中存储的数据在读写控制器的控制下被同时读出，读控制器从写相位数据产生读脉冲。

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