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31. 发明授权

US07750512B2 Image forming apparatus 有权
标题翻译：图像形成装置
公开(公告)号：US07750512B2
公开(公告)日：2010-07-06
申请号：US12053159
申请日：2008-03-21
申请人： Masahiko Kimura
发明人： Masahiko Kimura
IPC分类号： H01H9/54
CPC分类号： H02J1/102 , H02J2001/008 , Y10T307/696 , Y10T307/944
摘要： An image forming apparatus according to an aspect of the invention is operable in a first mode in which a first unit group comprising at least one of a plurality of functional units is activated and a second mode in which a second unit group comprising at least one of the plurality of functional units is activated. In the first mode, a control unit is operable to: activate a first power source circuit; input a first voltage to a third power source circuit; and supply an operation voltage converted by the third power source circuit to the first unit group. In the second mode, the control unit is operable to: activate a second power source circuit and deactivate the first power source circuit; and supply a second voltage output from the second power source circuit to the second unit group without intervention of the third power source circuit.
摘要翻译：根据本发明的一个方面的图像形成装置可以在第一模式中操作，其中包括多个功能单元中的至少一个功能单元的第一单元组被激活，并且第二模式，其中第二单元组包括以下各项中的至少一个：多个功能单元被激活。在第一模式中，控制单元可操作以：激活第一电源电路; 向第三电源电路输入第一电压; 并且将由第三电源电路转换的操作电压提供给第一单元组。在第二模式中，控制单元可操作地：激活第二电源电路并使第一电源电路停用; 并且在没有所述第三电源电路的介入的情况下，将从所述第二电源电路输出的第二电压提供给所述第二单元组。

32. 发明授权

US07467339B2 Semiconductor integrated circuit and a method of testing the same 有权
公开(公告)号：US07467339B2
公开(公告)日：2008-12-16
申请号：US11329229
申请日：2006-01-11
申请人： Toshihiro Tanaka , Yutaka Shinagawa , Masahiko Kimura , Isao Nakamura
发明人： Toshihiro Tanaka , Yutaka Shinagawa , Masahiko Kimura , Isao Nakamura
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G11C29/021 , G01R31/30 , G01R31/31703 , G01R31/31725 , G01R31/3187 , G06F11/24 , G11C16/04 , G11C29/02 , G11C29/028 , G11C29/50012 , G11C2029/5004
摘要： A semiconductor integrated circuit (LSI) in which control information for determining a voltage or a width of a pulse produced itself can easily be set in parallel with other LSIs, and set information can be corrected easily. From an external evaluation device, a voltage of an expected value is supplied in overlapping manner to a plurality of LSIs each having a CPU and a flash memory. Each LSI incorporates a comparison circuit comparing an expected voltage value and a boosted voltage generated in itself. The CPU refers to a comparison result and optimizes control data in a data register for changing a boosted voltage. The CPU controls the comparison circuit and the data register and performs trimming in a self-completion manner, thereby making, trimming on a plurality of LSIs easily in a parallel manner and a total test time reduced.

33. 发明授权

US07000160B2 Semiconductor integrated circuit and a method of testing the same 有权
公开(公告)号：US07000160B2
公开(公告)日：2006-02-14
申请号：US10083399
申请日：2002-02-27
申请人： Toshihiro Tanaka , Yutaka Shinagawa , Masahiko Kimura , Isao Nakamura
发明人： Toshihiro Tanaka , Yutaka Shinagawa , Masahiko Kimura , Isao Nakamura
IPC分类号： G01R31/28
CPC分类号： G11C29/021 , G01R31/30 , G01R31/31703 , G01R31/31725 , G01R31/3187 , G06F11/24 , G11C16/04 , G11C29/02 , G11C29/028 , G11C29/50012 , G11C2029/5004
摘要： A semiconductor integrated circuit (LSI) in which control information for determining a voltage or a width of a pulse produced itself can easily be set in parallel with other LSIs, and set information can be corrected easily. From an external evaluation device, a voltage of an expected value is supplied in overlapping manner to a plurality of LSIs each having a CPU and a flash memory. Each LSI incorporates a comparison circuit comparing an expected voltage value and a boosted voltage generated in itself. The CPU refers to a comparison result and optimizes control data in a data register for changing a boosted voltage. The CPU controls the comparison circuit and the data register and performs trimming in a self-completion manner, thereby making, trimming on a plurality of LSIs easily in a parallel manner and a total test time reduced.

34. 发明授权

US06988300B2 Method of producing a piezoelectric element 失效
标题翻译：压电元件的制造方法
公开(公告)号：US06988300B2
公开(公告)日：2006-01-24
申请号：US10033929
申请日：2001-12-19
申请人： Akira Ando , Koichi Hayashi , Masahiko Kimura
发明人： Akira Ando , Koichi Hayashi , Masahiko Kimura
IPC分类号： H04R17/00
CPC分类号： H03H9/178 , H01L41/0471 , H01L41/0472 , H01L41/083 , H01L41/257 , H03H3/02 , Y10T29/42 , Y10T29/49005 , Y10T29/49011 , Y10T29/4902 , Y10T29/4908 , Y10T29/49126 , Y10T29/49155
摘要： A piezoelectric element contains a piezoelectric ceramic body having a layered perovskite structure, and has the C axis selected and oriented in the thickness direction. In the piezoelectric ceramic body, line shaped electrodes are formed perpendicular to the C axis selected and oriented. The electrodes exposed at both of the end faces of the piezoelectric ceramic body are covered with conductive materials and insulation materials. The piezoelectric ceramic body is polarized in the opposite directions on both of the sides of electrodes arranged in the width direction. Moreover, external electrodes are formed on the faces where the conductive materials and the insulation materials are formed, whereby two groups of the electrodes are arranged in an interdigital electrode form.
摘要翻译：压电元件包含具有层状钙钛矿结构的压电陶瓷体，并且具有沿厚度方向选择并取向的C轴。在压电陶瓷体中，线状电极垂直于所选定向的C轴形成。在压电陶瓷体的两个端面上露出的电极被导电材料和绝缘材料覆盖。压电陶瓷体在沿宽度方向布置的电极的两侧沿相反方向极化。此外，在形成导电材料和绝缘材料的表面上形成外部电极，由此两组电极以交叉指型电极形式布置。

35. 发明授权

US06734606B2 Piezoelectric ceramic composition and piezoelectric ceramic element using the same 有权
标题翻译：压电陶瓷组合物和使用其的压电陶瓷元件
公开(公告)号：US06734606B2
公开(公告)日：2004-05-11
申请号：US10300584
申请日：2002-11-21
申请人： Masahiko Kimura , Hirozumi Ogawa , Takuya Sawada , Akira Ando
发明人： Masahiko Kimura , Hirozumi Ogawa , Takuya Sawada , Akira Ando
IPC分类号： H01L41187
CPC分类号： C04B35/495 , C04B2235/3213 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3251 , C04B2235/3262 , C04B2235/3298 , C04B2235/604 , H01L41/187
摘要： A piezoelectric ceramic composition includes a bismuth layered compound containing Sr, Bi, Nb and a metal element other than Bi having a valence of 3. The bismuth layered compound satisfies the relational expressions: 0.275
摘要翻译：压电陶瓷组合物包括含有Sr，Bi，Nb的铋层状化合物和具有化合价3的Bi以外的金属元素。铋层状化合物满足关系式：0.275

36. 发明授权

US06558567B2 Piezoelectric ceramic compact and piezoelectric ceramic device using the same 失效
公开(公告)号：US06558567B2
公开(公告)日：2003-05-06
申请号：US09860983
申请日：2001-05-18
申请人： Masahiko Kimura , Takuya Sawada , Akira Ando
发明人： Masahiko Kimura , Takuya Sawada , Akira Ando
IPC分类号： C04B35462
CPC分类号： H03H3/02 , C04B35/475 , H01L41/187
摘要： Provided is a piezoelectric ceramic compact useful as a material for a piezoelectric ceramic compact device or the like, having SrBi4Ti4O15 as a main component, containing no or a small amount of lead or lead compound, and exhibiting a Qmax improved to a level permitting practical use application. The piezoelectric ceramic compact includes a bismuth layer compound as a main component composed of Sr, Bi, Ti and oxygen, and when the molar ratio of Sr, Bi and Ti of the bismuth layer compound as the main component is a:b:c, the relations of 0.13≦a/c

37. 发明授权

US06445110B1 Piezoelectric device 失效
公开(公告)号：US06445110B1
公开(公告)日：2002-09-03
申请号：US09578131
申请日：2000-05-24
申请人： Masahiko Kimura , Akira Ando , Takuya Sawada , Hirozumi Ogawa
发明人： Masahiko Kimura , Akira Ando , Takuya Sawada , Hirozumi Ogawa
IPC分类号： H01L4104
CPC分类号： H03H9/177 , C04B35/475 , C04B35/6262 , C04B2235/3208 , C04B2235/604 , C04B2235/787 , H01L41/1878 , H03H9/02031 , H03H9/02157
摘要： A piezoelectric device having an electromechanical coefficient, which can be applied to practical uses, is obtained by an energy-trapping effect using a piezoelectric ceramic having a layered perovskite structure provided with high-temperature resistance and little high-frequency loss. The piezoelectric device has a substrate formed of a piezoelectric ceramic having a layered perovskite structure. The c-axis in the substrate is preferentially oriented in the width direction thereof, and the substrate is polarized in the longitudinal direction. Two electrodes are formed on both main surfaces of the substrate so as to oppose each other in the vicinity of the central part thereof. As a material used for the substrate, a piezoelectric ceramic composition primarily composed of a ceramic composition represented by the general formula CaBi4Ti4O15 is preferably used.

38. 发明授权

US06423244B1 Piezoelectric ceramic composition and piezoelectric ceramic device using the same 失效
标题翻译：压电陶瓷组合物和使用其的压电陶瓷装置
公开(公告)号：US06423244B1
公开(公告)日：2002-07-23
申请号：US09639600
申请日：2000-08-16
申请人： Takuya Sawada , Masahiko Kimura , Akira Ando , Koichi Hayashi
发明人： Takuya Sawada , Masahiko Kimura , Akira Ando , Koichi Hayashi
IPC分类号： H01B312
CPC分类号： C04B35/453 , C04B35/495 , H01L41/187
摘要： A piezoelectric ceramic composition mainly contains a component of the formula SrBi2Nb2O9 and includes at least a trivalent metallic element other than Bi constituting the main component in a proportion of more than 0 mol and equal to or less than about 0.15 mol relative to 1 mol of Bi in the main component. This piezoelectric ceramic composition mainly containing SrBi2Nb2O9 is useful as a material for a piezoelectric ceramic device having an improved temperature-dependent factor of resonant frequency. Such a satisfactory piezoelectric ceramic device is also provided using this piezoelectric ceramic composition.
摘要翻译：压电陶瓷组合物主要含有式SrBi 2 Nb 2 O 9的成分，除了构成主成分的Bi以外的至少三价金属元素，其比例相对于1摩尔的Bi大于0摩尔且等于或小于约0.15摩尔在主要组成部分。主要含SrBi2Nb2O9的压电陶瓷组合物可用作具有改善的谐振频率的温度依赖因子的压电陶瓷器件的材料。使用这种压电陶瓷组合物也提供了这种令人满意的压电陶瓷装置。

39. 发明授权

US06372152B1 Piezoelectric ceramic composition and ceramic piezoelectric device employing the composition 有权
标题翻译：采用该组合物的压电陶瓷组合物和陶瓷压电装置
公开(公告)号：US06372152B1
公开(公告)日：2002-04-16
申请号：US09643785
申请日：2000-08-22
申请人： Takuya Sawada , Masahiko Kimura , Akira Ando , Koichi Hayashi
发明人： Takuya Sawada , Masahiko Kimura , Akira Ando , Koichi Hayashi
IPC分类号： H01B312
CPC分类号： H01L41/187 , C04B35/475
摘要： To provide a piezoelectric ceramic composition predominantly comprising CaBi4Ti4O15, which composition can be fired at 1100° C. or lower, which exhibits an electromechanical coupling coefficient (kt) of a sufficient level for practical use, and which serves as a useful material for producing ceramic piezoelectric devices such as piezoelectric filters, piezoelectric oscillators and piezoelectric transducers, and to provide a ceramic piezoelectric device employing the composition, the piezoelectric ceramic composition comprises a component represented by the formula CaBi4Ti4O15, wherein the composition contains W in an amount of about 0.5 mol or less per mol of Bi.
摘要翻译：为了提供主要包含CaBi 4 Ti 4 O 15的压电陶瓷组合物，该组合物可以在1100℃或更低的温度下焙烧，其表现出实际使用的足够水平的机电耦合系数（kt），并且其用作生产陶瓷的有用材料压电陶瓷组合物包括由式CaBi 4 Ti 4 O 15表示的组分，其中组合物含有约0.5mol的量的W或每摩尔Bi少。

40. 发明授权

US06299815B1 Process for producing piezoelectric ceramics 失效
标题翻译：制造压电陶瓷的工艺
公开(公告)号：US06299815B1
公开(公告)日：2001-10-09
申请号：US09640253
申请日：2000-08-16
申请人： Masahiko Kimura , Akira Ando
发明人： Masahiko Kimura , Akira Ando
IPC分类号： B29C7100
CPC分类号： C04B35/465 , C04B35/495 , C04B35/653 , H01L41/1878 , H01L41/41
摘要： A ceramic composition (sample) includes CaBi4Ti4O15 or another compound having a layered perovskite crystal structures and exhibiting ferroelectricity at ordinary temperature. The ceramic composition (sample) is then heated to a temperature higher than the melting point of the ceramic composition to make the ceramic composition molten or semi-molten. The ceramic composition is then annealed and solidified to yield a grain oriented ceramic (porcelain). This process can produce grain oriented ceramics from ceramic compositions mainly containing a compound having a layered perovskite crystal structure, and can improve electromechanical coefficients of piezoelectric ceramics containing a compound having a layered perovskite crystal structure.
摘要翻译：陶瓷组合物（样品）包括CaBi 4 Ti 4 O 15或具有层状钙钛矿晶体结构并在常温下显示出铁电性的另一种化合物。然后将陶瓷组合物（样品）加热到高于陶瓷组合物的熔点的温度，以使陶瓷组合物熔融或半熔融。然后将陶瓷组合物退火并固化，得到晶粒取向的陶瓷（瓷）。该方法可以由主要含有层状钙钛矿晶体结构的化合物的陶瓷组合物制造晶粒取向陶瓷，并且可以提高含有具有层状钙钛矿晶体结构的化合物的压电陶瓷的机电系数。

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