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31. 发明授权

US08044831B2 Decoding apparatus and control method thereof 有权
标题翻译：解码装置及其控制方法
公开(公告)号：US08044831B2
公开(公告)日：2011-10-25
申请号：US12684171
申请日：2010-01-08
申请人： Yuji Hara , Hisashi Ishikawa
发明人： Yuji Hara , Hisashi Ishikawa
IPC分类号： H03M7/40
CPC分类号： H03M7/425 , H03M7/48
摘要： The invention provides a decoding apparatus which guarantees a decoding speed of a predetermined unit. To this end, the decoding apparatus includes a shifter which detects a start bit of a codeword from coded data, a table which stores decode values of a plurality of symbol data at one address, a table which is used to store a shift amount of the shifter, a table which generates a data length of the decode values of the plurality of symbol data, a decoder which is used to generate an address of the first table from the coded data, a decoder which is used to generate an address of the second and third tables from the coded data, and a packer which couples or separates the decoded values of the plurality of symbol data to data for the predetermined fixed number of bits.
摘要翻译：本发明提供一种确保预定单元的解码速度的解码装置。为此，解码装置包括从编码数据检测码字的开始位的移位器，存储一个地址的多个符号数据的解码值的表，用于存储一个地址的移位量的表移位器，产生多个符号数据的解码值的数据长度的表，用于从编码数据生成第一表的地址的解码器，用于生成第二个符号数据的地址的解码器和来自编码数据的第三表，以及封隔器，其将多个符号数据的解码值与预定固定位数的数据进行耦合或分离。

32. 发明授权

US06573170B2 Process for multilayer wiring connections and bonding pad adhesion to dielectric in a semiconductor integrated circuit device 有权
标题翻译：在半导体集成电路器件中的多层布线连接和焊盘粘附到电介质的工艺
公开(公告)号：US06573170B2
公开(公告)日：2003-06-03
申请号：US09748163
申请日：2000-12-27
申请人： Takashi Aoyagi , Atsushi Ogishima , Hirotaka Kobayashi , Yuji Hara
发明人： Takashi Aoyagi , Atsushi Ogishima , Hirotaka Kobayashi , Yuji Hara
IPC分类号： H01L2100
CPC分类号： H01L23/53223 , H01L21/32051 , H01L21/76802 , H01L21/76807 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/45 , H01L24/48 , H01L27/10882 , H01L27/10894 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05073 , H01L2224/05093 , H01L2224/05166 , H01L2224/05187 , H01L2224/05624 , H01L2224/05644 , H01L2224/13099 , H01L2224/131 , H01L2224/13144 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4847 , H01L2224/48475 , H01L2224/48624 , H01L2224/48644 , H01L2224/48699 , H01L2224/48724 , H01L2224/48744 , H01L2224/48844 , H01L2224/85051 , H01L2224/85205 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/1306 , H01L2924/14 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2224/48824
摘要： A semiconductor integrated circuit device including a plurality of holes in an interlayer insulating film beneath a bonding pad wherein a plug is buried in the respective holes and is made of the same conductive film (W/TiN/Ti) as a plug in a through-hole. Any wire as a second layer is not formed in a lower region of the bonding pad. The plug buried in the holes is connected only to the upper boding pad and is not connected to a lower wire.
摘要翻译：一种半导体集成电路器件，包括在接合焊盘下方的层间绝缘膜中的多个孔，其中，插塞被埋在相应的孔中，并且由相同的导电膜（W / TiN / Ti）制成，孔。作为第二层的任何线都不形成在接合焊盘的下部区域中。埋在孔中的插头仅连接到上焊盘，并且不连接到下导线。

33. 发明授权

US5552639A Resin molded type semiconductor device having a conductor film 失效
公开(公告)号：US5552639A
公开(公告)日：1996-09-03
申请号：US456384
申请日：1995-06-01
申请人： Yuji Hara , Satoru Ito , Tatsuro Toya
发明人： Yuji Hara , Satoru Ito , Tatsuro Toya
IPC分类号： H01L23/29 , H01L23/31 , H01L23/58 , H01L27/02 , H01L23/48 , H01L29/34 , H01L29/44
CPC分类号： H01L23/585 , H01L23/291 , H01L23/3171 , H01L2224/05554 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/09701 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/181
摘要： A resin molded type semiconductor device has a metallic guard ring that is formed to cover the peripheral edge of the surface of a tetragonal semiconductor substrate. In order to prevent a passivation film on the guard ring from being cracked by stresses due to a resin mold package concentrating in the four corners of the semiconductor substrate, slits or rows of small holes are formed in the corner portions of the guard ring.

34. 发明授权

US5371411A Resin molded type semiconductor device having a conductor film 失效
标题翻译：具有导体膜的树脂模制型半导体器件
公开(公告)号：US5371411A
公开(公告)日：1994-12-06
申请号：US072405
申请日：1993-06-07
申请人： Yuji Hara , Satoru Ito , Tatsuro Toya
发明人： Yuji Hara , Satoru Ito , Tatsuro Toya
IPC分类号： H01L23/29 , H01L23/31 , H01L23/58 , H01L27/02 , H01L23/48 , H01L29/34 , H01L29/44
CPC分类号： H01L23/3171 , H01L23/291 , H01L23/585 , H01L2224/451 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/01014 , H01L2924/09701 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/181
摘要： A resin molded type semiconductor device has a metallic guard ring that is formed to cover the peripheral edge of the surface of a tetragonal semiconductor substrate. In order to prevent a passivation film on the guard ring from being cracked by stresses due to a resin mold package concentrating in the four corners of the semiconductor substrate, slits or rows of small holes are formed in the corner portions of the guard ring.
摘要翻译：树脂模制型半导体器件具有形成为覆盖四边形半导体衬底的表面的周缘的金属保护环。为了防止保护环上的钝化膜由于聚集在半导体衬底的四个角中的树脂模具封装而受到应力的破坏，在保护环的角部形成有狭缝或一排小孔。

35. 发明授权

US5155701A Semiconductor integrated circuit device and method of testing the same 失效
标题翻译：半导体集成电路器件及其测试方法
公开(公告)号：US5155701A
公开(公告)日：1992-10-13
申请号：US535298
申请日：1990-06-08
申请人： Kazuhiro Komori , Yuji Hara , Hideaki Takahashi , Minoru Fukuda , Satoshi Meguro
发明人： Kazuhiro Komori , Yuji Hara , Hideaki Takahashi , Minoru Fukuda , Satoshi Meguro
IPC分类号： G11C29/50
CPC分类号： G11C29/50016 , G11C29/50 , G11C16/04
摘要： An EPROM and a method of testing the former, in which a defective memory cell caused by defects in the insulating films between a substrate and a floating gate and between the floating gate and a control gate can be tested without writing any data in the individual memory cells by holding data lines to a low potential and word lines fed with a voltage.
摘要翻译： EPROM和测试前者的方法，其中可以测试由衬底和浮动栅极之间以及浮置栅极和控制栅极之间的绝缘膜中的缺陷引起的有缺陷的存储器单元，而不在单个存储器中写入任何数据通过将数据线保持为低电位并且馈送有电压的字线。

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